JP3779484B2 - Mos型半導体集積回路 - Google Patents
Mos型半導体集積回路 Download PDFInfo
- Publication number
- JP3779484B2 JP3779484B2 JP06008199A JP6008199A JP3779484B2 JP 3779484 B2 JP3779484 B2 JP 3779484B2 JP 06008199 A JP06008199 A JP 06008199A JP 6008199 A JP6008199 A JP 6008199A JP 3779484 B2 JP3779484 B2 JP 3779484B2
- Authority
- JP
- Japan
- Prior art keywords
- mos transistor
- transistor
- circuit
- node
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
- H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP06008199A JP3779484B2 (ja) | 1999-03-08 | 1999-03-08 | Mos型半導体集積回路 |
| US09/520,632 US6480034B1 (en) | 1999-03-08 | 2000-03-07 | MOS-type semiconductor integrated circuit |
| US10/234,115 US6714615B2 (en) | 1999-03-08 | 2002-09-05 | MOS-type semiconductor integrated circuit |
| US10/234,106 US6700411B2 (en) | 1999-03-08 | 2002-09-05 | MOS-type semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP06008199A JP3779484B2 (ja) | 1999-03-08 | 1999-03-08 | Mos型半導体集積回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000261306A JP2000261306A (ja) | 2000-09-22 |
| JP2000261306A5 JP2000261306A5 (enExample) | 2005-05-26 |
| JP3779484B2 true JP3779484B2 (ja) | 2006-05-31 |
Family
ID=13131789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP06008199A Expired - Fee Related JP3779484B2 (ja) | 1999-03-08 | 1999-03-08 | Mos型半導体集積回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (3) | US6480034B1 (enExample) |
| JP (1) | JP3779484B2 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003188361A (ja) * | 2001-12-20 | 2003-07-04 | Mitsubishi Electric Corp | ゲートアレイ構造の半導体集積回路 |
| US20060093642A1 (en) * | 2004-11-03 | 2006-05-04 | Ranade Shrirang V | Method of incorporating carbon nanotubes in a medical appliance, a carbon nanotube medical appliance, and a medical appliance coated using carbon nanotube technology |
| CN105850043B (zh) * | 2013-12-27 | 2019-01-11 | 松下知识产权经营株式会社 | 半导体集成电路、锁存电路以及触发器 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6051323A (ja) * | 1983-08-31 | 1985-03-22 | Toshiba Corp | Cmos伝送回路 |
| JP3494469B2 (ja) | 1994-05-26 | 2004-02-09 | 株式会社ルネサステクノロジ | フィールドプログラマブルゲートアレイ |
-
1999
- 1999-03-08 JP JP06008199A patent/JP3779484B2/ja not_active Expired - Fee Related
-
2000
- 2000-03-07 US US09/520,632 patent/US6480034B1/en not_active Expired - Lifetime
-
2002
- 2002-09-05 US US10/234,115 patent/US6714615B2/en not_active Expired - Fee Related
- 2002-09-05 US US10/234,106 patent/US6700411B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20030001620A1 (en) | 2003-01-02 |
| US20020196051A1 (en) | 2002-12-26 |
| JP2000261306A (ja) | 2000-09-22 |
| US6480034B1 (en) | 2002-11-12 |
| US6714615B2 (en) | 2004-03-30 |
| US6700411B2 (en) | 2004-03-02 |
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| LAPS | Cancellation because of no payment of annual fees |