JP3737240B2 - 半導体集積回路装置 - Google Patents
半導体集積回路装置 Download PDFInfo
- Publication number
- JP3737240B2 JP3737240B2 JP10687797A JP10687797A JP3737240B2 JP 3737240 B2 JP3737240 B2 JP 3737240B2 JP 10687797 A JP10687797 A JP 10687797A JP 10687797 A JP10687797 A JP 10687797A JP 3737240 B2 JP3737240 B2 JP 3737240B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- low
- power supply
- nmos transistor
- pmos transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
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- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10687797A JP3737240B2 (ja) | 1997-04-24 | 1997-04-24 | 半導体集積回路装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10687797A JP3737240B2 (ja) | 1997-04-24 | 1997-04-24 | 半導体集積回路装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH10303370A JPH10303370A (ja) | 1998-11-13 |
| JPH10303370A5 JPH10303370A5 (https=) | 2005-03-17 |
| JP3737240B2 true JP3737240B2 (ja) | 2006-01-18 |
Family
ID=14444761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10687797A Expired - Fee Related JP3737240B2 (ja) | 1997-04-24 | 1997-04-24 | 半導体集積回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3737240B2 (https=) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001127611A (ja) | 1999-10-27 | 2001-05-11 | Univ Tokyo | 半導体集積回路 |
| JP3566608B2 (ja) | 1999-12-28 | 2004-09-15 | Necエレクトロニクス株式会社 | 半導体集積回路 |
| TW501278B (en) * | 2000-06-12 | 2002-09-01 | Intel Corp | Apparatus and circuit having reduced leakage current and method therefor |
| CN100590877C (zh) * | 2002-09-10 | 2010-02-17 | 日本电气株式会社 | 薄膜半导体装置及其制造方法 |
| US7248090B2 (en) * | 2005-01-10 | 2007-07-24 | Qualcomm, Incorporated | Multi-threshold MOS circuits |
| JP4261507B2 (ja) | 2005-03-31 | 2009-04-30 | 富士通マイクロエレクトロニクス株式会社 | クロックネットワークの消費電力低減回路 |
| JP2009302194A (ja) | 2008-06-11 | 2009-12-24 | Sony Corp | 電源遮断トランジスタを有する半導体装置 |
| JP4607256B2 (ja) | 2008-12-18 | 2011-01-05 | パナソニック株式会社 | 不揮発性記憶装置及びその書き込み方法 |
| CN109449156B (zh) * | 2018-12-20 | 2024-03-22 | 上海艾为电子技术股份有限公司 | 一种端口静电释放保护电路 |
-
1997
- 1997-04-24 JP JP10687797A patent/JP3737240B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10303370A (ja) | 1998-11-13 |
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