JP3681528B2 - グラフィックプロセッサ及びデータ処理システム - Google Patents
グラフィックプロセッサ及びデータ処理システム Download PDFInfo
- Publication number
- JP3681528B2 JP3681528B2 JP35254397A JP35254397A JP3681528B2 JP 3681528 B2 JP3681528 B2 JP 3681528B2 JP 35254397 A JP35254397 A JP 35254397A JP 35254397 A JP35254397 A JP 35254397A JP 3681528 B2 JP3681528 B2 JP 3681528B2
- Authority
- JP
- Japan
- Prior art keywords
- pixel data
- command
- information
- weighted average
- image information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T15/00—3D [Three Dimensional] image rendering
- G06T15/005—General purpose rendering architectures
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/10—Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
- H04N7/0132—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction
Landscapes
- Engineering & Computer Science (AREA)
- Computer Graphics (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Controls And Circuits For Display Device (AREA)
- Picture Signal Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35254397A JP3681528B2 (ja) | 1997-12-22 | 1997-12-22 | グラフィックプロセッサ及びデータ処理システム |
| TW087120543A TW428161B (en) | 1997-12-22 | 1998-12-10 | Graphic processor and data processing system |
| US09/213,172 US6384831B1 (en) | 1997-12-22 | 1998-12-17 | Graphic processor and data processing system |
| KR1019980055956A KR19990063179A (ko) | 1997-12-22 | 1998-12-18 | 그래픽프로세서 및 데이타처리시스템 |
| US09/983,716 US6587111B2 (en) | 1997-12-22 | 2001-10-25 | Graphic processor and data processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35254397A JP3681528B2 (ja) | 1997-12-22 | 1997-12-22 | グラフィックプロセッサ及びデータ処理システム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11184454A JPH11184454A (ja) | 1999-07-09 |
| JPH11184454A5 JPH11184454A5 (enExample) | 2005-02-24 |
| JP3681528B2 true JP3681528B2 (ja) | 2005-08-10 |
Family
ID=18424786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35254397A Expired - Fee Related JP3681528B2 (ja) | 1997-12-22 | 1997-12-22 | グラフィックプロセッサ及びデータ処理システム |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6384831B1 (enExample) |
| JP (1) | JP3681528B2 (enExample) |
| KR (1) | KR19990063179A (enExample) |
| TW (1) | TW428161B (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6636222B1 (en) * | 1999-11-09 | 2003-10-21 | Broadcom Corporation | Video and graphics system with an MPEG video decoder for concurrent multi-row decoding |
| US6798420B1 (en) | 1998-11-09 | 2004-09-28 | Broadcom Corporation | Video and graphics system with a single-port RAM |
| US6661422B1 (en) * | 1998-11-09 | 2003-12-09 | Broadcom Corporation | Video and graphics system with MPEG specific data transfer commands |
| US6573905B1 (en) | 1999-11-09 | 2003-06-03 | Broadcom Corporation | Video and graphics system with parallel processing of graphics windows |
| US7446774B1 (en) | 1998-11-09 | 2008-11-04 | Broadcom Corporation | Video and graphics system with an integrated system bridge controller |
| US7982740B2 (en) | 1998-11-09 | 2011-07-19 | Broadcom Corporation | Low resolution graphics mode support using window descriptors |
| US6768774B1 (en) | 1998-11-09 | 2004-07-27 | Broadcom Corporation | Video and graphics system with video scaling |
| US6853385B1 (en) | 1999-11-09 | 2005-02-08 | Broadcom Corporation | Video, audio and graphics decode, composite and display system |
| EP1365385B1 (en) | 1998-11-09 | 2012-06-13 | Broadcom Corporation | Graphics display system with processing of graphics layers, alpha blending and composition with video data |
| DE19934208A1 (de) * | 1999-07-21 | 2001-01-25 | Grundig Ag | Verfahren und Vorrichtung zur Wiedergabe eines zeilenflimmerreduzierten Graphiksignals auf einem mit Zeilensprungwiedergabe arbeitenden Fernsehdisplay |
| US6975324B1 (en) | 1999-11-09 | 2005-12-13 | Broadcom Corporation | Video and graphics system with a video transport processor |
| US6954195B2 (en) * | 2000-03-01 | 2005-10-11 | Minolta Co., Ltd. | Liquid crystal display device having a liquid crystal display driven by interlace scanning and/or sequential scanning |
| JP4029253B2 (ja) * | 2000-04-10 | 2008-01-09 | 富士フイルム株式会社 | 画像リサイズ装置及びその方法 |
| US7184059B1 (en) | 2000-08-23 | 2007-02-27 | Nintendo Co., Ltd. | Graphics system with copy out conversions between embedded frame buffer and main memory |
| JP2002163671A (ja) * | 2000-11-27 | 2002-06-07 | Namco Ltd | ゲームシステム、プログラム及び情報記憶媒体 |
| JP2003233366A (ja) * | 2002-02-13 | 2003-08-22 | Nec Access Technica Ltd | 表示合成回路及び携帯用電子機器 |
| KR100450680B1 (ko) * | 2002-07-29 | 2004-10-01 | 삼성전자주식회사 | 버스 대역폭을 증가시키기 위한 메모리 컨트롤러, 이를이용한 데이터 전송방법 및 이를 구비하는 컴퓨터 시스템 |
| EP1599840B1 (en) * | 2003-02-11 | 2006-12-06 | Research In Motion Limited | Display processing system and method |
| KR101076900B1 (ko) * | 2003-06-12 | 2011-10-25 | 마이크로소프트 코포레이션 | 멀티 블렌딩을 이용하여 이미지를 디스플레이하는 시스템및 방법 |
| US8063916B2 (en) | 2003-10-22 | 2011-11-22 | Broadcom Corporation | Graphics layer reduction for video composition |
| JP2006013701A (ja) * | 2004-06-23 | 2006-01-12 | Seiko Epson Corp | 表示コントローラ、電子機器及び画像データ供給方法 |
| US7695365B2 (en) * | 2004-09-10 | 2010-04-13 | Wms Gaming Inc. | Slot machine with persistent change in symbol function |
| WO2007049449A1 (ja) * | 2005-10-26 | 2007-05-03 | Matsushita Electric Industrial Co., Ltd. | 映像再生装置および映像記録装置、映像再生方法および映像記録方法並びに半導体集積回路 |
| JP4723427B2 (ja) * | 2006-06-30 | 2011-07-13 | ルネサスエレクトロニクス株式会社 | 画像処理回路および画像処理システムならびに画像処理方法 |
| CN103646639B (zh) | 2009-01-27 | 2016-08-24 | 三菱电机株式会社 | 状态显示装置以及状态显示装置的显示方法 |
| JP5137866B2 (ja) * | 2009-01-28 | 2013-02-06 | 三菱電機株式会社 | 設備操作表示装置 |
| US8970610B2 (en) | 2009-11-02 | 2015-03-03 | Freescale Semiconductor, Inc. | Pixel data processing apparatus and method of processing pixel data |
| US8259120B2 (en) | 2010-06-02 | 2012-09-04 | Dell Products L.P. | Seamless switching between graphics controllers |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06309425A (ja) * | 1990-10-12 | 1994-11-04 | Internatl Business Mach Corp <Ibm> | グラフィックディスプレイ装置及び方法 |
| JPH0646299A (ja) | 1992-07-27 | 1994-02-18 | Matsushita Electric Ind Co Ltd | 画像表示装置 |
| JPH0683299A (ja) | 1992-08-31 | 1994-03-25 | Nec Home Electron Ltd | スキャン変換回路 |
| US5481275A (en) * | 1992-11-02 | 1996-01-02 | The 3Do Company | Resolution enhancement for video display using multi-line interpolation |
| US6130660A (en) * | 1993-10-01 | 2000-10-10 | Maxvision Corporation | System and method for synthesizing high resolution video |
| JPH07274086A (ja) | 1994-03-28 | 1995-10-20 | Toshiba Corp | 表示制御装置 |
| DE69521741T2 (de) * | 1994-05-03 | 2002-05-23 | Sun Microsystems Inc | Direktzugriffspeicher und System für Rasterpuffer |
| JPH07334669A (ja) * | 1994-06-07 | 1995-12-22 | Matsushita Electric Ind Co Ltd | 図形処理方法および図形処理装置 |
| AU3548095A (en) * | 1994-08-31 | 1996-03-22 | S3 Incorporated | Apparatus for correction of video tearing |
| US6014125A (en) * | 1994-12-08 | 2000-01-11 | Hyundai Electronics America | Image processing apparatus including horizontal and vertical scaling for a computer display |
| US5657047A (en) * | 1995-01-12 | 1997-08-12 | Accelgraphics, Inc. | Method and apparatus for zooming images on a video display |
| JP3075505B2 (ja) | 1995-05-10 | 2000-08-14 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | 表示制御装置及びその制御方法 |
| US5943036A (en) * | 1995-07-27 | 1999-08-24 | Akio Tanaka | Flicker reduction system for computer graphical interlaced display |
| US5936621A (en) * | 1996-06-28 | 1999-08-10 | Innovision Labs | System and method for reducing flicker on a display |
| US5963192A (en) * | 1996-10-11 | 1999-10-05 | Silicon Motion, Inc. | Apparatus and method for flicker reduction and over/underscan |
| US5867180A (en) * | 1997-03-13 | 1999-02-02 | International Business Machines Corporation | Intelligent media memory statically mapped in unified memory architecture |
| US6229521B1 (en) * | 1997-04-10 | 2001-05-08 | Sun Microsystems, Inc. | Method for antialiasing fonts for television display |
| US5963262A (en) * | 1997-06-30 | 1999-10-05 | Cirrus Logic, Inc. | System and method for scaling images and reducing flicker in interlaced television images converted from non-interlaced computer graphics data |
| US6061094A (en) * | 1997-11-12 | 2000-05-09 | U.S. Philips Corporation | Method and apparatus for scaling and reducing flicker with dynamic coefficient weighting |
| US6130723A (en) * | 1998-01-15 | 2000-10-10 | Innovision Corporation | Method and system for improving image quality on an interlaced video display |
| US6034733A (en) * | 1998-07-29 | 2000-03-07 | S3 Incorporated | Timing and control for deinterlacing and enhancement of non-deterministically arriving interlaced video data |
-
1997
- 1997-12-22 JP JP35254397A patent/JP3681528B2/ja not_active Expired - Fee Related
-
1998
- 1998-12-10 TW TW087120543A patent/TW428161B/zh active
- 1998-12-17 US US09/213,172 patent/US6384831B1/en not_active Expired - Fee Related
- 1998-12-18 KR KR1019980055956A patent/KR19990063179A/ko not_active Withdrawn
-
2001
- 2001-10-25 US US09/983,716 patent/US6587111B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11184454A (ja) | 1999-07-09 |
| TW428161B (en) | 2001-04-01 |
| US6587111B2 (en) | 2003-07-01 |
| US6384831B1 (en) | 2002-05-07 |
| US20020033827A1 (en) | 2002-03-21 |
| KR19990063179A (ko) | 1999-07-26 |
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