TW428161B - Graphic processor and data processing system - Google Patents

Graphic processor and data processing system

Info

Publication number
TW428161B
TW428161B TW087120543A TW87120543A TW428161B TW 428161 B TW428161 B TW 428161B TW 087120543 A TW087120543 A TW 087120543A TW 87120543 A TW87120543 A TW 87120543A TW 428161 B TW428161 B TW 428161B
Authority
TW
Taiwan
Prior art keywords
control means
pixel data
image information
graphic processor
difference
Prior art date
Application number
TW087120543A
Other languages
English (en)
Chinese (zh)
Inventor
Atsushi Nakamura
Yasuhiro Nakatsuka
Kazushige Yamagishi
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW428161B publication Critical patent/TW428161B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/10—Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • H04N7/0132—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Picture Signal Circuits (AREA)
TW087120543A 1997-12-22 1998-12-10 Graphic processor and data processing system TW428161B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35254397A JP3681528B2 (ja) 1997-12-22 1997-12-22 グラフィックプロセッサ及びデータ処理システム

Publications (1)

Publication Number Publication Date
TW428161B true TW428161B (en) 2001-04-01

Family

ID=18424786

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087120543A TW428161B (en) 1997-12-22 1998-12-10 Graphic processor and data processing system

Country Status (4)

Country Link
US (2) US6384831B1 (enExample)
JP (1) JP3681528B2 (enExample)
KR (1) KR19990063179A (enExample)
TW (1) TW428161B (enExample)

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US6661422B1 (en) * 1998-11-09 2003-12-09 Broadcom Corporation Video and graphics system with MPEG specific data transfer commands
US6573905B1 (en) 1999-11-09 2003-06-03 Broadcom Corporation Video and graphics system with parallel processing of graphics windows
US7446774B1 (en) 1998-11-09 2008-11-04 Broadcom Corporation Video and graphics system with an integrated system bridge controller
US7982740B2 (en) 1998-11-09 2011-07-19 Broadcom Corporation Low resolution graphics mode support using window descriptors
US6768774B1 (en) 1998-11-09 2004-07-27 Broadcom Corporation Video and graphics system with video scaling
US6853385B1 (en) 1999-11-09 2005-02-08 Broadcom Corporation Video, audio and graphics decode, composite and display system
EP1365385B1 (en) 1998-11-09 2012-06-13 Broadcom Corporation Graphics display system with processing of graphics layers, alpha blending and composition with video data
DE19934208A1 (de) * 1999-07-21 2001-01-25 Grundig Ag Verfahren und Vorrichtung zur Wiedergabe eines zeilenflimmerreduzierten Graphiksignals auf einem mit Zeilensprungwiedergabe arbeitenden Fernsehdisplay
US6975324B1 (en) 1999-11-09 2005-12-13 Broadcom Corporation Video and graphics system with a video transport processor
US6954195B2 (en) * 2000-03-01 2005-10-11 Minolta Co., Ltd. Liquid crystal display device having a liquid crystal display driven by interlace scanning and/or sequential scanning
JP4029253B2 (ja) * 2000-04-10 2008-01-09 富士フイルム株式会社 画像リサイズ装置及びその方法
US7184059B1 (en) 2000-08-23 2007-02-27 Nintendo Co., Ltd. Graphics system with copy out conversions between embedded frame buffer and main memory
JP2002163671A (ja) * 2000-11-27 2002-06-07 Namco Ltd ゲームシステム、プログラム及び情報記憶媒体
JP2003233366A (ja) * 2002-02-13 2003-08-22 Nec Access Technica Ltd 表示合成回路及び携帯用電子機器
KR100450680B1 (ko) * 2002-07-29 2004-10-01 삼성전자주식회사 버스 대역폭을 증가시키기 위한 메모리 컨트롤러, 이를이용한 데이터 전송방법 및 이를 구비하는 컴퓨터 시스템
EP1599840B1 (en) * 2003-02-11 2006-12-06 Research In Motion Limited Display processing system and method
KR101076900B1 (ko) * 2003-06-12 2011-10-25 마이크로소프트 코포레이션 멀티 블렌딩을 이용하여 이미지를 디스플레이하는 시스템및 방법
US8063916B2 (en) 2003-10-22 2011-11-22 Broadcom Corporation Graphics layer reduction for video composition
JP2006013701A (ja) * 2004-06-23 2006-01-12 Seiko Epson Corp 表示コントローラ、電子機器及び画像データ供給方法
US7695365B2 (en) * 2004-09-10 2010-04-13 Wms Gaming Inc. Slot machine with persistent change in symbol function
WO2007049449A1 (ja) * 2005-10-26 2007-05-03 Matsushita Electric Industrial Co., Ltd. 映像再生装置および映像記録装置、映像再生方法および映像記録方法並びに半導体集積回路
JP4723427B2 (ja) * 2006-06-30 2011-07-13 ルネサスエレクトロニクス株式会社 画像処理回路および画像処理システムならびに画像処理方法
CN103646639B (zh) 2009-01-27 2016-08-24 三菱电机株式会社 状态显示装置以及状态显示装置的显示方法
JP5137866B2 (ja) * 2009-01-28 2013-02-06 三菱電機株式会社 設備操作表示装置
US8970610B2 (en) 2009-11-02 2015-03-03 Freescale Semiconductor, Inc. Pixel data processing apparatus and method of processing pixel data
US8259120B2 (en) 2010-06-02 2012-09-04 Dell Products L.P. Seamless switching between graphics controllers

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Also Published As

Publication number Publication date
JPH11184454A (ja) 1999-07-09
US6587111B2 (en) 2003-07-01
US6384831B1 (en) 2002-05-07
US20020033827A1 (en) 2002-03-21
JP3681528B2 (ja) 2005-08-10
KR19990063179A (ko) 1999-07-26

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