JP3622304B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP3622304B2
JP3622304B2 JP34036695A JP34036695A JP3622304B2 JP 3622304 B2 JP3622304 B2 JP 3622304B2 JP 34036695 A JP34036695 A JP 34036695A JP 34036695 A JP34036695 A JP 34036695A JP 3622304 B2 JP3622304 B2 JP 3622304B2
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JP
Japan
Prior art keywords
potential
voltage
information
power supply
external power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP34036695A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09180466A (ja
Inventor
知紀 関口
宏樹 藤澤
健 阪田
尊之 河原
勝高 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP34036695A priority Critical patent/JP3622304B2/ja
Priority to TW085113527A priority patent/TW316980B/zh
Priority to KR1019960072359A priority patent/KR100538718B1/ko
Priority to US08/774,907 priority patent/US5910911A/en
Publication of JPH09180466A publication Critical patent/JPH09180466A/ja
Application granted granted Critical
Publication of JP3622304B2 publication Critical patent/JP3622304B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
JP34036695A 1995-12-27 1995-12-27 半導体記憶装置 Expired - Fee Related JP3622304B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP34036695A JP3622304B2 (ja) 1995-12-27 1995-12-27 半導体記憶装置
TW085113527A TW316980B (enExample) 1995-12-27 1996-10-30
KR1019960072359A KR100538718B1 (ko) 1995-12-27 1996-12-26 반도체기억장치
US08/774,907 US5910911A (en) 1995-12-27 1996-12-27 Semiconductor memory and process of operating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34036695A JP3622304B2 (ja) 1995-12-27 1995-12-27 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPH09180466A JPH09180466A (ja) 1997-07-11
JP3622304B2 true JP3622304B2 (ja) 2005-02-23

Family

ID=18336262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34036695A Expired - Fee Related JP3622304B2 (ja) 1995-12-27 1995-12-27 半導体記憶装置

Country Status (4)

Country Link
US (1) US5910911A (enExample)
JP (1) JP3622304B2 (enExample)
KR (1) KR100538718B1 (enExample)
TW (1) TW316980B (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11273362A (ja) * 1998-03-18 1999-10-08 Sharp Corp 不揮発性半導体記憶装置
KR100268947B1 (ko) * 1998-04-03 2000-10-16 김영환 비휘발성 강유전체 메모리 및 그의 제어회로
JP4490514B2 (ja) * 1998-10-08 2010-06-30 株式会社東芝 強誘電体メモリ
JP3169920B2 (ja) * 1998-12-22 2001-05-28 日本電気アイシーマイコンシステム株式会社 半導体記憶装置、その装置製造方法
JP2000187990A (ja) 1998-12-24 2000-07-04 Nec Corp センスアンプ回路及びそれを用いた記憶装置並びにそれに用いる読出し方法
JP2001076493A (ja) * 1999-09-03 2001-03-23 Nec Corp 強誘電体記憶装置
JP2001093286A (ja) * 1999-09-21 2001-04-06 Nec Corp 強誘電体記憶装置及びその製造方法
JP2001319471A (ja) * 2000-05-09 2001-11-16 Fujitsu Ltd 強誘電体メモリ
US6720596B2 (en) * 2000-10-17 2004-04-13 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for driving the same
US6430093B1 (en) 2001-05-24 2002-08-06 Ramtron International Corporation CMOS boosting circuit utilizing ferroelectric capacitors
US6535446B2 (en) 2001-05-24 2003-03-18 Ramtron International Corporation Two stage low voltage ferroelectric boost circuit
KR100399437B1 (ko) 2001-06-29 2003-09-29 주식회사 하이닉스반도체 내부 전원전압 발생장치
JP4146628B2 (ja) 2001-08-23 2008-09-10 松下電器産業株式会社 メモリシステム及び半導体集積回路
KR100402243B1 (ko) * 2001-09-24 2003-10-17 주식회사 하이닉스반도체 개선된 주변회로를 갖는 반도체 기억장치
JP2004139655A (ja) * 2002-10-17 2004-05-13 Matsushita Electric Ind Co Ltd 半導体記憶装置及びそれが搭載された電子装置
US7337282B2 (en) * 2003-11-28 2008-02-26 Infineon Technologies Ag Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component
KR100560301B1 (ko) * 2003-12-30 2006-03-10 주식회사 하이닉스반도체 트랩 가능한 부도체를 사용하는 불휘발성 디램의 구동회로 및 방법
DE102005045312A1 (de) * 2004-10-29 2006-05-04 Infineon Technologies Ag Halbleiterspeicher mit flüchtigen und nichtflüchtigen Speicherzellen
JP4103010B2 (ja) * 2005-04-01 2008-06-18 セイコーエプソン株式会社 半導体ウエハ
JP2007073141A (ja) * 2005-09-07 2007-03-22 Matsushita Electric Ind Co Ltd 強誘電体メモリ装置
JP5451011B2 (ja) * 2008-08-29 2014-03-26 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置及び情報処理システム
ITTO20120682A1 (it) * 2012-07-31 2014-02-01 St Microelectronics Pvt Ltd Dispositivo di memoria non volatile con celle raggruppate
US9368182B2 (en) * 2013-12-09 2016-06-14 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Memory cell
US10056140B2 (en) * 2014-01-30 2018-08-21 Hewlett Packard Enterprise Development Lp Memristor memory with volatile and non-volatile states
US10153020B1 (en) * 2017-06-09 2018-12-11 Micron Technology, Inc. Dual mode ferroelectric memory cell operation
US10867675B2 (en) * 2017-07-13 2020-12-15 Micron Technology, Inc. Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells
WO2019130144A1 (ja) * 2017-12-27 2019-07-04 株式会社半導体エネルギー研究所 記憶装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3279025B2 (ja) * 1993-12-22 2002-04-30 株式会社日立製作所 半導体メモリ
US5737260A (en) * 1996-03-27 1998-04-07 Sharp Kabushiki Kaisha Dual mode ferroelectric memory reference scheme

Also Published As

Publication number Publication date
JPH09180466A (ja) 1997-07-11
KR100538718B1 (ko) 2006-04-28
US5910911A (en) 1999-06-08
KR970051144A (ko) 1997-07-29
TW316980B (enExample) 1997-10-01

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