JP2958136B2 - 半導体集積回路装置、その製造方法および実装構造 - Google Patents

半導体集積回路装置、その製造方法および実装構造

Info

Publication number
JP2958136B2
JP2958136B2 JP3042158A JP4215891A JP2958136B2 JP 2958136 B2 JP2958136 B2 JP 2958136B2 JP 3042158 A JP3042158 A JP 3042158A JP 4215891 A JP4215891 A JP 4215891A JP 2958136 B2 JP2958136 B2 JP 2958136B2
Authority
JP
Japan
Prior art keywords
integrated circuit
package body
circuit device
chip
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3042158A
Other languages
English (en)
Japanese (ja)
Other versions
JPH04280458A (ja
Inventor
順一 有田
一郎 安生
村上　　元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3042158A priority Critical patent/JP2958136B2/ja
Priority to KR1019920002524A priority patent/KR100218083B1/ko
Publication of JPH04280458A publication Critical patent/JPH04280458A/ja
Application granted granted Critical
Publication of JP2958136B2 publication Critical patent/JP2958136B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP3042158A 1991-03-08 1991-03-08 半導体集積回路装置、その製造方法および実装構造 Expired - Fee Related JP2958136B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP3042158A JP2958136B2 (ja) 1991-03-08 1991-03-08 半導体集積回路装置、その製造方法および実装構造
KR1019920002524A KR100218083B1 (ko) 1991-03-08 1992-02-20 반도체집적회로장치와 그 제조방법 및 내장구조

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3042158A JP2958136B2 (ja) 1991-03-08 1991-03-08 半導体集積回路装置、その製造方法および実装構造

Publications (2)

Publication Number Publication Date
JPH04280458A JPH04280458A (ja) 1992-10-06
JP2958136B2 true JP2958136B2 (ja) 1999-10-06

Family

ID=12628145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3042158A Expired - Fee Related JP2958136B2 (ja) 1991-03-08 1991-03-08 半導体集積回路装置、その製造方法および実装構造

Country Status (2)

Country Link
JP (1) JP2958136B2 (ko)
KR (1) KR100218083B1 (ko)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6826827B1 (en) 1994-12-29 2004-12-07 Tessera, Inc. Forming conductive posts by selective removal of conductive material
US6211572B1 (en) * 1995-10-31 2001-04-03 Tessera, Inc. Semiconductor chip package with fan-in leads
US6284563B1 (en) 1995-10-31 2001-09-04 Tessera, Inc. Method of making compliant microelectronic assemblies
TW448524B (en) 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
JP3335575B2 (ja) 1997-06-06 2002-10-21 松下電器産業株式会社 半導体装置およびその製造方法
WO2000079589A1 (de) * 1999-06-17 2000-12-28 Infineon Technologies Ag Elektronisches bauelement mit flexiblen kontaktierungsstellen und verfahren zum herstellen eines derartigen bauelements
DE10016132A1 (de) 2000-03-31 2001-10-18 Infineon Technologies Ag Elektronisches Bauelement mit flexiblen Kontaktierungsstellen und Verfahren zu dessen Herstellung
DE10116069C2 (de) 2001-04-02 2003-02-20 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip und Verfahren zu seiner Herstellung
JP4539268B2 (ja) * 2004-09-29 2010-09-08 セイコーエプソン株式会社 実装構造体
JP4224717B2 (ja) 2005-07-11 2009-02-18 セイコーエプソン株式会社 半導体装置
JP4296434B2 (ja) * 2005-09-13 2009-07-15 セイコーエプソン株式会社 半導体装置
US9137903B2 (en) 2010-12-21 2015-09-15 Tessera, Inc. Semiconductor chip assembly and method for making same

Also Published As

Publication number Publication date
JPH04280458A (ja) 1992-10-06
KR100218083B1 (ko) 1999-09-01
KR920018909A (ko) 1992-10-22

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