JP2023553477A5 - - Google Patents

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Publication number
JP2023553477A5
JP2023553477A5 JP2023535862A JP2023535862A JP2023553477A5 JP 2023553477 A5 JP2023553477 A5 JP 2023553477A5 JP 2023535862 A JP2023535862 A JP 2023535862A JP 2023535862 A JP2023535862 A JP 2023535862A JP 2023553477 A5 JP2023553477 A5 JP 2023553477A5
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JP
Japan
Prior art keywords
zone
semiconductor component
electronic semiconductor
crystal
electric field
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Application number
JP2023535862A
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English (en)
Japanese (ja)
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JP2023553477A (ja
JP7724570B2 (ja
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Priority claimed from DE102020134222.5A external-priority patent/DE102020134222A1/de
Priority claimed from DE102021109690.1A external-priority patent/DE102021109690A1/de
Application filed filed Critical
Priority claimed from PCT/EP2021/085296 external-priority patent/WO2022128818A1/de
Publication of JP2023553477A publication Critical patent/JP2023553477A/ja
Publication of JP2023553477A5 publication Critical patent/JP2023553477A5/ja
Priority to JP2025126662A priority Critical patent/JP2025156404A/ja
Application granted granted Critical
Publication of JP7724570B2 publication Critical patent/JP7724570B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2023535862A 2020-12-18 2021-12-10 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法 Active JP7724570B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025126662A JP2025156404A (ja) 2020-12-18 2025-07-29 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102020134222.5 2020-12-18
DE102020134222.5A DE102020134222A1 (de) 2020-12-18 2020-12-18 Verfahren zur Herstellung eines vorbehandelten Verbundsubstrats und vorbehandeltes Verbundsubstrat
DE102021109690.1A DE102021109690A1 (de) 2021-04-16 2021-04-16 Elektronisches Halbleiterbauelement und Verfahren zur Herstellung eines vorbehandelten Verbundsubstrats für ein elektronisches Halbleiterbauelement
DE102021109690.1 2021-04-16
PCT/EP2021/085296 WO2022128818A1 (de) 2020-12-18 2021-12-10 Elektronisches halbleiterbauelement und verfahren zur herstellung eines vorbehandelten verbundsubstrats für ein elektronisches halbleiterbauelement

Related Child Applications (1)

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JP2025126662A Division JP2025156404A (ja) 2020-12-18 2025-07-29 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法

Publications (3)

Publication Number Publication Date
JP2023553477A JP2023553477A (ja) 2023-12-21
JP2023553477A5 true JP2023553477A5 (https=) 2024-12-17
JP7724570B2 JP7724570B2 (ja) 2025-08-18

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ID=79230700

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Application Number Title Priority Date Filing Date
JP2023535862A Active JP7724570B2 (ja) 2020-12-18 2021-12-10 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法
JP2025126662A Pending JP2025156404A (ja) 2020-12-18 2025-07-29 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法

Family Applications After (1)

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JP2025126662A Pending JP2025156404A (ja) 2020-12-18 2025-07-29 電子半導体部品、および電子半導体部品用の前処理された複合基板の製造方法

Country Status (4)

Country Link
US (1) US20240055472A1 (https=)
EP (1) EP4264672A1 (https=)
JP (2) JP7724570B2 (https=)
WO (1) WO2022128818A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102023134623A1 (de) * 2023-12-11 2025-06-12 mi2-factory GmbH Verfahren zur Implantation von Dotieratomen in ein Substrat

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6270573B1 (en) * 1997-08-27 2001-08-07 Matsushita Electric Industrial Co., Ltd. Silicon carbide substrate, and method for producing the substrate, and semiconductor device utilizing the substrate
EP1619276B1 (en) * 2004-07-19 2017-01-11 Norstel AB Homoepitaxial growth of SiC on low off-axis SiC wafers
US7404858B2 (en) * 2005-09-16 2008-07-29 Mississippi State University Method for epitaxial growth of silicon carbide
EP2040285A1 (en) * 2007-09-19 2009-03-25 S.O.I. TEC Silicon Method for fabricating a mixed orientation substrate
JP5721351B2 (ja) * 2009-07-21 2015-05-20 ローム株式会社 半導体装置
JP5607947B2 (ja) 2010-02-17 2014-10-15 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
EP2610912A4 (en) * 2010-08-27 2014-10-22 Nat Univ Corp Nara Inst SIC SEMICONDUCTOR ELEMENT
WO2013054580A1 (ja) 2011-10-13 2013-04-18 住友電気工業株式会社 炭化珪素基板、炭化珪素半導体装置、炭化珪素基板の製造方法、および炭化珪素半導体装置の製造方法
JP5939624B2 (ja) * 2012-03-30 2016-06-22 国立研究開発法人産業技術総合研究所 縦型高耐圧半導体装置の製造方法および縦型高耐圧半導体装置
JP6197995B2 (ja) * 2013-08-23 2017-09-20 富士電機株式会社 ワイドバンドギャップ絶縁ゲート型半導体装置
US9219049B2 (en) * 2013-12-13 2015-12-22 Infineon Technologies Ag Compound structure and method for forming a compound structure
US9887287B1 (en) 2016-12-08 2018-02-06 Cree, Inc. Power semiconductor devices having gate trenches with implanted sidewalls and related methods
US10861931B2 (en) * 2016-12-08 2020-12-08 Cree, Inc. Power semiconductor devices having gate trenches and buried edge terminations and related methods
CN110366783B (zh) 2017-03-03 2023-04-21 日立能源瑞士股份公司 碳化硅超结功率半导体器件及用于制造该器件的方法
US10615274B2 (en) * 2017-12-21 2020-04-07 Cree, Inc. Vertical semiconductor device with improved ruggedness
DE102017131354A1 (de) 2017-12-27 2019-06-27 Infineon Technologies Ag Ein Halbleiterbauelement mit breitem Bandabstand und ein Verfahren zum Bilden eines Halbleiterbauelements mit breitem Bandabstand
JP6563093B1 (ja) * 2018-08-10 2019-08-21 ローム株式会社 ＳｉＣ半導体装置
JP7349089B2 (ja) 2019-05-09 2023-09-22 国立研究開発法人産業技術総合研究所 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
DE102019112985B4 (de) 2019-05-16 2024-07-18 mi2-factory GmbH Verfahren zur Herstellung von Halbleiterbauelementen

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