JP2022509272A - 新規性のあるキャパシタ構造およびそれを形成する方法 - Google Patents
新規性のあるキャパシタ構造およびそれを形成する方法 Download PDFInfo
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- 239000003990 capacitor Substances 0.000 title claims abstract description 99
- 239000000758 substrate Substances 0.000 claims abstract description 117
- 238000000034 method Methods 0.000 claims description 55
- 230000008569 process Effects 0.000 claims description 42
- 229910052710 silicon Inorganic materials 0.000 claims description 16
- 239000010703 silicon Substances 0.000 claims description 16
- 239000002019 doping agent Substances 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 239000003989 dielectric material Substances 0.000 claims description 3
- 238000010884 ion-beam technique Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 239000004065 semiconductor Substances 0.000 description 15
- 239000000463 material Substances 0.000 description 10
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 8
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 238000005240 physical vapour deposition Methods 0.000 description 8
- 238000000231 atomic layer deposition Methods 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 229910017109 AlON Inorganic materials 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
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- 150000004706 metal oxides Chemical class 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
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- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
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- 150000001875 compounds Chemical class 0.000 description 2
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- 238000000609 electron-beam lithography Methods 0.000 description 2
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- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
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- 230000001070 adhesive effect Effects 0.000 description 1
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005352 clarification Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
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- 238000010586 diagram Methods 0.000 description 1
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- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/24—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0805—Capacitors only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
- H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
102 基板
102a 頂面(または第1の主表面)
102b 底面(または第2の主表面)
104 絶縁構造
104a~104d 絶縁構造
106 コンタクト
108 第1および第2の導電プレート
108a/108c 第1の導電プレート
108b/108d 第2の導電プレート
110 ドーパント領域
112 誘電体層
114 トレンチ
114a~114d トレンチ
116 導電線
116a~116d 導電線
200 集積回路チップ
202 メモリセル領域
204 境界
300 プロセス
Claims (20)
- 対向する第1および第2の主表面を有する基板と、
前記基板内に形成され、前記基板の前記第1の主表面から前記第2の主表面まで延在する少なくとも2つの導電プレートと、
前記少なくとも2つの導電プレートのうちの2つの隣接する導電プレートの間に形成され、前記第1の主表面から前記第2の主表面まで延在する少なくとも1つの絶縁構造と
を備える、キャパシタ。 - 前記導電プレートおよび前記絶縁構造は、閉形状であり、前記基板内に同心円状に配置構成される、請求項1に記載のキャパシタ。
- 前記少なくとも2つの導電プレートのうちの第1の導電プレートは、第1の極性と電気的に結合され、前記少なくとも2つの導電プレートのうちの第2の導電プレートは、第2の極性と電気的に結合される、請求項1に記載のキャパシタ。
- 前記少なくとも2つの導電プレートは、P型ドーパントまたはN型ドーパントを有するシリコンから作製される、請求項1に記載のキャパシタ。
- 前記少なくとも2つの導電プレートは、金属から作製される、請求項1に記載のキャパシタ。
- 前記少なくとも2つの導電プレートおよび前記少なくとも1つの絶縁構造は、先細りであり、交差配置されている、請求項1に記載のキャパシタ。
- 前記少なくとも2つの導電プレートは、前記第1の主表面で第1の限界寸法を、前記第2の主表面で第2の限界寸法を備え、前記第1の限界寸法は前記第2の限界寸法よりも大きい、請求項6に記載のキャパシタ。
- 前記少なくとも1つの絶縁構造は、前記第1の主表面で頂部限界寸法を、前記第2の主表面で底部限界寸法を備え、前記頂部限界寸法は前記底部限界寸法よりも小さい、請求項6に記載のキャパシタ。
- 前記少なくとも2つの導電プレートおよび前記少なくとも1つの絶縁構造は、前記第1の主表面および前記第2の主表面で同一平面にある、請求項1に記載のキャパシタ。
- 前記基板の前記第1の主表面の上に形成された誘電体層であって、前記誘電体層は頂面と底面とを備え、前記底面は前記第1の主表面と直接接触している、誘電体層と、
前記誘電体層内に形成された複数のコンタクトであって、前記複数のコンタクトは前記少なくとも2つの導電プレート内にさらに貫入する、複数のコンタクトと
をさらに備える、請求項1に記載のキャパシタ。 - 前記複数のコンタクトは、先細りである、請求項10に記載のキャパシタ。
- 前記複数のコンタクトは、前記誘電体層の前記頂面で頂部限界寸法を、前記誘電体層の前記底面で底部限界寸法を備え、前記頂部限界寸法は前記底部限界寸法よりも大きい、請求項11に記載のキャパシタ。
- 対向する第1および第2の主表面を有する基板と、
前記基板の前記第1の主表面の第1の位置に形成されているトランジスタと、
前記基板の第2の位置に形成されているキャパシタであって、
前記基板内に形成され、前記基板の前記第1の主表面から前記第2の主表面まで延在する少なくとも2つの導電プレートと、
前記少なくとも2つの導電プレートのうちの2つの隣接する導電プレートの間に形成され、前記第1の主表面から前記第2の主表面まで延在する少なくとも1つの絶縁構造と
を備えるキャパシタと
を備える、集積回路(IC)チップ。 - 前記導電プレートおよび前記絶縁構造は、閉形状であり、前記基板内に同心円状に配置構成される、請求項13に記載のICチップ。
- 前記少なくとも2つの導電プレートのうちの第1の導電プレートは、第1の極性と電気的に結合され、前記少なくとも2つの導電プレートのうちの第2の導電プレートは、第2の極性と電気的に結合される、請求項13に記載のICチップ。
- 前記少なくとも2つのプレートは、P型ドーパントまたはN型ドーパントを有するシリコンから作製される、請求項13に記載のICチップ。
- 第1の主表面から基板内にドープ領域を形成するステップと、
前記基板の前記ドープ領域の上に絶縁層を形成するステップと、
前記絶縁層内に複数のコンタクトを形成するステップであって、前記複数のコンタクトは前記ドープ領域内に貫入する、ステップと、
第2の主表面から前記基板の一部分を除去するステップと、
前記第2の主表面から前記基板をエッチングすることを通じて前記基板の前記ドープ領域内に複数のトレンチおよび導電線を形成するステップであって、前記トレンチは前記基板を通過して前記絶縁層を露出させ、前記導電線は前記トレンチによって相隔てて並び、前記コンタクトは前記導電線に直接接触している、ステップと、
前記複数のトレンチに誘電体材料を充填するステップと
を含む、方法。 - 表面平坦化プロセスを実行して前記基板の前記第2の主表面の上の過剰な誘電体材料を除去するステップをさらに含む、請求項17に記載の方法。
- 前記基板の前記一部分を除去するステップは、ドープされていない前記基板の前記一部分を除去するステップを含む、請求項17に記載の方法。
- 前記第1の主表面から前記基板内に前記ドープ領域を形成するステップは、イオンのビームを前記基板の前記第1の主表面上に誘導して前記基板内に前記ドープ領域を形成するステップを含む、請求項17に記載の方法。
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WO2022047645A1 (en) * | 2020-09-02 | 2022-03-10 | Yangtze Memory Technologies Co., Ltd. | Methods for forming on-chip capacitor structures in semiconductor devices |
WO2022047644A1 (en) * | 2020-09-02 | 2022-03-10 | Yangtze Memory Technologies Co., Ltd. | On-chip capacitor structures in semiconductor devices |
US11973110B2 (en) * | 2021-05-06 | 2024-04-30 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and method of forming the same |
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CN110622305B (zh) | 2021-03-23 |
JP7181406B2 (ja) | 2022-11-30 |
US11887646B2 (en) | 2024-01-30 |
KR102642279B1 (ko) | 2024-02-28 |
EP3853896A4 (en) | 2022-06-08 |
TW202032801A (zh) | 2020-09-01 |
CN110622305A (zh) | 2019-12-27 |
TWI743464B (zh) | 2021-10-21 |
EP3853896A1 (en) | 2021-07-28 |
US20220101906A1 (en) | 2022-03-31 |
KR20210079335A (ko) | 2021-06-29 |
US20220059152A1 (en) | 2022-02-24 |
WO2020168453A1 (en) | 2020-08-27 |
US20200265886A1 (en) | 2020-08-20 |
US11232825B2 (en) | 2022-01-25 |
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