JP2021069112A5 - - Google Patents

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Publication number
JP2021069112A5
JP2021069112A5 JP2020169542A JP2020169542A JP2021069112A5 JP 2021069112 A5 JP2021069112 A5 JP 2021069112A5 JP 2020169542 A JP2020169542 A JP 2020169542A JP 2020169542 A JP2020169542 A JP 2020169542A JP 2021069112 A5 JP2021069112 A5 JP 2021069112A5
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JP
Japan
Prior art keywords
inverted
control signal
count value
complement
counting
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JP2020169542A
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English (en)
Japanese (ja)
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JP2021069112A (ja
JP7582596B2 (ja
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Priority claimed from KR1020190129942A external-priority patent/KR102946263B1/ko
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Publication of JP7582596B2 publication Critical patent/JP7582596B2/ja
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JP2020169542A 2019-10-18 2020-10-07 カウンター回路、及びそれを含むイメージセンサ Active JP7582596B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2019-0129942 2019-10-18
KR1020190129942A KR102946263B1 (ko) 2019-10-18 2019-10-18 카운터 회로 및 그것을 포함하는 이미지 센서
US16/908,980 2020-06-23
US16/908,980 US11451731B2 (en) 2019-10-18 2020-06-23 Counter circuit and image sensor including the same

Publications (3)

Publication Number Publication Date
JP2021069112A JP2021069112A (ja) 2021-04-30
JP2021069112A5 true JP2021069112A5 (enExample) 2023-09-20
JP7582596B2 JP7582596B2 (ja) 2024-11-13

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JP2020169542A Active JP7582596B2 (ja) 2019-10-18 2020-10-07 カウンター回路、及びそれを含むイメージセンサ

Country Status (4)

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US (1) US11451731B2 (enExample)
EP (1) EP3962070B1 (enExample)
JP (1) JP7582596B2 (enExample)
KR (1) KR102946263B1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024259802A1 (zh) * 2023-06-19 2024-12-26 思特威(上海)电子科技股份有限公司 图像传感器及其读出电路
TW202510513A (zh) * 2023-08-28 2025-03-01 南韓商三星電子股份有限公司 雙向計數器和產生輸出資料的方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3872466A (en) * 1973-07-19 1975-03-18 Analog Devices Inc Integrating analog-to-digital converter having digitally-derived offset error compensation and bipolar operation without zero discontinuity
JP4853445B2 (ja) * 2007-09-28 2012-01-11 ソニー株式会社 A/d変換回路、固体撮像素子、およびカメラシステム
KR101621244B1 (ko) * 2009-02-13 2016-05-16 삼성전자주식회사 카운터 회로, 이를 포함하는 장치 및 카운팅 방법
KR101365408B1 (ko) 2009-03-03 2014-02-19 삼성전자주식회사 카운터 회로, 이를 포함하는 물리량 측정 장치 및 카운팅 방법
JP5254140B2 (ja) * 2009-07-14 2013-08-07 株式会社東芝 A/d変換器及びそれを備えた固体撮像装置
KR101647366B1 (ko) * 2009-09-25 2016-08-11 삼성전자주식회사 카운터 회로, 이를 포함하는 장치 및 카운팅 방법
US8586903B2 (en) 2009-11-23 2013-11-19 Samsung Electronics Co., Ltd. Counter circuits, analog to digital converters, image sensors and digital imaging systems including the same
US8969770B2 (en) 2011-05-02 2015-03-03 Semiconductor Components Industries, Llc Correlated double sampling to include a controller to increment and invert a count during a first period and a second period
US8576979B2 (en) 2011-10-11 2013-11-05 Omnivision Technologies, Inc. Arithmetic counter circuit, configuration and application for high performance CMOS image sensors
JP6019793B2 (ja) 2012-06-20 2016-11-02 ソニー株式会社 カウンタ、カウント方法、ad変換装置、固体撮像素子、および電子装置
KR102135684B1 (ko) 2013-07-24 2020-07-20 삼성전자주식회사 카운터 회로, 이를 포함하는 아날로그-디지털 컨버터, 이미지 센서 및 이를 이용하는 상관 이중 샘플링 방법
KR102082288B1 (ko) 2013-12-12 2020-02-27 에스케이하이닉스 주식회사 이중 데이터 레이트 카운터 및 그를 이용한 아날로그-디지털 변환 장치와 씨모스 이미지 센서
US9960783B2 (en) 2015-09-18 2018-05-01 Taiwan Semiconductor Manufacturing Company Ltd. Conditional correlated multiple sampling single slope analog-to-digital converter, and associated image sensor system and method
US9774333B2 (en) 2015-10-14 2017-09-26 Stmicroelectronics (Grenoble 2) Sas Counter circuit

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