JP2020507176A5 - - Google Patents
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- Publication number
- JP2020507176A5 JP2020507176A5 JP2019562234A JP2019562234A JP2020507176A5 JP 2020507176 A5 JP2020507176 A5 JP 2020507176A5 JP 2019562234 A JP2019562234 A JP 2019562234A JP 2019562234 A JP2019562234 A JP 2019562234A JP 2020507176 A5 JP2020507176 A5 JP 2020507176A5
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- interrupt
- signal
- flop
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 8
- 238000012790 confirmation Methods 0.000 claims 6
- 230000001360 synchronised effect Effects 0.000 claims 4
- 230000007704 transition Effects 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/420,267 | 2017-01-31 | ||
| US15/420,267 US10788853B2 (en) | 2017-01-31 | 2017-01-31 | Interrupt handling method and apparatus for slow peripherals |
| PCT/US2018/016206 WO2018144583A1 (en) | 2017-01-31 | 2018-01-31 | Interrupt handling method and apparatus for slow peripherals |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2020507176A JP2020507176A (ja) | 2020-03-05 |
| JP2020507176A5 true JP2020507176A5 (enExample) | 2021-03-11 |
Family
ID=62979832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019562234A Pending JP2020507176A (ja) | 2017-01-31 | 2018-01-31 | 低速周辺機器のための中断処理方法及び装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US10788853B2 (enExample) |
| EP (1) | EP3577557A4 (enExample) |
| JP (1) | JP2020507176A (enExample) |
| CN (2) | CN119024924A (enExample) |
| WO (1) | WO2018144583A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3109227B1 (fr) | 2020-04-14 | 2022-05-06 | St Microelectronics Alps Sas | Contrôleur d’interruption et procédé de gestion d’un tel contrôleur |
| CN113885654A (zh) * | 2020-07-03 | 2022-01-04 | 富泰华工业(深圳)有限公司 | 跨时钟域信号传输方法、电路及电子装置 |
| US11200184B1 (en) * | 2020-12-22 | 2021-12-14 | Industrial Technology Research Institute | Interrupt control device and interrupt control method between clock domains |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR920003152A (ko) | 1990-07-31 | 1992-02-29 | 이헌조 | 다중 인터럽트 처리회로 |
| US5900753A (en) * | 1997-03-28 | 1999-05-04 | Logicvision, Inc. | Asynchronous interface |
| US6507609B1 (en) | 1999-01-20 | 2003-01-14 | Advanced Micro Devices, Inc. | Mechanism for capturing and reporting interrupt events of different clock domains |
| JP2001184298A (ja) * | 1999-12-27 | 2001-07-06 | Toshiba Corp | 非同期割り込み通知回路及び方法 |
| JP2002041452A (ja) | 2000-07-27 | 2002-02-08 | Hitachi Ltd | マイクロプロセッサ、半導体モジュール及びデータ処理システム |
| GB2368671B (en) * | 2000-11-03 | 2004-08-18 | Advanced Risc Mach Ltd | A logic unit and integrated circuit for clearing interrupts |
| US6823413B2 (en) | 2001-06-08 | 2004-11-23 | Oki Electronic Industry Co., Ltd. | Interrupt signal processing apparatus |
| US8284879B2 (en) | 2003-06-25 | 2012-10-09 | Nxp B.V. | Lossless transfer of events across clock domains |
| US20060064529A1 (en) | 2004-09-23 | 2006-03-23 | International Business Machines Corporation | Method and system for controlling peripheral adapter interrupt frequency by transferring processor load information to the peripheral adapter |
| DE102007023442B3 (de) * | 2007-05-19 | 2008-10-09 | Atmel Germany Gmbh | Vorrichtung und Verfahren zum Erzeugen eines Quittiersignals |
| US7934113B2 (en) | 2007-05-21 | 2011-04-26 | Texas Instruments Incorporated | Self-clearing asynchronous interrupt edge detect latching register |
| JP2009282780A (ja) * | 2008-05-22 | 2009-12-03 | Atmel Germany Gmbh | 受領信号の形成装置 |
| JP4912511B2 (ja) | 2010-03-16 | 2012-04-11 | 三菱電機株式会社 | 速度検出装置 |
| CN103631649B (zh) * | 2012-08-24 | 2018-08-28 | 深圳市中兴微电子技术有限公司 | 中断处理方法、装置及中断控制器 |
| US10014041B1 (en) * | 2016-12-23 | 2018-07-03 | Texas Instruments Incorporated | Integrated circuits, methods and interface circuitry to synchronize data transfer between high and low speed clock domains |
| CN113885654A (zh) * | 2020-07-03 | 2022-01-04 | 富泰华工业(深圳)有限公司 | 跨时钟域信号传输方法、电路及电子装置 |
| US11200184B1 (en) * | 2020-12-22 | 2021-12-14 | Industrial Technology Research Institute | Interrupt control device and interrupt control method between clock domains |
-
2017
- 2017-01-31 US US15/420,267 patent/US10788853B2/en active Active
-
2018
- 2018-01-31 JP JP2019562234A patent/JP2020507176A/ja active Pending
- 2018-01-31 CN CN202411125272.4A patent/CN119024924A/zh active Pending
- 2018-01-31 EP EP18747681.7A patent/EP3577557A4/en not_active Withdrawn
- 2018-01-31 WO PCT/US2018/016206 patent/WO2018144583A1/en not_active Ceased
- 2018-01-31 CN CN201880009131.2A patent/CN110249309B/zh active Active
-
2020
- 2020-08-18 US US16/995,852 patent/US12105550B2/en active Active
-
2024
- 2024-08-14 US US18/804,364 patent/US20240411341A1/en active Pending
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