JP2018082055A - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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Abstract
Description
本発明にかかる半導体装置は、ワイドバンドギャップ半導体を用いて構成される。実施の形態においては、ワイドバンドギャップ半導体として例えば炭化珪素(SiC)を用いて作製された炭化珪素半導体装置について、MOSFETを例に説明する。図1Aおよび図1Bは、実施の形態にかかる炭化珪素半導体装置の構成を示す断面図である。図1Aは、図2Bの切断線H−H’または図2AのG−G’における断面構造であり、図1Bは、図2Bの切断線F−F’または図2AのE−E’における断面構造である。
次に、実施の形態にかかる炭化珪素半導体装置の製造方法について説明する。図3〜図8は、実施の形態にかかる炭化珪素半導体装置の製造途中の状態を模式的に示す断面図である。図4Aは、実施の形態にかかる炭化珪素半導体装置の図1Aに対応する製造途中の状態を模式的に示す断面図である。図4Bは、実施の形態にかかる炭化珪素半導体装置の図1Bに対応する製造途中の状態を模式的に示す断面図である。また、図5Aは、実施の形態にかかる炭化珪素半導体装置の図1Aに対応する製造途中の状態を模式的に示す断面図である。図5Bは、実施の形態にかかる炭化珪素半導体装置の図1Bに対応する製造途中の状態を模式的に示す断面図である。
2 n-型炭化珪素エピタキシャル層
3 p+型ベース領域
3a 第1p+型ベース領域
3b 第2p+型ベース領域
5 n型領域
5a 第1n型領域
5b 第2n型領域
6 p型ベース層
7 n+型ソース領域
8 p++型コンタクト領域
9 ゲート絶縁膜
10 ゲート電極
11 層間絶縁膜
12 ソース電極
13 ソース電極パッド
14 ドレイン電極
15 ドレイン電極パッド
16 トレンチ
Claims (7)
- シリコンよりもバンドギャップが広い半導体からなる第1導電型のワイドバンドギャップ半導体基板と、
前記ワイドバンドギャップ半導体基板のおもて面に設けられた、シリコンよりもバンドギャップが広い半導体からなる、前記ワイドバンドギャップ半導体基板より低不純物濃度の第1導電型のワイドバンドギャップ半導体層と、
前記第1導電型のワイドバンドギャップ半導体層の前記ワイドバンドギャップ半導体基板側に対して反対側の表面層に選択的に設けられた第2導電型のベース領域と、
前記第1導電型のワイドバンドギャップ半導体層の前記ワイドバンドギャップ半導体基板に対して反対側の表面に設けられた、第2導電型のワイドバンドギャップ半導体層と、
前記第2導電型のワイドバンドギャップ半導体層の内部に選択的に設けられた第1導電型のソース領域と、
前記ソース領域および前記第2導電型のワイドバンドギャップ半導体層を貫通して前記第1導電型のワイドバンドギャップ半導体層に達するトレンチと、
前記トレンチ内部にゲート絶縁膜を介して設けられたゲート電極と、
前記第2導電型のワイドバンドギャップ半導体層および前記ソース領域に接触するソース電極と、
前記ワイドバンドギャップ半導体基板の裏面に設けられたドレイン電極と、
を備え、
前記トレンチはストライプ状の平面パターンを有し、
前記ベース領域は前記トレンチと平行な方向のみに周期的に設けられ、
前記ベース領域の一部は、前記トレンチの下部で、前記トレンチと平行な方向に延在し、前記ベース領域同士が接続されていることを特徴とする半導体装置。 - 前記ベース領域の一部は、前記トレンチの深さと反対の方向に延在し、前記第2導電型のワイドバンドギャップ半導体層と接続されていることを特徴とする請求項1に記載の半導体装置。
- 前記トレンチの下部の前記ベース領域の幅は前記トレンチの幅よりも広いことを特徴とする請求項1または2に記載の半導体装置。
- 前記第1導電型のワイドバンドギャップ半導体層の前記ワイドバンドギャップ半導体基板側に対して反対側の表面に、前記第1導電型のワイドバンドギャップ半導体層の不純物濃度より濃い領域が形成されていることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置。
- 前記第1導電型のワイドバンドギャップ半導体層の前記ワイドバンドギャップ半導体基板側に対して反対側の表面に形成された不純物濃度より濃い領域の底面の少なくとも一部が、第2導電型の前記ベース領域の底面より前記ワイドバンドギャップ半導体基板側に突出していることを特徴とする請求項1〜4のいずれか一つに記載の半導体装置。
- 前記第1導電型のワイドバンドギャップ半導体層の前記ワイドバンドギャップ半導体基板側に対して反対側の表面に形成された不純物濃度より濃い領域の少なくとも一部にさらに濃い領域が形成されていることを特徴とする請求項4に記載の半導体装置。
- シリコンよりもバンドギャップが広い半導体からなる第1導電型のワイドバンドギャップ半導体基板のおもて面に、前記ワイドバンドギャップ半導体基板より低不純物濃度の第1導電型のワイドバンドギャップ半導体層を形成する工程と、
前記第1導電型のワイドバンドギャップ半導体層の表面層に、第2導電型のベース領域を選択的に形成する工程と、
前記第1導電型のワイドバンドギャップ半導体層の表面層に、第1導電型の領域を形成する工程と、
前記第1導電型のワイドバンドギャップ半導体層の表面に、第2導電型のワイドバンドギャップ半導体層を形成する工程と、
前記第2導電型のワイドバンドギャップ半導体層の内部に第1導電型のソース領域を選択的に形成する工程と、
前記ソース領域および前記第2導電型のワイドバンドギャップ半導体層を貫通して前記第1導電型のワイドバンドギャップ半導体層に達する、ストライプ状の平面パターンを有するトレンチを形成する工程と、
前記トレンチの内部にゲート絶縁膜を介してゲート電極を形成する工程と、
前記第2導電型のワイドバンドギャップ半導体層および前記ソース領域に接するソース電極を形成する工程と、
前記ワイドバンドギャップ半導体基板の裏面にドレイン電極を形成する工程と、
を含み、
前記ベース領域を選択的に形成する工程は、前記ベース領域を前記トレンチと平行な方向のみに周期的に形成し、前記トレンチの下部で、前記ベース領域同士を接続する領域を形成することを特徴とする半導体装置の製造方法。
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