JP2018046158A - 半導体モジュールおよび半導体モジュールの製造方法 - Google Patents
半導体モジュールおよび半導体モジュールの製造方法 Download PDFInfo
- Publication number
- JP2018046158A JP2018046158A JP2016180013A JP2016180013A JP2018046158A JP 2018046158 A JP2018046158 A JP 2018046158A JP 2016180013 A JP2016180013 A JP 2016180013A JP 2016180013 A JP2016180013 A JP 2016180013A JP 2018046158 A JP2018046158 A JP 2018046158A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- resin case
- semiconductor module
- hole
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 83
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229920005989 resin Polymers 0.000 claims abstract description 148
- 239000011347 resin Substances 0.000 claims abstract description 148
- 238000007747 plating Methods 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 23
- 238000000465 moulding Methods 0.000 claims abstract description 22
- 238000005452 bending Methods 0.000 claims abstract description 16
- 238000007789 sealing Methods 0.000 claims abstract description 12
- 239000011248 coating agent Substances 0.000 claims abstract description 9
- 238000000576 coating method Methods 0.000 claims abstract description 9
- 238000003780 insertion Methods 0.000 claims abstract description 5
- 230000037431 insertion Effects 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 22
- 238000003466 welding Methods 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 17
- 230000008569 process Effects 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 229920001707 polybutylene terephthalate Polymers 0.000 description 5
- 239000004734 Polyphenylene sulfide Substances 0.000 description 4
- 229920000069 polyphenylene sulfide Polymers 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 238000005304 joining Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- -1 polybutylene terephthalate Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4817—Conductive parts for containers, e.g. caps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/54—Providing fillings in containers, e.g. gas fillings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
【解決手段】半導体素子と、金属被膜が表面に形成され、屈曲部を有する端子と、端子が固定され、端子と対向する貫通孔が形成されており、半導体素子を収容する樹脂ケースと、貫通孔内に設けられた締結部と、貫通孔内に設けられ、締結部を支持する支持部と、を備える半導体モジュールを提供する。端子を曲げ加工する曲げ加工段階と、曲げ加工された端子をめっき処理するめっき処理段階と、めっき処理された端子を装填した後に成形金型に樹脂を注入して、端子と対向する貫通孔が形成された樹脂ケースを成形する樹脂成形段階と、貫通孔に締結部と、該締結部を支持する支持部とを挿入する挿入段階と、樹脂ケース内に半導体素子を収容して封止する封止段階と、を備える半導体モジュールの製造方法を提供する。
【選択図】図2
Description
[先行技術文献]
[特許文献]
[特許文献1] 特開2010−98036号公報
[特許文献2] 特開2007−36896号公報
準備段階が、曲げ加工段階と、めっき処理段階と、樹脂成形段階とを更に備えてよい。曲げ加工段階は、端子を曲げ加工してよい。めっき処理段階は、曲げ加工された端子をめっき処理してよい。樹脂成形段階は、めっき処理された端子を装填した後に成形金型に樹脂を注入して、樹脂ケースを成形してよい。樹脂ケースは、端子と対向する貫通孔が形成されてよい。
Claims (10)
- 半導体素子と、
金属被膜が表面に形成され、屈曲部を有する端子と、
前記端子が固定され、前記端子と対向する貫通孔が形成されており、前記半導体素子を収容する樹脂ケースと、
前記貫通孔内に設けられた締結部と、
前記貫通孔内に設けられ、前記締結部を支持する支持部と、
を備える半導体モジュール。 - 前記支持部は、樹脂で形成されており、
前記樹脂ケースと前記支持部とを固定する固定部を備える、
請求項1に記載の半導体モジュール。 - 前記締結部は、前記端子と離間するように前記貫通孔内に配置される、
請求項2に記載の半導体モジュール。 - 前記貫通孔内において、前記締結部と前記端子との間には、樹脂が存在しない、
請求項2または3に記載の半導体モジュール。 - 前記支持部の上端は、前記樹脂ケースのおもて面より低い、
請求項2から4の何れか1項に記載の半導体モジュール。 - 前記支持部は、前記締結部と結合するボルトを収容する凹部が形成されており、
前記支持部の上端から前記凹部の底部までの距離が、前記支持部の上端から前記固定部までの距離より長い、
請求項2から5の何れか1項に記載の半導体モジュール。 - 前記屈曲部において前記金属被膜に割れが存在しない
請求項1から6の何れか1項に記載の半導体モジュール。 - めっき処理され、屈曲部を有する端子と、前記端子が固定され、前記端子と対向する貫通孔が形成されている樹脂ケースと、を準備する準備段階と、
前記貫通孔に締結部と、該締結部を支持する支持部とを挿入する挿入段階と、
前記樹脂ケース内に半導体素子を収容して封止する封止段階と、
を備える半導体モジュールの製造方法。 - 前記準備段階が、
端子を曲げ加工する曲げ加工段階と、
曲げ加工された端子をめっき処理するめっき処理段階と、
めっき処理された端子を装填した後に成形金型に樹脂を注入して、前記端子と対向する貫通孔が形成された樹脂ケースを成形する樹脂成形段階と、を更に備える、
請求項8に記載の半導体モジュールの製造方法。 - 前記支持部と前記樹脂ケースとを超音波溶着する溶着段階を更に備える、
請求項8に記載の半導体モジュールの製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016180013A JP6750416B2 (ja) | 2016-09-14 | 2016-09-14 | 半導体モジュールおよび半導体モジュールの製造方法 |
US15/659,632 US10381243B2 (en) | 2016-09-14 | 2017-07-26 | Semiconductor module having supporting portion for fastening portion inside a through hole in a resin case |
CN201710622730.9A CN107818955B (zh) | 2016-09-14 | 2017-07-27 | 半导体模块及半导体模块的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016180013A JP6750416B2 (ja) | 2016-09-14 | 2016-09-14 | 半導体モジュールおよび半導体モジュールの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018046158A true JP2018046158A (ja) | 2018-03-22 |
JP6750416B2 JP6750416B2 (ja) | 2020-09-02 |
Family
ID=61560326
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016180013A Active JP6750416B2 (ja) | 2016-09-14 | 2016-09-14 | 半導体モジュールおよび半導体モジュールの製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10381243B2 (ja) |
JP (1) | JP6750416B2 (ja) |
CN (1) | CN107818955B (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020129610A (ja) * | 2019-02-08 | 2020-08-27 | 富士電機株式会社 | 半導体モジュールの外部接続部、半導体モジュール、外部接続端子、および半導体モジュールの外部接続端子の製造方法 |
WO2022049660A1 (ja) * | 2020-09-02 | 2022-03-10 | 三菱電機株式会社 | 半導体装置、電力変換装置、および移動体 |
WO2023157482A1 (ja) * | 2022-02-21 | 2023-08-24 | 富士電機株式会社 | 半導体モジュール、半導体装置、及び半導体装置の製造方法 |
WO2023188550A1 (ja) * | 2022-03-28 | 2023-10-05 | 株式会社日立パワーデバイス | パワー半導体モジュール及びそれを用いた電力変換装置 |
WO2024190588A1 (ja) * | 2023-03-14 | 2024-09-19 | 新電元工業株式会社 | 半導体モジュール |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109546871B (zh) * | 2018-12-29 | 2020-12-22 | 广东美的制冷设备有限公司 | 用于空调器的功率集成模块及其制造方法 |
JP7562965B2 (ja) * | 2020-03-10 | 2024-10-08 | 富士電機株式会社 | 製造方法、製造装置、治具アセンブリ、半導体モジュールおよび車両 |
JP7435417B2 (ja) * | 2020-11-20 | 2024-02-21 | 三菱電機株式会社 | 半導体装置用インサートケースの製造方法及び半導体装置 |
JP2023061445A (ja) * | 2021-10-20 | 2023-05-02 | 富士電機株式会社 | 半導体装置及びその製造方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59181719U (ja) * | 1983-05-24 | 1984-12-04 | 株式会社日立ホームテック | 樹脂成形品の固定構造 |
JPH03166996A (ja) * | 1989-11-25 | 1991-07-18 | Hitachi Maxell Ltd | 半導体カードならびにその製造方法 |
JP2002076255A (ja) * | 2000-08-29 | 2002-03-15 | Mitsubishi Electric Corp | 電力用半導体装置 |
US20020190374A1 (en) * | 2001-06-19 | 2002-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
JP2006100327A (ja) * | 2004-09-28 | 2006-04-13 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2010098036A (ja) * | 2008-10-15 | 2010-04-30 | Fuji Electric Systems Co Ltd | 樹脂ケース及び樹脂ケース製造方法 |
JP2012209396A (ja) * | 2011-03-29 | 2012-10-25 | Shinko Electric Ind Co Ltd | リードフレーム及び半導体装置 |
WO2013157467A1 (ja) * | 2012-04-16 | 2013-10-24 | 富士電機株式会社 | 半導体装置および半導体装置用冷却器 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5229641A (en) * | 1989-11-25 | 1993-07-20 | Hitachi Maxell, Ltd. | Semiconductor card and manufacturing method therefor |
JPH0969603A (ja) | 1995-09-01 | 1997-03-11 | Mitsubishi Electric Corp | 電力用半導体装置、その外装ケースとその製造方法 |
JP2003188344A (ja) | 2001-12-19 | 2003-07-04 | Toyota Motor Corp | パワーモジュール |
JP3813098B2 (ja) * | 2002-02-14 | 2006-08-23 | 三菱電機株式会社 | 電力用半導体モジュール |
JP4007143B2 (ja) * | 2002-10-09 | 2007-11-14 | 日産自動車株式会社 | 電子部品、電子部品の製造方法及び製造装置 |
JP2005277012A (ja) | 2004-03-24 | 2005-10-06 | Mitsubishi Electric Corp | 電力用半導体装置およびその製造方法 |
US20060006705A1 (en) * | 2004-06-29 | 2006-01-12 | Charbonneau Daniel J | Seat pocket storage apparatus |
JP2007036896A (ja) | 2005-07-28 | 2007-02-08 | Kyocera Kinseki Corp | 圧電部品用容器 |
CN101278383B (zh) * | 2005-11-02 | 2011-04-13 | 松下电器产业株式会社 | 电子电路装置及其制造方法 |
JP4876818B2 (ja) * | 2006-09-22 | 2012-02-15 | 大日本印刷株式会社 | 樹脂封止型半導体装置とその製造方法 |
KR101175227B1 (ko) * | 2011-06-27 | 2012-08-21 | 매그나칩 반도체 유한회사 | 패키지 |
JP5767921B2 (ja) | 2011-09-15 | 2015-08-26 | 新電元工業株式会社 | 半導体装置 |
JPWO2013084589A1 (ja) * | 2011-12-08 | 2015-04-27 | 富士電機株式会社 | 半導体装置および半導体装置製造方法 |
US8851379B2 (en) * | 2012-06-29 | 2014-10-07 | Intel Corporation | Method and system for decoding small sized barcodes from blurred images |
JP2015023226A (ja) | 2013-07-23 | 2015-02-02 | 三菱電機株式会社 | ワイドギャップ半導体装置 |
-
2016
- 2016-09-14 JP JP2016180013A patent/JP6750416B2/ja active Active
-
2017
- 2017-07-26 US US15/659,632 patent/US10381243B2/en active Active
- 2017-07-27 CN CN201710622730.9A patent/CN107818955B/zh active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59181719U (ja) * | 1983-05-24 | 1984-12-04 | 株式会社日立ホームテック | 樹脂成形品の固定構造 |
JPH03166996A (ja) * | 1989-11-25 | 1991-07-18 | Hitachi Maxell Ltd | 半導体カードならびにその製造方法 |
JP2002076255A (ja) * | 2000-08-29 | 2002-03-15 | Mitsubishi Electric Corp | 電力用半導体装置 |
US6521983B1 (en) * | 2000-08-29 | 2003-02-18 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device for electric power |
US20020190374A1 (en) * | 2001-06-19 | 2002-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
JP2003007966A (ja) * | 2001-06-19 | 2003-01-10 | Mitsubishi Electric Corp | 半導体装置 |
JP2006100327A (ja) * | 2004-09-28 | 2006-04-13 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2010098036A (ja) * | 2008-10-15 | 2010-04-30 | Fuji Electric Systems Co Ltd | 樹脂ケース及び樹脂ケース製造方法 |
JP2012209396A (ja) * | 2011-03-29 | 2012-10-25 | Shinko Electric Ind Co Ltd | リードフレーム及び半導体装置 |
WO2013157467A1 (ja) * | 2012-04-16 | 2013-10-24 | 富士電機株式会社 | 半導体装置および半導体装置用冷却器 |
US20140376184A1 (en) * | 2012-04-16 | 2014-12-25 | Fuji Electric Co. Ltd. | Semiconductor device and cooler thereof |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020129610A (ja) * | 2019-02-08 | 2020-08-27 | 富士電機株式会社 | 半導体モジュールの外部接続部、半導体モジュール、外部接続端子、および半導体モジュールの外部接続端子の製造方法 |
JP7354550B2 (ja) | 2019-02-08 | 2023-10-03 | 富士電機株式会社 | 半導体モジュールの外部接続部、半導体モジュール、外部接続端子、および半導体モジュールの外部接続端子の製造方法 |
WO2022049660A1 (ja) * | 2020-09-02 | 2022-03-10 | 三菱電機株式会社 | 半導体装置、電力変換装置、および移動体 |
JPWO2022049660A1 (ja) * | 2020-09-02 | 2022-03-10 | ||
JP7403671B2 (ja) | 2020-09-02 | 2023-12-22 | 三菱電機株式会社 | 半導体装置、電力変換装置、および移動体 |
WO2023157482A1 (ja) * | 2022-02-21 | 2023-08-24 | 富士電機株式会社 | 半導体モジュール、半導体装置、及び半導体装置の製造方法 |
WO2023188550A1 (ja) * | 2022-03-28 | 2023-10-05 | 株式会社日立パワーデバイス | パワー半導体モジュール及びそれを用いた電力変換装置 |
WO2024190588A1 (ja) * | 2023-03-14 | 2024-09-19 | 新電元工業株式会社 | 半導体モジュール |
Also Published As
Publication number | Publication date |
---|---|
CN107818955B (zh) | 2023-07-18 |
US10381243B2 (en) | 2019-08-13 |
JP6750416B2 (ja) | 2020-09-02 |
US20180076053A1 (en) | 2018-03-15 |
CN107818955A (zh) | 2018-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6750416B2 (ja) | 半導体モジュールおよび半導体モジュールの製造方法 | |
JP5272768B2 (ja) | 電力用半導体装置とその製造方法 | |
US11502434B2 (en) | Power semiconductor module | |
KR20070104194A (ko) | 센서 장치 | |
US9941254B2 (en) | Semiconductor device | |
JP6866121B2 (ja) | 半導体モジュール | |
CN112913009A (zh) | 半导体装置以及引线框材料 | |
EP3499649A1 (en) | Power semiconductor module arrangement | |
US8242587B2 (en) | Electronic device and pressure sensor | |
JP2012134300A (ja) | 半導体装置 | |
CN115191155A (zh) | 电路结构体 | |
JP5392243B2 (ja) | 電子装置およびその製造方法 | |
JP4969430B2 (ja) | 圧力検出装置 | |
JP6666048B2 (ja) | 回路基板装置 | |
JP2007234694A (ja) | 半導体装置及び半導体装置の外部接続端子と外部電極との接合方法 | |
JP6567957B2 (ja) | パワー半導体モジュールの製造方法 | |
JP5990418B2 (ja) | 車載用電子制御装置およびその製造方法 | |
JP2011253942A (ja) | 半導体装置及びその製造方法 | |
JP7563285B2 (ja) | 半導体装置 | |
JP4783166B2 (ja) | 電気回路装置 | |
CN110168721B (zh) | 半导体装置以及半导体装置的制造方法 | |
JP6444451B2 (ja) | インサート樹脂成形品 | |
JP2016093062A (ja) | 電子装置 | |
JP2015012159A (ja) | 電子装置およびその製造方法 | |
CN116895628A (zh) | 具有垂直端子的半导体封装件模块 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190809 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20200529 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200609 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200703 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200714 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200727 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6750416 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |