JP2017523613A - 発光ダイオード - Google Patents
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- JP2017523613A JP2017523613A JP2017504022A JP2017504022A JP2017523613A JP 2017523613 A JP2017523613 A JP 2017523613A JP 2017504022 A JP2017504022 A JP 2017504022A JP 2017504022 A JP2017504022 A JP 2017504022A JP 2017523613 A JP2017523613 A JP 2017523613A
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
Abstract
Description
Claims (39)
- 基板と、
前記基板上に位置し、下部半導体層、前記下部半導体層の一領域上に配置された上部半導体層、及び前記下部半導体層と前記上部半導体層との間に配置された活性層を含む発光セルと、
前記上部半導体層上に配置された第1電極と、
前記下部半導体層上に配置された第2電極と、
前記第1電極の一部を露出させる第1開放領域を含む第1絶縁層と、
前記第1絶縁層上に配置された第2絶縁層と、
前記第1開放領域を介して第1電極とオーミック接触する第1バンプと、を含み、
前記第1バンプは、上面に第1凹部及び第1凸部を含み、
前記第1バンプは、前記上面に前記第1凹部の底面を含む第1領域と、上面に前記第1凸部の上面を含む第2領域と、を含み、
前記第1領域の少なくとも一部の領域は前記第1開放領域上に配置され、前記第2領域の少なくとも一部は第2絶縁層上に配置される発光ダイオード。 - 前記第1凹部の底面の面積は、前記第1開放領域を介して露出した前記第1電極の面積に比例する、請求項1に記載の発光ダイオード。
- 前記第1凹部の深さは、前記第1電極上に配置された前記第1絶縁層及び前記第2絶縁層の厚さに比例する、請求項1に記載の発光ダイオード。
- 前記第1凸部の上面の面積と前記第1凹部の底面の面積との和は、少なくとも前記第1開放領域を介して露出した前記第1電極の面積より大きい、請求項1に記載の発光ダイオード。
- 前記第1電極と前記第1バンプとの間に前記第1絶縁層及び前記第2絶縁層の一部が配置された、請求項1に記載の発光ダイオード。
- 前記第1開放領域を取り囲む前記第1絶縁層及び前記第2絶縁層の側面と、第1バンプの下端側面の少なくとも一部とは、当接している、請求項1に記載の発光ダイオード。
- 前記第1凸部は前記第1凹部を取り囲む、請求項1に記載の発光ダイオード。
- 前記第1絶縁層は、前記第2電極の一部を露出させる第2開放領域を含み、前記第2開放領域を介して前記第2電極とオーミック接触する第2バンプをさらに含み、
前記第2バンプは、前記上面に第2凹部及び第2凸部を含み、
前記第2バンプは、前記上面に前記第2凹部の底面を含む第3領域と、上面に前記第2凸部の上面を含む第4領域と、を含み、
前記第3領域の少なくとも一部の領域は前記第2開放領域上に配置され、前記第4領域の少なくとも一部は第2絶縁層上に配置される、請求項1に記載の発光ダイオード。 - 前記第2凹部の底面の面積は、前記第2開放領域を介して露出した前記第2電極の面積に比例する、請求項8に記載の発光ダイオード。
- 前記第2凹部の深さは、前記第2電極上に配置された前記第1絶縁層及び前記第2絶縁層の厚さに比例する、請求項8に記載の発光ダイオード。
- 前記第2凸部の上面の面積と前記第2凹部の底面の面積との和は、少なくとも前記第2開放領域を介して露出した前記第2電極の面積より大きい、請求項8に記載の発光ダイオード。
- 前記第2電極と前記第2バンプとの間に前記第1絶縁層及び前記第2絶縁層の一部が配置された、請求項8に記載の発光ダイオード。
- 前記第2開放領域を取り囲む前記第1絶縁層及び前記第2絶縁層の側面と、第2バンプの下端の側面の少なくとも一部とは、当接している、請求項8に記載の発光ダイオード。
- 前記第2凸部は前記第2凹部を取り囲む、請求項8に記載の発光ダイオード。
- 前記第2絶縁層はシリコン窒化物層を含む、請求項1に記載の発光ダイオード。
- 前記発光セルは紫外線波長領域の光を放出する、請求項1に記載の発光ダイオード。
- 前記基板は、前記発光セルが配置された一面と、前記一面の反対側である他面と、を含み、
前記他面は凹凸部を含む、請求項1に記載の発光ダイオード。 - 前記基板は透明サファイア基板である、請求項1に記載の発光ダイオード。
- 前記第1絶縁層は分布ブラッグ反射器を含む、請求項1に記載の発光ダイオード。
- 基板と、
前記基板上に配置された下部半導体層と、
前記下部半導体層の一領域上に配置された第1上部半導体層、及び前記下部半導体層と前記第1上部半導体層との間に配置された活性層を含む発光セルと、
前記下部半導体層の他の領域上に配置された第3上部半導体層、及び前記下部半導体層と前記第3上部半導体層との間に配置された活性層を含む第2電流分散部と、
前記発光セル上に配置され、前記第1上部半導体層と電気的に連結された第1電極と、
前記発光セルと離隔して配置され、前記下部半導体層と電気的に連結された第2電極と、を含み、
前記第2電極は、延長されて前記第2電流分散部の少なくとも一部を覆い、前記発光セルの少なくとも一部を取り囲み、
前記第2電極と前記第3上部半導体層との接触抵抗は、前記第2電極と前記下部半導体層との接触抵抗より大きい発光ダイオード。 - 前記下部半導体層の他の領域を中心に、前記下部半導体層の一領域と対向する前記下部半導体層の第3領域内に配置される第1電流分散部をさらに含み、
前記第1電流分散部は、前記下部半導体層の第3領域上に配置される第2上部半導体層、及び前記下部半導体層と前記第2上部半導体層との間に配置された活性層を含む、請求項20に記載の発光ダイオード。 - 前記第2電極と前記第2上部半導体層との接触抵抗は、前記第2電極と前記下部半導体層との接触抵抗より大きい、請求項21に記載の発光ダイオード。
- 前記第2電極は前記第1電流分散部上に配置される、請求項21に記載の発光ダイオード。
- 前記第2電流分散部は、前記発光セルより前記第1電流分散部と隣接して配置された、請求項21に記載の発光ダイオード。
- 前記第1電流分散部は前記発光セルと同一の高さを有する、請求項21に記載の発光ダイオード。
- 前記第1電流分散部及び前記第2電流分散部のそれぞれの上部面の面積の和は、第2電極の面積の10%から40%である、請求項21に記載の発光ダイオード。
- 前記第2電流分散部は複数の分散体を含み、
前記各分散体は、互いに均一な間隔を有して離隔した、請求項20に記載の発光ダイオード。 - 前記第1電極及び前記第2電極上に配置され、前記第1電極を露出させる第1開放領域及び前記第2電極を露出させる第2開放領域を含む絶縁層をさらに含む、請求項20に記載の発光ダイオード。
- 前記絶縁層は、シリコン窒化物層及びシリコン酸化物層のうち少なくとも一つを含む、請求項28に記載の発光ダイオード。
- 前記絶縁層は分布ブラッグ反射器を含む、請求項28に記載の発光ダイオード。
- 前記第1開放領域を介して第1電極と電気的に連結される第1バンプと、
前記第2開放領域を介して第2電極と電気的に連結される第2バンプと、をさらに含む、請求項28に記載の発光ダイオード。 - 前記第1バンプは、上部に第1凹部及び第1凸部を含み、
前記第1バンプは、上面に前記第1凹部の底面を含む第1領域、及び上面に前記第1凸部の上面を含む第2領域として形成され、
前記第1領域の少なくとも一部の領域は前記第1開放領域上に配置され、前記第2領域の少なくとも一部は絶縁層上に配置される、請求項31に記載の発光ダイオード。 - 前記第1凹部の底面の面積は、前記第1開放領域を介して露出した前記第1電極の面積に比例する、請求項31に記載の発光ダイオード。
- 前記第1凹部の深さは、前記第1電極上に配置された絶縁層の厚さに比例する、請求項31に記載の発光ダイオード。
- 前記第1凸部の上面の面積と前記第1凹部の底面の面積との和は、少なくとも前記第1開放領域を介して露出した前記第1電極の面積より大きい、請求項31に記載の発光ダイオード。
- 前記第1凸部は前記第1凹部を取り囲む、請求項31に記載の発光ダイオード。
- 前記第1電極と前記第1バンプとの間及び前記第2電極と前記第2バンプとの間に絶縁層の一部が配置された、請求項31に記載の発光ダイオード。
- 前記第1開放領域を取り囲む前記絶縁層の側面と、前記第1バンプの側面の少なくとも一部とは、当接している、請求項31に記載の発光ダイオード。
- 前記第2電極は、前記発光セルの活性層から放出される光を反射させる反射層を含む、請求項20に記載の発光ダイオード。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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KR10-2014-0098641 | 2014-07-31 | ||
KR1020140098641A KR102256590B1 (ko) | 2014-07-31 | 2014-07-31 | 발광 다이오드 |
KR1020140131604A KR102288376B1 (ko) | 2014-09-30 | 2014-09-30 | 발광 다이오드 |
KR10-2014-0131604 | 2014-09-30 | ||
PCT/KR2015/008010 WO2016018109A1 (ko) | 2014-07-31 | 2015-07-30 | 발광 다이오드 |
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JP2017523613A true JP2017523613A (ja) | 2017-08-17 |
JP6760921B2 JP6760921B2 (ja) | 2020-09-23 |
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JP2017504022A Active JP6760921B2 (ja) | 2014-07-31 | 2015-07-30 | 発光ダイオード |
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US (2) | US9812616B2 (ja) |
JP (1) | JP6760921B2 (ja) |
CN (2) | CN110676367B (ja) |
WO (1) | WO2016018109A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109427941A (zh) * | 2017-08-25 | 2019-03-05 | Lg伊诺特有限公司 | 半导体器件 |
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CN110676367B (zh) | 2023-03-24 |
US20180182925A1 (en) | 2018-06-28 |
US9812616B2 (en) | 2017-11-07 |
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