JP2016134522A - 光半導体装置 - Google Patents
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Abstract
Description
図1は、本発明の実施の形態1に係る光半導体装置を示す断面図である。図1は光半導体装置の共振器方向、即ちレーザ光の進行方向と平行に切断した断面図である。この光半導体装置は、n型InP基板1上に半導体レーザ部2と光導波路部3とが集積された集積型光半導体装置である。
図15は、本発明の実施の形態2に係る光半導体装置を示す断面図である。本実施の形態では、リーク電流抑制層14は、p型InP層13よりキャリア濃度が低い低キャリア濃度InP層27を更に有する。低キャリア濃度InP層27はp型InP層13の側面に接する側壁部28を有する。FeドープInP層15は、低キャリア濃度InP層27の側壁部28を介してp型InP層13のサイドに配置され、p型InP層13に接していない。その他の構成は実施の形態1と同様である。
図16は、本発明の実施の形態3に係る光半導体装置を示す断面図である。図17は光導波路部3を共振器方向と垂直に切断した断面図である。p型InP層13が半導体レーザ部2、光導波路部3、及び電流狭窄層19上に形成されている。
Claims (4)
- n型半導体基板と、
前記n型半導体基板上に形成され、メサストライプ状に加工された活性層と、前記活性層上に形成されたp型クラッド層とを有する半導体レーザ部と、
前記n型半導体基板上において前記活性層の光出力側に形成され、メサストライプ状に加工された光導波路層と、前記光導波路層上に形成された上クラッド層とを有する光導波路部と、
前記活性層及び前記光導波路層の両側を埋め込む半導体の電流狭窄層と、
前記半導体レーザ部上に形成されたp型半導体層と、
前記光導波路部上に形成されたリーク電流抑制層とを備え、
前記上クラッド層は、前記p型クラッド層よりキャリア濃度が低い第1の低キャリア濃度層と、前記第1の低キャリア濃度層上に形成された第1のFeドープ半導体層とを有し、
前記リーク電流抑制層は、前記p型半導体層のサイドに配置された第2のFeドープ半導体層を有し、
前記第1の低キャリア濃度層は前記p型クラッド層の側面に接する側壁部を有し、
前記第1のFeドープ半導体層は、前記第1の低キャリア濃度層の前記側壁部を介して前記p型クラッド層のサイドに配置され、前記p型クラッド層に接していないことを特徴とする光半導体装置。 - 前記第2のFeドープ半導体層は前記p型半導体層の側面に接することを特徴とする請求項1に記載の光半導体装置。
- 前記リーク電流抑制層は、前記p型半導体層よりキャリア濃度が低い第2の低キャリア濃度層を更に有し
前記第2の低キャリア濃度層は前記p型半導体層の側面に接する側壁部を有し、
前記第2のFeドープ半導体層は、前記第2の低キャリア濃度層の前記側壁部を介して前記p型半導体層のサイドに配置され、前記p型半導体層に接していないことを特徴とする請求項1に記載の光半導体装置。 - n型半導体基板と、
前記n型半導体基板上に形成され、メサストライプ状に加工された活性層を有する半導体レーザ部と、
前記n型半導体基板上において前記活性層の光出力側に形成され、メサストライプ状に加工された光導波路層を有する光導波路部と、
前記活性層及び前記光導波路層の両側を埋め込む半導体の電流狭窄層と、
前記半導体レーザ部、前記光導波路部、及び前記電流狭窄層上に形成されたp型半導体層とを備え、
前記光導波路層の両側を埋め込む前記電流狭窄層の最上層がFeドープ半導体層であり、
前記Feドープ半導体層は前記p型半導体層に接していることを特徴とする光半導体装置。
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JP2015008745A JP6375960B2 (ja) | 2015-01-20 | 2015-01-20 | 光半導体装置 |
US14/887,558 US9564737B2 (en) | 2015-01-20 | 2015-10-20 | Optical semiconductor device |
CN201610039147.0A CN105811239B (zh) | 2015-01-20 | 2016-01-20 | 光半导体装置 |
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Cited By (3)
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JP6210186B1 (ja) * | 2017-03-23 | 2017-10-11 | 三菱電機株式会社 | 光半導体素子 |
JP2018018972A (ja) * | 2016-07-28 | 2018-02-01 | 三菱電機株式会社 | 光半導体装置 |
JP7010423B1 (ja) * | 2021-09-28 | 2022-01-26 | 三菱電機株式会社 | 光半導体素子、光モジュールおよび光半導体素子の製造方法 |
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US10862268B2 (en) * | 2017-04-04 | 2020-12-08 | Mitsubishi Electric Corporation | Semiconductor device and method for manufacturing semiconductor device |
CN112398003B (zh) * | 2019-08-19 | 2023-01-06 | 朗美通日本株式会社 | 调制掺杂半导体激光器及其制造方法 |
CN112366520B (zh) * | 2020-10-23 | 2022-07-08 | 湖北光安伦芯片有限公司 | 一种高速dfb激光器的制作方法 |
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JP2018018972A (ja) * | 2016-07-28 | 2018-02-01 | 三菱電機株式会社 | 光半導体装置 |
JP6210186B1 (ja) * | 2017-03-23 | 2017-10-11 | 三菱電機株式会社 | 光半導体素子 |
WO2018173215A1 (ja) * | 2017-03-23 | 2018-09-27 | 三菱電機株式会社 | 光半導体素子 |
JP7010423B1 (ja) * | 2021-09-28 | 2022-01-26 | 三菱電機株式会社 | 光半導体素子、光モジュールおよび光半導体素子の製造方法 |
WO2023053167A1 (ja) * | 2021-09-28 | 2023-04-06 | 三菱電機株式会社 | 光半導体素子、光モジュールおよび光半導体素子の製造方法 |
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US20160211650A1 (en) | 2016-07-21 |
US9564737B2 (en) | 2017-02-07 |
CN105811239A (zh) | 2016-07-27 |
JP6375960B2 (ja) | 2018-08-22 |
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