JP2016100041A5 - - Google Patents

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Publication number
JP2016100041A5
JP2016100041A5 JP2015226232A JP2015226232A JP2016100041A5 JP 2016100041 A5 JP2016100041 A5 JP 2016100041A5 JP 2015226232 A JP2015226232 A JP 2015226232A JP 2015226232 A JP2015226232 A JP 2015226232A JP 2016100041 A5 JP2016100041 A5 JP 2016100041A5
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JP
Japan
Prior art keywords
voltage
boost
boosting
word line
distributed
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JP2015226232A
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English (en)
Japanese (ja)
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JP6560965B2 (ja
JP2016100041A (ja
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Priority claimed from US14/813,103 external-priority patent/US9502119B2/en
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Publication of JP2016100041A5 publication Critical patent/JP2016100041A5/ja
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Publication of JP6560965B2 publication Critical patent/JP6560965B2/ja
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JP2015226232A 2014-11-20 2015-11-19 分配されたキャパシティブ遅延追跡ブーストの支援回路 Active JP6560965B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201462082611P 2014-11-20 2014-11-20
US62/082,611 2014-11-20
US14/813,103 US9502119B2 (en) 2014-11-20 2015-07-29 Distributed capacitive delay tracking boost-assist circuit
US14/813,103 2015-07-29

Publications (3)

Publication Number Publication Date
JP2016100041A JP2016100041A (ja) 2016-05-30
JP2016100041A5 true JP2016100041A5 (enExample) 2018-10-11
JP6560965B2 JP6560965B2 (ja) 2019-08-14

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ID=56010861

Family Applications (1)

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JP2015226232A Active JP6560965B2 (ja) 2014-11-20 2015-11-19 分配されたキャパシティブ遅延追跡ブーストの支援回路

Country Status (4)

Country Link
US (1) US9502119B2 (enExample)
JP (1) JP6560965B2 (enExample)
KR (1) KR102427825B1 (enExample)
CN (1) CN105788621B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106898371B (zh) * 2017-02-24 2020-08-28 中国科学院上海微系统与信息技术研究所 三维存储器读出电路及其字线与位线电压配置方法
US11170830B2 (en) * 2020-02-11 2021-11-09 Taiwan Semiconductor Manufacturing Company Limited Word line driver for low voltage operation
US11705183B2 (en) * 2020-08-28 2023-07-18 Taiwan Semiconductor Manufacturing Company, Ltd. Word line booster circuit and method
CN115731964B (zh) * 2021-08-27 2026-01-13 长鑫存储技术有限公司 存储器和存储器的制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2094086B (en) * 1981-03-03 1985-08-14 Tokyo Shibaura Electric Co Non-volatile semiconductor memory system
KR0137317B1 (ko) * 1994-12-29 1998-04-29 김광호 반도체 메모리소자의 활성싸이클에서 사용되는 승압회로
JPH10228773A (ja) * 1997-02-14 1998-08-25 Hitachi Ltd ダイナミック型ｒａｍ
JP3412800B2 (ja) * 1997-05-27 2003-06-03 富士通株式会社 電圧発生回路を有した半導体装置
JP2001067868A (ja) * 1999-08-31 2001-03-16 Mitsubishi Electric Corp 半導体記憶装置
US7636254B2 (en) * 2006-09-18 2009-12-22 International Business Machines Corporation Wordline booster circuit and method of operating a wordline booster circuit
US8493812B2 (en) * 2010-10-28 2013-07-23 International Business Machines Corporation Boost circuit for generating an adjustable boost voltage
US8300446B2 (en) * 2010-12-13 2012-10-30 Texas Instruments Incorporated Ferroelectric random access memory with single plate line pulse during read
US8724373B2 (en) * 2011-09-12 2014-05-13 Qualcomm Incorporated Apparatus for selective word-line boost on a memory cell

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