JP2015222741A - 多数個取り配線基板およびその製造方法 - Google Patents
多数個取り配線基板およびその製造方法 Download PDFInfo
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- JP2015222741A JP2015222741A JP2014105770A JP2014105770A JP2015222741A JP 2015222741 A JP2015222741 A JP 2015222741A JP 2014105770 A JP2014105770 A JP 2014105770A JP 2014105770 A JP2014105770 A JP 2014105770A JP 2015222741 A JP2015222741 A JP 2015222741A
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- wiring board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09154—Bevelled, chamferred or tapered edge
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0169—Using a temporary frame during processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/30—Foil or other thin sheet-metal making or treating
- Y10T29/301—Method
- Y10T29/303—Method with assembling or disassembling of a pack
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49163—Manufacturing circuit on or in base with sintering of base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Structure Of Printed Boards (AREA)
Abstract
【解決手段】平板状の底板4の上面に、エッチング可能な金属箔6を少なくともその中央部が底板4から剥離可能な状態で積層して成る支持基板1と、金属箔6上に被着されたエッチング可能なめっき金属層から成り、金属箔6の中央部の上面を、互いに間隔を空けて配置された複数の製品形成領Xに仕切る複数の開口部3aを有する枠部3と、各製品形成領域X上に、その外周側面が開口部3a内壁に密着するようにして被着された絶縁層7および該絶縁層7上に被着された配線導体8を含む配線基板2と、を具備して成る配線基板である。
【選択図】図1
Description
2 配線基板
3 枠部
4 底板
6 第2の金属箔
7 絶縁層
8 配線導体
9 ソルダーレジスト層
G 溝部
X 製品形成領域
Claims (4)
- 平板状の底板の上面に、エッチング可能な金属箔を少なくともその中央部が前記底板から剥離可能な状態で積層して成る支持基板と、前記金属箔上に被着されたエッチング可能なめっき金属層から成り、前記金属箔の前記中央部の上面を、互いに間隔を空けて配置された複数の製品形成領域に仕切る複数の開口部を有する枠部と、前記各製品形成領域上に、その外周側面が前記開口部内壁に密着するようにして被着された絶縁層および該絶縁層上に被着された配線導体を含む配線基板と、を具備して成ることを特徴とする多数個取り配線基板。
- 前記開口部の内周が、角の丸い四角形状、または四角形と異なる形状であることを特徴とする請求項1記載の多数個取り配線基板。
- 平板状の底板上に、互いに間隔を空けて配置された複数の製品形成領域をその中央部の上面に有するエッチング可能な金属箔を、少なくとも前記中央部が前記底板から剥離可能な状態で被着する第1の工程と、前記金属箔上の少なくとも前記中央部の全面に絶縁層を被着する第2の工程と、前記各製品形成領域上の前記絶縁層上に配線導体を被着する第3の工程と、前記各製品形成領域周囲の前記絶縁層を除去し、前記各製品形成領域をそれぞれ枠状に取り囲むように前記金属箔の上面を露出させる溝部を形成する第4の工程と、露出した前記金属箔の上面にエッチング可能なめっき導体層を析出させることにより、前記各製品形成領域上の前記絶縁層の側面に密着する前記めっき導体層から成る枠部を前記溝部内に形成する第5の工程と、を行うことを特徴とする多数個取り配線基板の製造方法。
- 前記開口部の内周が、角の丸い四角形状、または四角形と異なる形状であることを特徴とする請求項3記載の多数個取り配線基板の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014105770A JP2015222741A (ja) | 2014-05-22 | 2014-05-22 | 多数個取り配線基板およびその製造方法 |
TW104115856A TW201603664A (zh) | 2014-05-22 | 2015-05-19 | 可製取多個製品之配線基板及其製造方法 |
US14/718,368 US20150342049A1 (en) | 2014-05-22 | 2015-05-21 | Multi-piece wiring board and method for producing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014105770A JP2015222741A (ja) | 2014-05-22 | 2014-05-22 | 多数個取り配線基板およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2015222741A true JP2015222741A (ja) | 2015-12-10 |
Family
ID=54557078
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014105770A Pending JP2015222741A (ja) | 2014-05-22 | 2014-05-22 | 多数個取り配線基板およびその製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20150342049A1 (ja) |
JP (1) | JP2015222741A (ja) |
TW (1) | TW201603664A (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180047692A1 (en) * | 2016-08-10 | 2018-02-15 | Amkor Technology, Inc. | Method and System for Packing Optimization of Semiconductor Devices |
JP6815880B2 (ja) * | 2017-01-25 | 2021-01-20 | 株式会社ディスコ | 半導体パッケージの製造方法 |
JP6550516B1 (ja) * | 2018-09-18 | 2019-07-24 | レノボ・シンガポール・プライベート・リミテッド | パネル、pcbおよびpcbの製造方法 |
CN112234050B (zh) * | 2020-09-22 | 2024-05-28 | 江苏盐芯微电子有限公司 | 多芯片集成电路封装结构 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009016466A (ja) * | 2007-07-03 | 2009-01-22 | Nec Corp | 配線基板複合体、並びに、配線基板複合体、配線基板および半導体装置の製造方法 |
JP2009290080A (ja) * | 2008-05-30 | 2009-12-10 | Ngk Spark Plug Co Ltd | 多層配線基板の中間製品、多層配線基板の製造方法 |
JP2010080808A (ja) * | 2008-09-29 | 2010-04-08 | Ngk Spark Plug Co Ltd | 補強材付き配線基板の製造方法 |
JP2011077305A (ja) * | 2009-09-30 | 2011-04-14 | Nec Corp | 機能素子内蔵基板及びその製造方法、並びに電子機器 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5208732A (en) * | 1991-05-29 | 1993-05-04 | Texas Instruments, Incorporated | Memory card with flexible conductor between substrate and metal cover |
US5648893A (en) * | 1993-07-30 | 1997-07-15 | Sun Microsystems, Inc. | Upgradable multi-chip module |
US7575955B2 (en) * | 2004-01-06 | 2009-08-18 | Ismat Corporation | Method for making electronic packages |
US8017434B2 (en) * | 2008-11-24 | 2011-09-13 | Advanced Micro Devices, Inc. | Semiconductor chip package fixture |
US20140048326A1 (en) * | 2012-08-14 | 2014-02-20 | Bridge Semiconductor Corporation | Multi-cavity wiring board for semiconductor assembly with internal electromagnetic shielding |
JP5762376B2 (ja) * | 2012-09-21 | 2015-08-12 | 日本特殊陶業株式会社 | 配線基板及びその製造方法 |
JP2014112632A (ja) * | 2012-11-09 | 2014-06-19 | Ibiden Co Ltd | 複合配線板 |
JP6068175B2 (ja) * | 2013-02-12 | 2017-01-25 | 新光電気工業株式会社 | 配線基板、発光装置、配線基板の製造方法及び発光装置の製造方法 |
JP6161380B2 (ja) * | 2013-04-17 | 2017-07-12 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
-
2014
- 2014-05-22 JP JP2014105770A patent/JP2015222741A/ja active Pending
-
2015
- 2015-05-19 TW TW104115856A patent/TW201603664A/zh unknown
- 2015-05-21 US US14/718,368 patent/US20150342049A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009016466A (ja) * | 2007-07-03 | 2009-01-22 | Nec Corp | 配線基板複合体、並びに、配線基板複合体、配線基板および半導体装置の製造方法 |
JP2009290080A (ja) * | 2008-05-30 | 2009-12-10 | Ngk Spark Plug Co Ltd | 多層配線基板の中間製品、多層配線基板の製造方法 |
JP2010080808A (ja) * | 2008-09-29 | 2010-04-08 | Ngk Spark Plug Co Ltd | 補強材付き配線基板の製造方法 |
JP2011077305A (ja) * | 2009-09-30 | 2011-04-14 | Nec Corp | 機能素子内蔵基板及びその製造方法、並びに電子機器 |
Also Published As
Publication number | Publication date |
---|---|
US20150342049A1 (en) | 2015-11-26 |
TW201603664A (zh) | 2016-01-16 |
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