JP2014524158A5 - - Google Patents

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Publication number
JP2014524158A5
JP2014524158A5 JP2014522943A JP2014522943A JP2014524158A5 JP 2014524158 A5 JP2014524158 A5 JP 2014524158A5 JP 2014522943 A JP2014522943 A JP 2014522943A JP 2014522943 A JP2014522943 A JP 2014522943A JP 2014524158 A5 JP2014524158 A5 JP 2014524158A5
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JP
Japan
Prior art keywords
region
silicon compound
metal
forming
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2014522943A
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English (en)
Japanese (ja)
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JP2014524158A (ja
JP5992521B2 (ja
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Publication date
Priority claimed from US13/547,527 external-priority patent/US8987102B2/en
Application filed filed Critical
Publication of JP2014524158A publication Critical patent/JP2014524158A/ja
Publication of JP2014524158A5 publication Critical patent/JP2014524158A5/ja
Application granted granted Critical
Publication of JP5992521B2 publication Critical patent/JP5992521B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2014522943A 2011-07-27 2012-07-24 集積回路内に金属ケイ素化合物領域を形成する方法 Expired - Fee Related JP5992521B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161512226P 2011-07-27 2011-07-27
US61/512,226 2011-07-27
US13/547,527 US8987102B2 (en) 2011-07-27 2012-07-12 Methods of forming a metal silicide region in an integrated circuit
US13/547,527 2012-07-12
PCT/US2012/047986 WO2013016341A2 (en) 2011-07-27 2012-07-24 Methods of forming a metal silicide region in an integrated circuit

Publications (3)

Publication Number Publication Date
JP2014524158A JP2014524158A (ja) 2014-09-18
JP2014524158A5 true JP2014524158A5 (enExample) 2015-09-10
JP5992521B2 JP5992521B2 (ja) 2016-09-14

Family

ID=47596561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014522943A Expired - Fee Related JP5992521B2 (ja) 2011-07-27 2012-07-24 集積回路内に金属ケイ素化合物領域を形成する方法

Country Status (6)

Country Link
US (1) US8987102B2 (enExample)
JP (1) JP5992521B2 (enExample)
KR (1) KR102030676B1 (enExample)
CN (1) CN103650112A (enExample)
TW (1) TWI564993B (enExample)
WO (1) WO2013016341A2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140065819A1 (en) * 2012-09-03 2014-03-06 Intermolecular, Inc. Methods and Systems for Low Resistance Contact Formation
US11012461B2 (en) 2016-10-27 2021-05-18 Accenture Global Solutions Limited Network device vulnerability prediction
WO2020191068A1 (en) * 2019-03-20 2020-09-24 Tokyo Electron Limited Method of selectively forming metal silicides for semiconductor devices

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07106566A (ja) * 1993-10-01 1995-04-21 Nippondenso Co Ltd 半導体装置の製造方法
JPH0923005A (ja) * 1995-07-06 1997-01-21 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH0964349A (ja) * 1995-08-22 1997-03-07 Sony Corp 高融点シリサイドを持つ半導体装置とその製造方法
KR100273271B1 (ko) * 1998-01-16 2001-02-01 김영환 실리사이드제조방법
US6403472B1 (en) 1999-06-23 2002-06-11 Harris Corporation Method of forming resistive contacts on intergrated circuits with mobility spoiling ions including high resistive contacts and low resistivity silicide contacts
JP2001053017A (ja) * 1999-08-06 2001-02-23 Hitachi Ltd 半導体装置の製造方法
JP2003188274A (ja) * 2001-12-19 2003-07-04 Toshiba Corp 半導体装置及びその製造方法
FR2856514A1 (fr) 2003-06-20 2004-12-24 St Microelectronics Sa Procede de formation selective de siliciure sur une plaque de materiau semi-conducteur
JP2005093907A (ja) * 2003-09-19 2005-04-07 Sharp Corp 半導体装置およびその製造方法
JP2006196646A (ja) * 2005-01-13 2006-07-27 Renesas Technology Corp 半導体装置及びその製造方法
JP2007019205A (ja) * 2005-07-07 2007-01-25 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7576407B2 (en) * 2006-04-26 2009-08-18 Samsung Electronics Co., Ltd. Devices and methods for constructing electrically programmable integrated fuses for low power applications
US7807556B2 (en) * 2006-12-05 2010-10-05 General Electric Company Method for doping impurities
JP2010016302A (ja) * 2008-07-07 2010-01-21 Panasonic Corp 半導体装置及びその製造方法
US20100164001A1 (en) * 2008-12-30 2010-07-01 Joodong Park Implant process for blocked salicide poly resistor and structures formed thereby
KR101149043B1 (ko) * 2009-10-30 2012-05-24 에스케이하이닉스 주식회사 매립형 비트라인을 구비하는 반도체 장치 및 그 제조방법

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