KR102030676B1 - 집적 회로에 금속 규화물 구역을 형성하는 방법들 - Google Patents

집적 회로에 금속 규화물 구역을 형성하는 방법들 Download PDF

Info

Publication number
KR102030676B1
KR102030676B1 KR1020147005108A KR20147005108A KR102030676B1 KR 102030676 B1 KR102030676 B1 KR 102030676B1 KR 1020147005108 A KR1020147005108 A KR 1020147005108A KR 20147005108 A KR20147005108 A KR 20147005108A KR 102030676 B1 KR102030676 B1 KR 102030676B1
Authority
KR
South Korea
Prior art keywords
zone
silicide
metal
metal silicide
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020147005108A
Other languages
English (en)
Korean (ko)
Other versions
KR20140063644A (ko
Inventor
마이클 지. 워드
이고르 브이. 페이도우스
Original Assignee
어플라이드 머티어리얼스, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 어플라이드 머티어리얼스, 인코포레이티드 filed Critical 어플라이드 머티어리얼스, 인코포레이티드
Publication of KR20140063644A publication Critical patent/KR20140063644A/ko
Application granted granted Critical
Publication of KR102030676B1 publication Critical patent/KR102030676B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
KR1020147005108A 2011-07-27 2012-07-24 집적 회로에 금속 규화물 구역을 형성하는 방법들 Active KR102030676B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161512226P 2011-07-27 2011-07-27
US61/512,226 2011-07-27
US13/547,527 US8987102B2 (en) 2011-07-27 2012-07-12 Methods of forming a metal silicide region in an integrated circuit
US13/547,527 2012-07-12
PCT/US2012/047986 WO2013016341A2 (en) 2011-07-27 2012-07-24 Methods of forming a metal silicide region in an integrated circuit

Publications (2)

Publication Number Publication Date
KR20140063644A KR20140063644A (ko) 2014-05-27
KR102030676B1 true KR102030676B1 (ko) 2019-10-10

Family

ID=47596561

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020147005108A Active KR102030676B1 (ko) 2011-07-27 2012-07-24 집적 회로에 금속 규화물 구역을 형성하는 방법들

Country Status (6)

Country Link
US (1) US8987102B2 (enExample)
JP (1) JP5992521B2 (enExample)
KR (1) KR102030676B1 (enExample)
CN (1) CN103650112A (enExample)
TW (1) TWI564993B (enExample)
WO (1) WO2013016341A2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140065819A1 (en) * 2012-09-03 2014-03-06 Intermolecular, Inc. Methods and Systems for Low Resistance Contact Formation
US11012461B2 (en) 2016-10-27 2021-05-18 Accenture Global Solutions Limited Network device vulnerability prediction
WO2020191068A1 (en) * 2019-03-20 2020-09-24 Tokyo Electron Limited Method of selectively forming metal silicides for semiconductor devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001053017A (ja) * 1999-08-06 2001-02-23 Hitachi Ltd 半導体装置の製造方法
JP2003188274A (ja) 2001-12-19 2003-07-04 Toshiba Corp 半導体装置及びその製造方法
US20100164001A1 (en) * 2008-12-30 2010-07-01 Joodong Park Implant process for blocked salicide poly resistor and structures formed thereby

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07106566A (ja) * 1993-10-01 1995-04-21 Nippondenso Co Ltd 半導体装置の製造方法
JPH0923005A (ja) * 1995-07-06 1997-01-21 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH0964349A (ja) * 1995-08-22 1997-03-07 Sony Corp 高融点シリサイドを持つ半導体装置とその製造方法
KR100273271B1 (ko) * 1998-01-16 2001-02-01 김영환 실리사이드제조방법
US6403472B1 (en) 1999-06-23 2002-06-11 Harris Corporation Method of forming resistive contacts on intergrated circuits with mobility spoiling ions including high resistive contacts and low resistivity silicide contacts
FR2856514A1 (fr) 2003-06-20 2004-12-24 St Microelectronics Sa Procede de formation selective de siliciure sur une plaque de materiau semi-conducteur
JP2005093907A (ja) * 2003-09-19 2005-04-07 Sharp Corp 半導体装置およびその製造方法
JP2006196646A (ja) * 2005-01-13 2006-07-27 Renesas Technology Corp 半導体装置及びその製造方法
JP2007019205A (ja) * 2005-07-07 2007-01-25 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7576407B2 (en) * 2006-04-26 2009-08-18 Samsung Electronics Co., Ltd. Devices and methods for constructing electrically programmable integrated fuses for low power applications
US7807556B2 (en) * 2006-12-05 2010-10-05 General Electric Company Method for doping impurities
JP2010016302A (ja) * 2008-07-07 2010-01-21 Panasonic Corp 半導体装置及びその製造方法
KR101149043B1 (ko) * 2009-10-30 2012-05-24 에스케이하이닉스 주식회사 매립형 비트라인을 구비하는 반도체 장치 및 그 제조방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001053017A (ja) * 1999-08-06 2001-02-23 Hitachi Ltd 半導体装置の製造方法
JP2003188274A (ja) 2001-12-19 2003-07-04 Toshiba Corp 半導体装置及びその製造方法
US20100164001A1 (en) * 2008-12-30 2010-07-01 Joodong Park Implant process for blocked salicide poly resistor and structures formed thereby

Also Published As

Publication number Publication date
TW201306174A (zh) 2013-02-01
US20130026617A1 (en) 2013-01-31
TWI564993B (zh) 2017-01-01
US8987102B2 (en) 2015-03-24
WO2013016341A2 (en) 2013-01-31
KR20140063644A (ko) 2014-05-27
JP2014524158A (ja) 2014-09-18
CN103650112A (zh) 2014-03-19
WO2013016341A3 (en) 2013-04-18
JP5992521B2 (ja) 2016-09-14

Similar Documents

Publication Publication Date Title
TWI479604B (zh) 基於矽／碳材料之ｐｍｏｓ與ｎｍｏｓ電晶體的性能提升
US8501605B2 (en) Methods and apparatus for conformal doping
CN103620740B (zh) 于裸露硅表面而非氧化物表面上的聚合物薄膜的选择性沉积
TWI675397B (zh) 利用掩模及方向性電漿處理之選擇性沉積
TWI404146B (zh) 提供半導體裝置中之應力均勻性
US20100323113A1 (en) Method to Synthesize Graphene
TW200915434A (en) Blocking pre-amorphization of a gate electrode of a transistor
CN104347380B (zh) 形成包含硅化及非硅化电路组件的半导体结构的方法
TW201207919A (en) Removal of surface dopants from a substrate
TW200428658A (en) Method for fabricating a gate structure of a field effect transistor
TWI784967B (zh) 矽氮化物之準原子層蝕刻方法
US20120135578A1 (en) Doping of planar or three-dimensional structures at elevated temperatures
KR102030676B1 (ko) 집적 회로에 금속 규화물 구역을 형성하는 방법들
TW201025405A (en) Techniques for ion implantation of molecular ions
US20170309484A1 (en) Carbon Vacancy Defect Reduction Method for SiC
WO2013013586A1 (zh) 薄膜晶体管、其制造方法及包括该薄膜晶体管的阵列基板
TW200308089A (en) A semiconductor device and methods of manufacturing the same, a zener diode, a consumer electronic product
TWI227038B (en) Method for manufacturing thin film transistor
KR20190112821A (ko) 실리콘 질화물의 유사 원자층 에칭 방법
KR20190112822A (ko) 자가 정렬 블록 구조물들의 제조를 위한 실리콘 질화물 맨드렐의 이방성 추출 방법
US9337314B2 (en) Technique for selectively processing three dimensional device
WO2000001004A1 (fr) Procede de formation d'une couche de silicium monocristallin et procede de fabrication d'un dispositif semi-conducteur
US20130288469A1 (en) Methods and apparatus for implanting a dopant material
US8431461B1 (en) Silicon nitride dry trim without top pulldown
CN103000623B (zh) 一种铝栅半导体器件及其制造方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

AMND Amendment
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

AMND Amendment
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E601 Decision to refuse application
PE0601 Decision on rejection of patent

St.27 status event code: N-2-6-B10-B15-exm-PE0601

AMND Amendment
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PX0901 Re-examination

St.27 status event code: A-2-3-E10-E12-rex-PX0901

PX0701 Decision of registration after re-examination

St.27 status event code: A-3-4-F10-F13-rex-PX0701

X701 Decision to grant (after re-examination)
GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

R17 Change to representative recorded

Free format text: ST27 STATUS EVENT CODE: A-5-5-R10-R17-OTH-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000