JP2014131017A - 多層基板 - Google Patents
多層基板 Download PDFInfo
- Publication number
- JP2014131017A JP2014131017A JP2013241708A JP2013241708A JP2014131017A JP 2014131017 A JP2014131017 A JP 2014131017A JP 2013241708 A JP2013241708 A JP 2013241708A JP 2013241708 A JP2013241708 A JP 2013241708A JP 2014131017 A JP2014131017 A JP 2014131017A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- multilayer substrate
- layer
- substrate according
- pattern layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
- H05K2201/029—Woven fibrous reinforcement or textile
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09136—Means for correcting warpage
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
【解決手段】本発明による多層基板は、上部面に微細パターン層が形成される第2絶縁層と、前記微細パターン層のパターンピッチより大きいパターンピッチを有する回路パターン層が上部面に形成され、前記第2絶縁層と異なる材料からなる第3絶縁層と、を含み、内部配線の微細化及び集積度向上が可能で、且つワーページ問題も改善されることができる。
【選択図】図1
Description
11 外部電極
100 多層基板
110 第1絶縁層
111 キャビティ
115 導体パターン層
120、120′、220 第2絶縁層
121 フィラー
123 シード層
125、126 ビア
130、230 微細パターン層
130′ 導電パターン
E 被エッチング部
140、240 第3絶縁層
142 芯材
150、250 回路パターン層
Claims (17)
- 上部面に微細パターン層が形成される第2絶縁層と、
前記微細パターン層のパターンピッチより大きいパターンピッチを有する回路パターン層が上部面に形成され、前記第2絶縁層と異なる材料からなる第3絶縁層と、
を含む多層基板。 - 前記第3絶縁層は、前記第2絶縁層に比べて前記多層基板の外部面に近く配置されることを特徴とする請求項1に記載の多層基板。
- 前記第2絶縁層は、前記第3絶縁層に比べて表面粗さが小さいことを特徴とする請求項2に記載の多層基板。
- 前記第3絶縁層は、ガラス繊維を含む物質からなる芯材を内部に含むことを特徴とする請求項3に記載の多層基板。
- 前記第2絶縁層は、ポリイミドからなることを特徴とする請求項4に記載の多層基板。
- 前記第2絶縁層は、フィラーを含むことを特徴とする請求項4に記載の多層基板。
- 前記第2絶縁層はABFからなり、前記第3絶縁層はPPGからなることを特徴とする請求項6に記載の多層基板。
- 前記フィラーは、直径が5μm未満であることを特徴とする請求項6に記載の多層基板。
- 前記フィラーは、扁平度が0.5未満であることを特徴とする請求項6に記載の多層基板。
- キャビティが備えられた第1絶縁層と、
前記キャビティに少なくとも一部が挿入され、表面に外部電極が備えられた電子部品と、
をさらに含み、
前記第2絶縁層は、前記第1絶縁層上で前記電子部品をカバーし、
前記微細パターン層と前記外部電極は、ビアにより直接連結されることを特徴とする請求項1に記載の多層基板。 - 前記第1絶縁層の表面には導体パターン層がさらに備えられ、
前記微細パターン層と前記導体パターン層は、ビアにより直接連結されることを特徴とする請求項10に記載の多層基板。 - 前記第3絶縁層は、前記多層基板の最外郭に少なくとも一層で備えられることを特徴とする請求項10に記載の多層基板。
- 前記第2絶縁層は、前記第1絶縁層から前記多層基板の最外郭方向に少なくとも二層で備えられることを特徴とする請求項10に記載の多層基板。
- 前記第1絶縁層は、金属材を含むメタルコアであることを特徴とする請求項10に記載の多層基板。
- 前記微細パターン層のパターンピッチは10μm以下であり、前記回路パターン層のパターンピッチは15μm以上であることを特徴とする請求項1に記載の多層基板。
- 前記微細パターン層の線幅は10μm以下であり、前記回路パターン層の線幅は15μm以上であることを特徴とする請求項15に記載の多層基板。
- 前記微細パターン層は、セミアディティブ法(Semi Additive Process;SAP)により形成され、
前記回路パターン層は、モディファイドセミアディティブ法(Modified Semi Additive Process;MSAP)により形成されることを特徴とする請求項1に記載の多層基板。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2012-0158337 | 2012-12-31 | ||
KR1020120158337A KR101420543B1 (ko) | 2012-12-31 | 2012-12-31 | 다층기판 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2014131017A true JP2014131017A (ja) | 2014-07-10 |
Family
ID=51015846
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013241708A Pending JP2014131017A (ja) | 2012-12-31 | 2013-11-22 | 多層基板 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9474167B2 (ja) |
JP (1) | JP2014131017A (ja) |
KR (1) | KR101420543B1 (ja) |
TW (1) | TWI495416B (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016127251A (ja) * | 2014-12-26 | 2016-07-11 | 京セラ株式会社 | 印刷配線板およびその製造方法 |
WO2022196262A1 (ja) * | 2021-03-19 | 2022-09-22 | Tdk株式会社 | 電子部品内蔵基板及びその製造方法 |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6341714B2 (ja) * | 2014-03-25 | 2018-06-13 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP6133227B2 (ja) * | 2014-03-27 | 2017-05-24 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP6298722B2 (ja) * | 2014-06-10 | 2018-03-20 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
JP6375159B2 (ja) * | 2014-07-07 | 2018-08-15 | 新光電気工業株式会社 | 配線基板、半導体パッケージ |
KR102139755B1 (ko) | 2015-01-22 | 2020-07-31 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
JP6502814B2 (ja) * | 2015-09-25 | 2019-04-17 | 京セラ株式会社 | 指紋センサー用配線基板 |
JP2017063163A (ja) * | 2015-09-25 | 2017-03-30 | 京セラ株式会社 | 指紋センサー用配線基板 |
US11244349B2 (en) | 2015-12-29 | 2022-02-08 | Ebay Inc. | Methods and apparatus for detection of spam publication |
US10089513B2 (en) * | 2016-05-30 | 2018-10-02 | Kyocera Corporation | Wiring board for fingerprint sensor |
KR102003390B1 (ko) * | 2016-06-20 | 2019-07-24 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
US10600748B2 (en) * | 2016-06-20 | 2020-03-24 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package |
TWI645519B (zh) * | 2017-06-02 | 2018-12-21 | 旭德科技股份有限公司 | 元件內埋式封裝載板及其製作方法 |
CN109561570B (zh) * | 2018-11-21 | 2020-12-18 | 奥特斯(中国)有限公司 | 部件承载件及其制造方法以及使用填料颗粒的方法 |
US10892213B2 (en) * | 2018-12-28 | 2021-01-12 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
CN111640727B (zh) * | 2019-03-01 | 2022-09-23 | 奥特斯(中国)有限公司 | 包括具有不同物理特性的介电结构的部件承载件 |
CN113130408A (zh) * | 2019-12-31 | 2021-07-16 | 奥特斯奥地利科技与系统技术有限公司 | 部件承载件及制造部件承载件的方法 |
KR20220013703A (ko) * | 2020-07-27 | 2022-02-04 | 삼성전기주식회사 | 전자부품 내장기판 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009218545A (ja) * | 2008-03-12 | 2009-09-24 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
WO2010010911A1 (ja) * | 2008-07-23 | 2010-01-28 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP2010103548A (ja) * | 2005-10-04 | 2010-05-06 | Samsung Electro-Mechanics Co Ltd | 電子素子を内蔵した印刷回路基板及びその製造方法 |
JP2011018893A (ja) * | 2009-07-08 | 2011-01-27 | Samsung Electro-Mechanics Co Ltd | 絶縁体、電子素子内蔵型印刷回路基板、及び電子素子内蔵型印刷回路基板の製造方法 |
JP2012204699A (ja) * | 2011-03-26 | 2012-10-22 | Fujitsu Ltd | 回路基板、その製造方法および半導体装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0661594A (ja) * | 1992-05-27 | 1994-03-04 | Nec Corp | 回路基板 |
EP2265101B1 (en) | 1999-09-02 | 2012-08-29 | Ibiden Co., Ltd. | Printed circuit board and method of manufacturing printed circuit board |
JP3491630B2 (ja) | 2001-01-18 | 2004-01-26 | 松下電工株式会社 | 樹脂成形体及び回路用成形基板 |
KR100747336B1 (ko) * | 2006-01-20 | 2007-08-07 | 엘에스전선 주식회사 | 이방성 도전 필름을 이용한 회로기판의 접속 구조체, 이를위한 제조 방법 및 이를 이용한 접속 상태 평가방법 |
US20090078458A1 (en) * | 2007-09-21 | 2009-03-26 | Ricoh Company, Ltd. | Paste composition, insulating film, multilayer interconnection structure, printed-circuit board, image display device, and manufacturing method of paste composition |
US8692135B2 (en) * | 2008-08-27 | 2014-04-08 | Nec Corporation | Wiring board capable of containing functional element and method for manufacturing same |
KR20100048685A (ko) * | 2008-10-31 | 2010-05-11 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
JP5457374B2 (ja) * | 2009-01-29 | 2014-04-02 | Jx日鉱日石金属株式会社 | 電子回路用の圧延銅箔又は電解銅箔及びこれらを用いた電子回路の形成方法 |
US8299366B2 (en) * | 2009-05-29 | 2012-10-30 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
KR101067109B1 (ko) * | 2010-04-26 | 2011-09-26 | 삼성전기주식회사 | 전자부품 내장형 인쇄회로기판 및 그 제조방법 |
TWI393517B (zh) * | 2010-05-04 | 2013-04-11 | Elite Material Co Ltd | Method for manufacturing metal substrate |
-
2012
- 2012-12-31 KR KR1020120158337A patent/KR101420543B1/ko active IP Right Grant
-
2013
- 2013-10-18 TW TW102137611A patent/TWI495416B/zh not_active IP Right Cessation
- 2013-10-23 US US14/061,160 patent/US9474167B2/en active Active
- 2013-11-22 JP JP2013241708A patent/JP2014131017A/ja active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010103548A (ja) * | 2005-10-04 | 2010-05-06 | Samsung Electro-Mechanics Co Ltd | 電子素子を内蔵した印刷回路基板及びその製造方法 |
JP2009218545A (ja) * | 2008-03-12 | 2009-09-24 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
WO2010010911A1 (ja) * | 2008-07-23 | 2010-01-28 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP2011018893A (ja) * | 2009-07-08 | 2011-01-27 | Samsung Electro-Mechanics Co Ltd | 絶縁体、電子素子内蔵型印刷回路基板、及び電子素子内蔵型印刷回路基板の製造方法 |
JP2012204699A (ja) * | 2011-03-26 | 2012-10-22 | Fujitsu Ltd | 回路基板、その製造方法および半導体装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016127251A (ja) * | 2014-12-26 | 2016-07-11 | 京セラ株式会社 | 印刷配線板およびその製造方法 |
WO2022196262A1 (ja) * | 2021-03-19 | 2022-09-22 | Tdk株式会社 | 電子部品内蔵基板及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US9474167B2 (en) | 2016-10-18 |
KR101420543B1 (ko) | 2014-08-13 |
TW201427527A (zh) | 2014-07-01 |
KR20140087742A (ko) | 2014-07-09 |
US20140182889A1 (en) | 2014-07-03 |
TWI495416B (zh) | 2015-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2014131017A (ja) | 多層基板 | |
JP6373574B2 (ja) | 回路基板及びその製造方法 | |
JP6478309B2 (ja) | 多層基板及び多層基板の製造方法 | |
US20150062848A1 (en) | Electronic component embedded substrate and method for manufacturing electronic component embedded substrate | |
KR101522786B1 (ko) | 다층기판 및 다층기판 제조방법 | |
TWI484875B (zh) | 電路板及電路板製作方法 | |
KR100990588B1 (ko) | 랜드리스 비아를 갖는 인쇄회로기판 및 그 제조방법 | |
KR101497230B1 (ko) | 전자부품 내장기판 및 전자부품 내장기판 제조방법 | |
TWI606765B (zh) | 電路板及其製作方法 | |
JP2008130748A (ja) | 抵抗素子を内蔵するプリント配線板の製造法 | |
KR102078009B1 (ko) | 인쇄회로기판 및 그 제조방법 | |
US8674232B2 (en) | Device-embedded flexible printed circuit board and manufacturing method thereof | |
JP2005311289A (ja) | 回路接続構造体とその製造方法 | |
US20160095202A1 (en) | Circuit board and manufacturing method thereof | |
JP5659234B2 (ja) | 部品内蔵基板 | |
US9155199B2 (en) | Passive device embedded in substrate and substrate with passive device embedded therein | |
CN106332444B (zh) | 电路板及其制作方法 | |
KR20130044554A (ko) | 인쇄회로기판 및 그 제조방법 | |
JP2013115110A (ja) | 段差構造のプリント配線板 | |
JP2016157924A (ja) | 回路基板および回路基板組立体 | |
JP2009088337A (ja) | プリント配線板およびその製造方法 | |
KR101085576B1 (ko) | 금속을 이용한 인쇄회로기판을 제조하는 방법 및 이를 이용하여 제조한 인쇄회로기판 | |
JP2007305825A (ja) | 回路基板の製造方法 | |
JP2007324232A (ja) | Bga型多層配線板及びbga型半導体パッケージ | |
US20130146337A1 (en) | Multi-layered printed circuit board and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20161027 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20170814 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170822 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171027 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20180320 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180621 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20180629 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20180713 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20180820 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20180831 |