JP2014116064A5 - - Google Patents

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Publication number
JP2014116064A5
JP2014116064A5 JP2013255960A JP2013255960A JP2014116064A5 JP 2014116064 A5 JP2014116064 A5 JP 2014116064A5 JP 2013255960 A JP2013255960 A JP 2013255960A JP 2013255960 A JP2013255960 A JP 2013255960A JP 2014116064 A5 JP2014116064 A5 JP 2014116064A5
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JP
Japan
Prior art keywords
write
memory cell
start pulse
verify
resistive memory
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JP2013255960A
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English (en)
Japanese (ja)
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JP2014116064A (ja
JP5837916B2 (ja
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Priority claimed from KR1020120143772A external-priority patent/KR102030330B1/ko
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Publication of JP2014116064A5 publication Critical patent/JP2014116064A5/ja
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Publication of JP5837916B2 publication Critical patent/JP5837916B2/ja
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JP2013255960A 2012-12-11 2013-12-11 抵抗体を利用する不揮発性メモリ装置及びその駆動方法 Active JP5837916B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2012-0143772 2012-12-11
KR1020120143772A KR102030330B1 (ko) 2012-12-11 2012-12-11 저항체를 이용한 비휘발성 메모리 장치 및 그 구동 방법

Publications (3)

Publication Number Publication Date
JP2014116064A JP2014116064A (ja) 2014-06-26
JP2014116064A5 true JP2014116064A5 (https=) 2015-11-05
JP5837916B2 JP5837916B2 (ja) 2015-12-24

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JP2013255960A Active JP5837916B2 (ja) 2012-12-11 2013-12-11 抵抗体を利用する不揮発性メモリ装置及びその駆動方法

Country Status (4)

Country Link
US (1) US9001560B2 (https=)
JP (1) JP5837916B2 (https=)
KR (1) KR102030330B1 (https=)
CN (1) CN103871466B (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160044847A (ko) * 2014-10-16 2016-04-26 에스케이하이닉스 주식회사 저항변화 메모리 장치, 이를 위한 읽기쓰기 회로부 및 동작 방법
US9312001B1 (en) * 2015-02-17 2016-04-12 Winbond Electronics Corp. Writing and verifying circuit for a resistive memory and method for writing and verifying a resistive memory
US20170308327A1 (en) * 2016-04-22 2017-10-26 Hewlett Packard Enterprise Development Lp Extension Write Buffering
TWI665672B (zh) * 2016-09-13 2019-07-11 東芝記憶體股份有限公司 Semiconductor memory device
WO2018063207A1 (en) * 2016-09-29 2018-04-05 Intel Corporation Resistive random access memory cell
KR102630116B1 (ko) * 2016-10-18 2024-01-29 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
US10395738B2 (en) 2017-11-30 2019-08-27 Micron Technology, Inc. Operations on memory cells
KR102641097B1 (ko) * 2018-12-31 2024-02-27 삼성전자주식회사 저항성 메모리 장치 및 저항성 메모리 장치의 프로그램 방법
KR20220035703A (ko) * 2020-09-14 2022-03-22 삼성전자주식회사 데이터 기입을 위한 저항성 메모리 장치 및 이의 동작 방법
CN115240734A (zh) * 2022-08-08 2022-10-25 中国科学院半导体研究所 阻变随机存储器的控制方法和控制系统
US12603140B2 (en) 2024-06-26 2026-04-14 Macronix International Co., Ltd. Soft programming method and erasing method for memory device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW338165B (en) 1996-09-09 1998-08-11 Sony Co Ltd Semiconductor nand type flash memory with incremental step pulse programming
JP2001067884A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 不揮発性半導体記憶装置
KR100674997B1 (ko) 2005-10-15 2007-01-29 삼성전자주식회사 상 변화 메모리 장치 및 상 변화 메모리 장치의 독출 동작제어방법
KR20110044535A (ko) * 2009-10-23 2011-04-29 삼성전자주식회사 비휘발성 메모리 장치, 이를 포함하는 저장 시스템 및 이의 구동 방법
JP2008084485A (ja) 2006-09-28 2008-04-10 Toshiba Corp 不揮発性半導体記憶装置及びデータ読出方法
KR100801082B1 (ko) * 2006-11-29 2008-02-05 삼성전자주식회사 멀티 레벨 가변 저항 메모리 장치의 구동 방법 및 멀티레벨 가변 저항 메모리 장치
JP5188328B2 (ja) * 2008-08-29 2013-04-24 株式会社日立製作所 半導体装置
KR101423612B1 (ko) 2008-09-16 2014-07-25 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 동작 방법, 그리고 그것을포함하는 메모리 시스템
US8374036B2 (en) 2008-11-14 2013-02-12 Hynix Semiconductor Inc. Method of operating nonvolatile memory device
KR101532584B1 (ko) * 2009-01-30 2015-06-30 삼성전자주식회사 비휘발성 메모리 장치, 및 그의 프로그램 방법
JP5233815B2 (ja) * 2009-04-22 2013-07-10 ソニー株式会社 抵抗変化型メモリデバイスおよびその動作方法

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