JP2013536999A5 - - Google Patents

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Publication number
JP2013536999A5
JP2013536999A5 JP2013527083A JP2013527083A JP2013536999A5 JP 2013536999 A5 JP2013536999 A5 JP 2013536999A5 JP 2013527083 A JP2013527083 A JP 2013527083A JP 2013527083 A JP2013527083 A JP 2013527083A JP 2013536999 A5 JP2013536999 A5 JP 2013536999A5
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JP
Japan
Prior art keywords
semiconductor die
chip package
vertical stack
semiconductor
semiconductor dies
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Application number
JP2013527083A
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English (en)
Japanese (ja)
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JP2013536999A (ja
JP6000952B2 (ja
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Publication date
Priority claimed from US12/874,446 external-priority patent/US8283766B2/en
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Publication of JP2013536999A publication Critical patent/JP2013536999A/ja
Publication of JP2013536999A5 publication Critical patent/JP2013536999A5/ja
Application granted granted Critical
Publication of JP6000952B2 publication Critical patent/JP6000952B2/ja
Active legal-status Critical Current
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JP2013527083A 2010-09-02 2011-08-04 静的屈曲部を有する傾斜スタックチップパッケージ Active JP6000952B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/874,446 US8283766B2 (en) 2010-09-02 2010-09-02 Ramp-stack chip package with static bends
US12/874,446 2010-09-02
PCT/US2011/046519 WO2012030470A2 (en) 2010-09-02 2011-08-04 Ramp-stack chip package with static bends

Publications (3)

Publication Number Publication Date
JP2013536999A JP2013536999A (ja) 2013-09-26
JP2013536999A5 true JP2013536999A5 (https=) 2014-09-11
JP6000952B2 JP6000952B2 (ja) 2016-10-05

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ID=44630458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013527083A Active JP6000952B2 (ja) 2010-09-02 2011-08-04 静的屈曲部を有する傾斜スタックチップパッケージ

Country Status (7)

Country Link
US (1) US8283766B2 (https=)
EP (1) EP2612356B1 (https=)
JP (1) JP6000952B2 (https=)
KR (1) KR101853754B1 (https=)
CN (1) CN103403865B (https=)
TW (1) TWI527132B (https=)
WO (1) WO2012030470A2 (https=)

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WO2014003533A1 (en) * 2012-06-25 2014-01-03 Intel Corporation Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same
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KR101994930B1 (ko) 2012-11-05 2019-07-01 삼성전자주식회사 일체형 단위 반도체 칩들을 갖는 반도체 패키지
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JP6133093B2 (ja) * 2013-03-25 2017-05-24 本田技研工業株式会社 電力変換装置
KR20150018099A (ko) * 2013-08-09 2015-02-23 에스케이하이닉스 주식회사 적층 반도체 장치
US9209165B2 (en) * 2013-10-21 2015-12-08 Oracle International Corporation Technique for controlling positions of stacked dies
US9825002B2 (en) * 2015-07-17 2017-11-21 Invensas Corporation Flipped die stack
US9871019B2 (en) 2015-07-17 2018-01-16 Invensas Corporation Flipped die stack assemblies with leadframe interconnects
US9837394B2 (en) 2015-12-02 2017-12-05 International Business Machines Corporation Self-aligned three dimensional chip stack and method for making the same
US9508691B1 (en) 2015-12-16 2016-11-29 Invensas Corporation Flipped die stacks with multiple rows of leadframe interconnects
US10566310B2 (en) 2016-04-11 2020-02-18 Invensas Corporation Microelectronic packages having stacked die and wire bond interconnects
US9929290B2 (en) 2016-06-20 2018-03-27 Globalfoundries Inc. Electrical and optical via connections on a same chip
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US10963780B2 (en) 2017-08-24 2021-03-30 Google Llc Yield improvements for three-dimensionally stacked neural network accelerators
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US11222865B2 (en) * 2020-05-12 2022-01-11 Western Digital Technologies, Inc. Semiconductor device including vertical bond pads
US20230247795A1 (en) 2022-01-28 2023-08-03 The Research Foundation For The State University Of New York Regenerative preheater for phase change cooling applications

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