CN105633052A - 封装结构及其制法 - Google Patents
封装结构及其制法 Download PDFInfo
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- CN105633052A CN105633052A CN201410603698.6A CN201410603698A CN105633052A CN 105633052 A CN105633052 A CN 105633052A CN 201410603698 A CN201410603698 A CN 201410603698A CN 105633052 A CN105633052 A CN 105633052A
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- protective layer
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- encapsulating structure
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
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Abstract
一种封装结构及其制法,该制法包括:于一载板上形成第一绝缘保护层;于该第一绝缘保护层上形成具有相对的第一表面与第二表面的介电体,该介电体嵌埋有线路层与形成于该线路层上的多个导电柱;于该介电体的第二表面形成第二绝缘保护层,其中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度大于250℃;以及移除该载板,所以藉由使用玻璃转移温度大于该介电体的第一或第二绝缘保护层,因而无须以支撑件做辅助,仍具有较佳的强度,得以避免封装结构发生翘曲的缺失。
Description
技术领域
本发明涉及一种封装结构及其制法,尤指一种供半导体封装的线路封装结构及其制法。
背景技术
随着电子产业的蓬勃发展,许多高阶电子产品都逐渐朝往轻、薄、短、小等高集积度方向发展,且随着封装技术的演进,晶片的封装技术也越来越多样化,半导体封装件的尺寸或体积也随之不断缩小,藉以使该半导体封装件达到轻薄短小的目的。
一般封装结构的制法如图1A至图1F所示者为现有的封装结构的制法的剖视图。
如图1A所示,于一载板10上形成线路层11。
再于部分该线路层11上形成导电柱13,如图1B所示。
接着,形成具有相对的第一表面12a与第二表面12b的介电体12,使该导电柱13与线路层11嵌埋于其中,如图1C所示。
如图1D所示,移除部份该载板10,并保留部分该载板10’以作为支撑之用,并于该介电体12的第一表面12a上设置并电性连接半导体元件40。
如图1E至图1F所示,以模具90于由该介电体12的第一表面12a与该模具90所构成的容置空间900中灌注封装胶体42,而得到如图1F的经封装的现有封装结构1。
上述封装结构的制法中未避免在温度较高的制程中,该封装结构发生翘曲因而藉由所保留的部分该载板10’作为支撑。
然而,通常而言,该载板10’(如,钢板)因加工方式的限制,厚度最低仅能达到200微米(μm),即便将模具90的模穴拉成与该载板10’齐平,如图1E’所示,所形成的封装胶体42的厚度h1仍无法突破200微米厚度的限制,遂使整体封装结构的厚度难以降低。
随着电子产业朝轻、薄、短、小的方向发展,此结构也无法。因此,需要予以改善。
但随着电子产品微小化的需求增加,现有封装结构显然无法符合电子元件轻薄短小的发展趋势,因此,如何在不增加制程的复杂度,即能得到厚度更薄的封装结构,实为业界迫切待开发的方向。
发明内容
鉴于上述现有技术的缺失,本发明提供一种封装结构及其制法,避免封装结构发生翘曲的缺失。
本发明的封装结构的制法,包括:于一载板上形成第一绝缘保护层;于该第一绝缘保护层上形成具有相对的第一表面与第二表面的介电体,且该介电体以其第一表面形成于该第一绝缘保护层上,该介电体中嵌埋有线路层与形成于该线路层上的多个导电柱;于该介电体的第二表面形成第二绝缘保护层,其中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度大于250℃;以及移除该载板。
本发明还提供一种封装结构,包括:介电体,其具有相对的第一表面与第二表面;线路层,其嵌埋于该介电体中;多个导电柱,其嵌埋于该介电体中并形成于该线路层上;第一绝缘保护层,其形成于该介电体的第一表面上;以及第二绝缘保护层,其形成于该介电体的第二表面上,其中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度大于250℃。
于本发明的封装结构及其制法中,该导电柱外露于该介电体的第二表面。其中,该第一绝缘保护层还包括多个外露出该线路层的第一开口;该第二绝缘保护层还包括多个外露出该导电柱端面的第二开口。还包括在外露于各该第一开口的部分该线路层上形成多个导电凸块,该导电凸块的高度为50微米。
于本发明的封装结构及其制法中,还包括于该第一绝缘保护层上设置半导体元件,该半导体元件电性连接至该线路层。还包括于该第一绝缘保护层上形成封装胶体,使该封装胶体包覆该半导体元件。
于前述本发明的封装结构及其制法中,该封装胶体的厚度介于20至180微米。
于本发明的封装结构及其制法中,该第一绝缘保护层的厚度及/或该第二绝缘保护层的厚度介于1至20微米。
于本发明的封装结构及其制法中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度大于400℃。
于本发明的封装结构及其制法中,形成该第一绝缘保护层及/或该第二绝缘保护层的材质选自聚酰亚胺、聚酰胺酰亚胺、或聚苯咪唑。
由上可知,本发明藉由使用玻璃转移温度较高的第一绝缘保护层及/或第二绝缘保护层,得以在不需保留部分该载板作为支撑的情况下,即能防止封装结构发生翘曲的问题。
此外,本案的第一绝缘保护层与第二绝缘保护层更可做为绝缘保护线路之用,也不会额外增加整体封装的厚度,得以使后续设置半导体元件时,用于嵌埋该半导体元件的封装胶体的厚度低于200微米,因此得以降低整体封装结构的厚度,进而应用于厚度较小的电子产品。
附图说明
图1A至图1F为现有封装结构的制法的示意图,其中,图1E’为图1E的现有封装结构的另一实施例;以及
图2A至图2E”为显示本发明封装结构的制法的示意图,其中,图2A’为图2A的另一实施例,图2B’为图2B的另一实施例,图2D’为图2D的另一实施例,图2E’为图2E的另一实施例,以及图2E”为图2E的再一实施例。
符号说明
1、3、3’、4、4’、4”封装结构
10、10’、20载板
11、31线路层
12、32介电体
12a、32a第一表面
12b、32b第二表面
13、33导电柱
21晶种层
30第一绝缘保护层
30a第一开口
33a端面
34第二绝缘保护层
34a第二开口
37、37’表面处理层
40半导体元件
41、41’导电凸块
42封装胶体
90模具
900容置空间
h1、h2厚度
t高度。
具体实施方式
以下藉由特定的具体实例说明本发明的实施方式,熟悉此技艺的人士可由本说明书所揭示的内容轻易地了解本发明的其他优点与功效。本发明也可藉由其他不同的具体实例加以施行或应用,本说明书中的各项细节也可基于不同观点与应用,在不悖离本发明的精神下进行各种修饰与变更。
须知,本说明书所附图式所绘示的结构、比例、大小等,均仅用于配合说明书所揭示的内容,以供熟悉此技艺的人士的了解与阅读,并非用于限定本创作可实施的限定条件,所以不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本创作所能产生的功效及所能达成的目的下,均应仍落在本创作所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如「上」、「第一」、「第二」、「端面」等用语,也仅为便于叙述的明了,而非用于限定本创作可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当亦视为本创作可实施的范畴。
请参阅图2A至图2E为显示本发明封装结构的制法的剖视图。
如图2A所示,于一载板20上形成第一绝缘保护层30。
于本实施例中,以表面形成有金属层(例如,铜)的承载板(如,钢板、硅板、玻璃承载板)作为载板20。
此外,该第一绝缘保护层30的玻璃转移温度(glasstransitiontemperature,简称TG)大于250℃,较佳为大于400℃。
又,形成该第一绝缘保护层30的材质选自聚酰亚胺(polyimide,简称PI)、聚酰胺酰亚胺(polyamide-imide,简称PAI)或聚苯咪唑(polybenzimidazole,简称PBI)。
另外,于其它实施例中,该第一绝缘保护层30上还可形成有晶种层(seedlayer)21,以用于后续电镀线路之用,如图2A’所示,其中,对于该晶种层21的材质并未有特殊限制,仅需为可被蚀刻图案化的金属即可。
如图2B所示,于该第一绝缘保护层30上形成具有相对的第一表面32a与第二表面32b的介电体32,该介电体32嵌埋有线路层31与形成于该线路层31上的多个导电柱33,且该导电柱33的端面33a外露于该第二表面32b。
于本实施例中,对于该介电体32、线路层31与导电柱33的设置顺序并未有特殊限制,于本实施例中先于该第一绝缘保护层30上形成线路层31,并于部分该线路层31上形成导电柱33,再形成介电材料于该第一绝缘保护层30上使该等线路层31与导电柱33嵌埋于该介电体32中。
此外,对于形成该介电体32的材质并未有特殊限制,包括模压树脂(moldingcompound)、预浸材(prepreg)或感光型介电层(photodielectric)。或者,形成该介电体32的材质也可使用与该第一绝缘层30相同的材质形成。
又,对于该导电柱33的形状并未有特殊限制,可为圆柱体、椭圆柱体或多边形柱体皆可。
此外,倘若为延续如图2A’的制程,该线路层31形成于该晶种层21上,如图2B’所示。
如图2C所示,于该介电体30的第二表面30b形成第二绝缘保护层34。
于本实施例中,该第二绝缘保护层34的玻璃转移温度大于250℃,更佳为大于400℃。
此外,形成该第二绝缘保护层34的材质选自聚酰亚胺(PI)、聚酰胺酰亚胺(PAI)或聚苯咪唑(PBI)。
如图2D所示,其接续第2C图的制程,移除该载板20,以外露出整该第一绝缘保护层30。接着,于该第一绝缘保护层30与该第二绝缘保护层34上分别形成用于外露出该线路层31与导电柱33的多个第一开口30a与多个第二开口34a。之后并进行切单制程得到本发明的封装结构3。
于本实施例中,可于该线路层31与该导电柱33上分别形成表面处理层37,37’。其中,形成该表面处理层37,37’的材质为镍、钯、金所组群组的合金或有机保焊层(OrganicSolderabilityPreservatives,简称OSP)。
此外,若接续图2B’的制程,该表面处理层37将形成于该线路层31的晶种层21的表面上,如图2D’所示的封装结构3’。
于本发明的封装结构3中,藉由该第一绝缘保护层30的玻璃转移温度及/或该第二绝缘保护层34的玻璃转移温度大于250℃,使后续制程中不需保留载板20作为支撑,即能藉由该第一绝缘保护层30及/或该第二绝缘保护层34提供本发明的封装结构3不易脆裂、于高温制程中不具有流动性的良好地结构刚性。
于后续制程中,如图2E所示,于该第一绝缘保护层30上可设置半导体元件40,该半导体元件40电性连接至该线路层31,且于该第一绝缘保护层30上形成封装胶体42,以包覆该半导体元件40。具体地,形成多个如焊锡材料的导电凸块41于外露于各该第一开口30a的部分该线路层31上,使该半导体元件40藉由该些导电凸块41电性连接至该线路层31。
于本实施例中,该封装胶体42的玻璃转移温度小于该第一绝缘保护层30的玻璃转移温度或该第二绝缘保护层34的玻璃转移温度。
此外,图2E’为接续图2D’的制程。
又,如图2E”所示,该导电凸块41’包含铜柱与焊锡材料。
另外,该封装胶体42的厚度h2为介于20至180微米,且该导电凸块41的高度t为50微米。
于本发明的封装结构4,4’,4”中,由于该第一绝缘保护层30的玻璃转移温度及/或该第二绝缘保护层34的玻璃转移温度大于250℃,所以不需保留载板20作为支撑,因此该封装胶体42的厚度h2能介于20至180微米。
本发明提供一种封装结构3,3’,4,4’,4”,包括:一介电体32、一线路层31、多个导电柱33、一第一绝缘保护层30以及一第二绝缘保护层34。
所述的介电体32具有相对的第一表面32a与第二表面32b。
所述的线路层31嵌埋于该介电体32中。
所述的多个导电柱33嵌埋于该介电体32中并形成于该线路层31上。
所述的第一绝缘保护层30形成于该介电体32的第一表面32a上,所述的第二绝缘保护层34形成于该介电体32的第二表面32b上,该第一绝缘保护层30及/或该第二绝缘保护层34的厚度为介于1至20微米。其中,该第一绝缘保护层30的玻璃转移温度及/或该第二绝缘保护层34的玻璃转移温度为大于250℃。
于一实施例中,该导电柱33外露于该介电体32的第二表面32b。该第一绝缘保护层30还包括外露出该线路层31的第一开口30a,该第二绝缘保护层34还包括外露出该导电柱33的第二开口34a。还包括多个导电凸块41,41’,其对应形成于各该第一开口30a中的该线路层31上。其中,该导电凸块41,41’的高度t为50微米。
于一实施例中,还包括于该第一绝缘保护层30上设置半导体元件40,该半导体元件40电性连接至该线路层31。还包括于该第一绝缘保护层30上形成封装胶体42,使该封装胶体42包覆该半导体元件40,且该封装胶体42的厚度h2为介于20至180微米。
于一实施例中,该第一绝缘保护层30的玻璃转移温度及/或该第二绝缘保护层34的玻璃转移温度大于400℃。
于一实施例中,形成该第一绝缘保护层30及/或该第二绝缘保护层34的材质选自聚酰亚胺、聚酰胺酰亚胺、或聚苯咪唑。
由上可知,于本发明藉由使用玻璃转移温度较高的第一绝缘保护层及/或第二绝缘保护层,得以在不需保留部分该载板作为支撑的情况下,即能防止封装结构发生翘曲的问题。
此外,由于本发明的第一绝缘保护层及/或第二绝缘保护层具有较高的玻璃转移温度,因此于进行高温且时间较长的回焊制程(如,红外线回焊制程(IRreflow))时,不会发生软化的现象、变形量小、不易产生位移,相较于现有封装结构本发明的封装结构更具有对位精准度高的功效。
此外,本案的第一绝缘保护层与第二绝缘保护层更可做为绝缘保护线路之用,也不会额外增加整体封装结构的厚度,得以使后续设置半导体元件时,用于嵌埋该半导体元件的封装胶体的厚度低于200微米(μm),因此得以降低整体封装结构的厚度,进而应用于厚度较小的电子产品。
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修饰与改变。因此,本发明的权利保护范围,应如权利要求书所列。
Claims (22)
1.一种封装结构的制法,包括:
于一载板上形成第一绝缘保护层;
于该第一绝缘保护层上形成具有相对的第一表面与第二表面的介电体,且该介电体以其第一表面形成于该第一绝缘保护层上,该介电体中嵌埋有线路层与形成于该线路层上的多个导电柱;
于该介电体的第二表面形成第二绝缘保护层,其中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度为大于250℃;以及
移除该载板。
2.如权利要求1所述的封装结构的制法,其特征为,该导电柱外露于该介电体的第二表面。
3.如权利要求2所述的封装结构的制法,其特征为,该制法还包括于该第一绝缘保护层形成外露出该线路层的第一开口,于该第二绝缘保护层形成外露出该导电柱的第二开口。
4.如权利要求3所述的封装结构的制法,其特征为,该制法还包括在外露于各该第一开口的部分该线路层上形成多个导电凸块。
5.如权利要求4所述的封装结构的制法,其特征为,该导电凸块的高度为50微米。
6.如权利要求1所述的封装结构的制法,其特征为,该制法还包括于该第一绝缘保护层上设置半导体元件,该半导体元件电性连接至该线路层。
7.如权利要求6所述的封装结构的制法,其特征为,该制法还包括于该第一绝缘保护层上形成封装胶体,使该封装胶体包覆该半导体元件。
8.如权利要求7所述的封装结构的制法,其特征为,该封装胶体的厚度为20至180微米。
9.如权利要求1所述的封装结构的制法,其特征为,该第一绝缘保护层的厚度或该第二绝缘保护层的厚度介于1至20微米。
10.如权利要求1所述的封装结构的制法,其特征为,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度为大于400℃。
11.如权利要求1所述的封装结构的制法,其特征为,形成该第一绝缘保护层及/或该第二绝缘保护层的材质选自聚酰亚胺、聚酰胺酰亚胺、或聚苯咪唑。
12.一种封装结构,包括:
介电体,其具有相对的第一表面与第二表面;
线路层,其嵌埋于该介电体中;
多个导电柱,其嵌埋于该介电体中并形成于该线路层上;
第一绝缘保护层,其形成于该介电体的第一表面上;以及
第二绝缘保护层,其形成于该介电体的第二表面上,其中,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度大于250℃。
13.如权利要求12所述的封装结构,其特征为,该导电柱外露于该介电体的第二表面。
14.如权利要求13所述的封装结构,其特征为,该第一绝缘保护层还包括多个外露出该线路层的第一开口;该第二绝缘保护层还包括多个外露出该导电柱的第二开口。
15.如权利要求14所述的封装结构,其特征为,该封装结构还包括多个导电凸块,各该导电凸块对应形成于各该第一开口中的该线路层上。
16.如权利要求15所述的封装结构,其特征为,该导电凸块的高度为50微米。
17.如权利要求12所述的封装结构,其特征为,该封装结构还包括设于该第一绝缘保护层上的半导体元件,其电性连接至该线路层。
18.如权利要求17所述的封装结构,其特征为,该封装结构还包括形成于该第一绝缘保护层上的封装胶体,其包覆该半导体元件。
19.如权利要求18所述的封装结构,其特征为,该封装胶体的厚度介于20至180微米。
20.如权利要求12所述的封装结构,其特征为,该第一绝缘保护层的厚度或该第二绝缘保护层的厚度介于1至20微米。
21.如权利要求12所述的封装结构,其特征为,该第一绝缘保护层的玻璃转移温度及/或该第二绝缘保护层的玻璃转移温度为大于400℃。
22.如权利要求12所述的封装结构,其特征为,形成该第一绝缘保护层及/或该第二绝缘保护层的材质选自聚酰亚胺、聚酰胺酰亚胺、或聚苯咪唑。
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US20170229319A1 (en) | 2017-08-10 |
TWI559829B (zh) | 2016-11-21 |
US20160118323A1 (en) | 2016-04-28 |
TW201616933A (zh) | 2016-05-01 |
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