KR101853754B1 - 고정 벤드를 구비한 램프 스택 칩 패키지 - Google Patents

고정 벤드를 구비한 램프 스택 칩 패키지 Download PDF

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KR101853754B1
KR101853754B1 KR1020137005325A KR20137005325A KR101853754B1 KR 101853754 B1 KR101853754 B1 KR 101853754B1 KR 1020137005325 A KR1020137005325 A KR 1020137005325A KR 20137005325 A KR20137005325 A KR 20137005325A KR 101853754 B1 KR101853754 B1 KR 101853754B1
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semiconductor die
component
semiconductor
lamp component
semiconductor dies
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KR20130136446A (ko
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존 에이. 하라다
데이비드 씨. 더글라스
로버트 제이. 드로스트
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오라클 인터내셔날 코포레이션
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10W90/00Package configurations
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/43Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
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    • H10W72/221Structures or relative sizes
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    • H10W72/241Dispositions, e.g. layouts
    • H10W72/244Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
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    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020137005325A 2010-09-02 2011-08-04 고정 벤드를 구비한 램프 스택 칩 패키지 Active KR101853754B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/874,446 US8283766B2 (en) 2010-09-02 2010-09-02 Ramp-stack chip package with static bends
US12/874,446 2010-09-02
PCT/US2011/046519 WO2012030470A2 (en) 2010-09-02 2011-08-04 Ramp-stack chip package with static bends

Publications (2)

Publication Number Publication Date
KR20130136446A KR20130136446A (ko) 2013-12-12
KR101853754B1 true KR101853754B1 (ko) 2018-06-20

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Country Status (7)

Country Link
US (1) US8283766B2 (https=)
EP (1) EP2612356B1 (https=)
JP (1) JP6000952B2 (https=)
KR (1) KR101853754B1 (https=)
CN (1) CN103403865B (https=)
TW (1) TWI527132B (https=)
WO (1) WO2012030470A2 (https=)

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JP6133093B2 (ja) * 2013-03-25 2017-05-24 本田技研工業株式会社 電力変換装置
KR20150018099A (ko) * 2013-08-09 2015-02-23 에스케이하이닉스 주식회사 적층 반도체 장치
US9209165B2 (en) * 2013-10-21 2015-12-08 Oracle International Corporation Technique for controlling positions of stacked dies
US9825002B2 (en) * 2015-07-17 2017-11-21 Invensas Corporation Flipped die stack
US9871019B2 (en) 2015-07-17 2018-01-16 Invensas Corporation Flipped die stack assemblies with leadframe interconnects
US9837394B2 (en) 2015-12-02 2017-12-05 International Business Machines Corporation Self-aligned three dimensional chip stack and method for making the same
US9508691B1 (en) 2015-12-16 2016-11-29 Invensas Corporation Flipped die stacks with multiple rows of leadframe interconnects
US10566310B2 (en) 2016-04-11 2020-02-18 Invensas Corporation Microelectronic packages having stacked die and wire bond interconnects
US9929290B2 (en) 2016-06-20 2018-03-27 Globalfoundries Inc. Electrical and optical via connections on a same chip
US9728524B1 (en) 2016-06-30 2017-08-08 Invensas Corporation Enhanced density assembly having microelectronic packages mounted at substantial angle to board
CN107993997B (zh) 2016-10-26 2020-06-16 晟碟信息科技(上海)有限公司 半导体器件
CN108933109B (zh) 2017-05-27 2020-07-07 晟碟信息科技(上海)有限公司 成角度的裸芯的半导体器件
US10963780B2 (en) 2017-08-24 2021-03-30 Google Llc Yield improvements for three-dimensionally stacked neural network accelerators
KR20190052957A (ko) * 2017-11-09 2019-05-17 에스케이하이닉스 주식회사 다이 오버시프트 지시 패턴을 포함하는 반도체 패키지
US20190279962A1 (en) * 2018-03-09 2019-09-12 Oracle International Corporation Method and apparatus for stacking warped chips to assemble three-dimensional integrated circuits
US11222865B2 (en) * 2020-05-12 2022-01-11 Western Digital Technologies, Inc. Semiconductor device including vertical bond pads
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US8283766B2 (en) 2012-10-09
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JP2013536999A (ja) 2013-09-26
US20120056327A1 (en) 2012-03-08
JP6000952B2 (ja) 2016-10-05
WO2012030470A3 (en) 2012-05-03
CN103403865A (zh) 2013-11-20
EP2612356A2 (en) 2013-07-10
TW201234501A (en) 2012-08-16
CN103403865B (zh) 2016-08-03
TWI527132B (zh) 2016-03-21
KR20130136446A (ko) 2013-12-12

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