JP2013535026A - タイミングコントローラ及びそれを備える液晶ディスプレイ - Google Patents
タイミングコントローラ及びそれを備える液晶ディスプレイ Download PDFInfo
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- JP2013535026A JP2013535026A JP2013514547A JP2013514547A JP2013535026A JP 2013535026 A JP2013535026 A JP 2013535026A JP 2013514547 A JP2013514547 A JP 2013514547A JP 2013514547 A JP2013514547 A JP 2013514547A JP 2013535026 A JP2013535026 A JP 2013535026A
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- Prior art keywords
- clock signal
- timing controller
- video stream
- stream data
- output
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/18—Timing circuits for raster scan displays
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Controls And Circuits For Display Device (AREA)
- Liquid Crystal (AREA)
Abstract
【選択図】図4
Description
Claims (8)
- 入力された直列ビデオストリームデータを並列ビデオストリームデータに変換することに用いられるデータ変換モジュール10と、
前記並列ビデオストリームデータを保存することに用いられるメモリ30とを含むタイミングコントローラであって、
前記メモリ30に接続され、所定のクロック信号を生成し、前記所定のクロック信号による制御で前記並列ビデオストリームデータを出力することに用いられる出力モジュール50をさらに含むことを特徴とするタイミングコントローラ。 - 前記出力モジュール50は、
前記所定のクロック信号の周波数値を供給するクロック信号周波数供給回路と、
前記クロック信号周波数供給回路に接続され、前記所定のクロック信号の周波数値によって、前記所定のクロック信号を生成することに用いられる第1の位相ロックループ53と、
前記メモリ30及び前記第1の位相ロックループ53に接続され、前記所定のクロック信号による制御で、前記並列ビデオストリームデータを含む差分出力信号を出力することに用いられる差分出力ユニット55と
を含むことを特徴とする請求項1に記載のタイミングコントローラ。 - 前記第1の位相ロックループ53の出力端は、前記メモリ30に接続され、前記メモリ30に前記所定のクロック信号を供給することを特徴とする請求項2に記載のタイミングコントローラ。
- 前記クロック信号周波数供給回路は、
前記第1の位相ロックループ53に接続され、前記第1の位相ロックループ53に基準クロック信号周波数値を供給する基準周波数供給ユニット511と、
前記第1の位相ロックループ53に接続され、前記所定のクロック信号の周波数値を供給する周波数生成ユニット513と
を含むことを特徴とする請求項2又は請求項3に記載のタイミングコントローラ。 - 前記所定のクロック信号の周波数値tx_clkは、式:tx_clk=k*osc_clkにより算出され、ここで、kは所定の比例係数値であり、osc_clkは前記基準クロック信号周波数値であることを特徴とする請求項4に記載のタイミングコントローラ。
- 前記データ変換モジュール10は、
入力された画素クロック信号を受信する差分信号入力ユニット11と、
入力端が前記差分信号入力ユニット11に接続され、前記画素クロック信号を受信し、多相クロック信号を生成して前記差分信号入力ユニット11のクロック信号入力端に送信することに用いられる第2の位相ロックループ13と、を含み、
ここで、前記差分信号入力ユニット11が、前記直列ビデオストリームデータを受信し、前記多相クロック信号に基づいて前記並列ビデオストリームデータを生成することに用いられることを特徴とする請求項1乃至3のいずれかに記載のタイミングコントローラ。 - 前記差分信号入力ユニット11は、さらに前記多相クロック信号を前記メモリ30に送信することに用いられることを特徴とする請求項6に記載のタイミングコントローラ。
- 請求項1乃至7のいずれかに記載のタイミングコントローラを含むことを特徴とする液晶ディスプレイ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110131088.7 | 2011-05-19 | ||
CN2011101310887A CN102222457B (zh) | 2011-05-19 | 2011-05-19 | 定时控制器及具有其的液晶显示器 |
PCT/CN2011/078490 WO2012155401A1 (zh) | 2011-05-19 | 2011-08-16 | 定时控制器及具有其的液晶显示器 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2013535026A true JP2013535026A (ja) | 2013-09-09 |
Family
ID=44778999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013514547A Pending JP2013535026A (ja) | 2011-05-19 | 2011-08-16 | タイミングコントローラ及びそれを備える液晶ディスプレイ |
Country Status (6)
Country | Link |
---|---|
US (1) | US9069397B2 (ja) |
JP (1) | JP2013535026A (ja) |
KR (1) | KR101327966B1 (ja) |
CN (1) | CN102222457B (ja) |
TW (1) | TW201248586A (ja) |
WO (1) | WO2012155401A1 (ja) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9668367B2 (en) | 2014-02-04 | 2017-05-30 | Microsoft Technology Licensing, Llc | Wearable computing systems |
USD778768S1 (en) | 2015-06-24 | 2017-02-14 | Flexterra, Inc. | Segment of wearable device having flexible display panel |
USD778770S1 (en) | 2015-06-24 | 2017-02-14 | Flexterra, Inc. | Segment of wearable device having flexible display panel |
USD778769S1 (en) | 2015-06-24 | 2017-02-14 | Flexterra, Inc. | Segment of wearable device having flexible display panel |
USD807350S1 (en) | 2015-07-02 | 2018-01-09 | Flexterra, Inc. | Wearable device having flexible display panel |
KR102366952B1 (ko) * | 2015-07-14 | 2022-02-23 | 주식회사 엘엑스세미콘 | 지연고정루프 기반의 클럭 복원 장치 및 이를 구비한 수신 장치 |
JP6845275B2 (ja) | 2018-11-22 | 2021-03-17 | ラピスセミコンダクタ株式会社 | 表示装置及びデータドライバ |
CN111210785B (zh) * | 2018-11-22 | 2022-09-13 | 拉碧斯半导体株式会社 | 显示装置以及数据驱动器 |
US11087708B2 (en) * | 2019-06-05 | 2021-08-10 | Himax Technologies Limited | Method for transmitting data from timing controller to source driver and associated timing controller and display system |
JP6744456B1 (ja) * | 2019-07-11 | 2020-08-19 | ラピスセミコンダクタ株式会社 | データドライバ及び表示装置 |
CN111710282B (zh) * | 2020-07-02 | 2023-04-07 | 硅谷数模(苏州)半导体股份有限公司 | 时序控制器的控制方法、控制装置和数据传输系统 |
CN111857235B (zh) * | 2020-07-20 | 2022-04-19 | 硅谷数模(苏州)半导体有限公司 | 门定时信号生成方法及装置 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0573004A (ja) * | 1991-09-13 | 1993-03-26 | Casio Comput Co Ltd | 画像表示装置 |
JPH10319928A (ja) * | 1997-04-15 | 1998-12-04 | Genesis Microchip Inc | フォーマット変換用マルチスキャンビデオタイミング発生器 |
JPH11272549A (ja) * | 1998-10-19 | 1999-10-08 | Seiko Epson Corp | Lcd表示回路 |
JP2003330427A (ja) * | 2002-05-13 | 2003-11-19 | Matsushita Electric Ind Co Ltd | 走査線変換装置 |
JP2005538397A (ja) * | 2002-09-06 | 2005-12-15 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | スクリーン上への画像表示において干渉パターンを低減するための制御ユニットおよび方法 |
JP2010134162A (ja) * | 2008-12-04 | 2010-06-17 | Sharp Corp | 表示装置 |
JP2010170144A (ja) * | 2000-07-26 | 2010-08-05 | Renesas Electronics Corp | 表示制御方法及び装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6020901A (en) * | 1997-06-30 | 2000-02-01 | Sun Microsystems, Inc. | Fast frame buffer system architecture for video display system |
KR100256502B1 (ko) | 1997-10-14 | 2000-05-15 | 전주범 | 피디피 텔레비전의 데이터분리처리장치 |
KR100562860B1 (ko) * | 2005-09-23 | 2006-03-24 | 주식회사 아나패스 | 디스플레이, 컬럼 구동 집적회로, 멀티레벨 검출기 및멀티레벨 검출 방법 |
KR100583631B1 (ko) * | 2005-09-23 | 2006-05-26 | 주식회사 아나패스 | 클록 신호가 임베딩된 멀티 레벨 시그널링을 사용하는디스플레이, 타이밍 제어부 및 컬럼 구동 집적회로 |
JP5019419B2 (ja) * | 2006-07-07 | 2012-09-05 | ルネサスエレクトロニクス株式会社 | 表示データ受信回路及び表示パネルドライバ |
KR101394435B1 (ko) * | 2007-09-28 | 2014-05-14 | 삼성디스플레이 주식회사 | 백라이트 드라이버 및 이를 포함하는 액정 표시 장치 |
KR101174768B1 (ko) * | 2007-12-31 | 2012-08-17 | 엘지디스플레이 주식회사 | 평판 표시 장치의 데이터 인터페이스 장치 및 방법 |
KR101323703B1 (ko) * | 2008-12-15 | 2013-10-30 | 엘지전자 주식회사 | 액정표시장치 |
-
2011
- 2011-05-19 CN CN2011101310887A patent/CN102222457B/zh active Active
- 2011-08-16 JP JP2013514547A patent/JP2013535026A/ja active Pending
- 2011-08-16 US US13/503,744 patent/US9069397B2/en active Active
- 2011-08-16 WO PCT/CN2011/078490 patent/WO2012155401A1/zh active Application Filing
- 2011-08-16 KR KR1020117025172A patent/KR101327966B1/ko active IP Right Grant
- 2011-09-28 TW TW100134954A patent/TW201248586A/zh unknown
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0573004A (ja) * | 1991-09-13 | 1993-03-26 | Casio Comput Co Ltd | 画像表示装置 |
JPH10319928A (ja) * | 1997-04-15 | 1998-12-04 | Genesis Microchip Inc | フォーマット変換用マルチスキャンビデオタイミング発生器 |
JPH11272549A (ja) * | 1998-10-19 | 1999-10-08 | Seiko Epson Corp | Lcd表示回路 |
JP2010170144A (ja) * | 2000-07-26 | 2010-08-05 | Renesas Electronics Corp | 表示制御方法及び装置 |
JP2003330427A (ja) * | 2002-05-13 | 2003-11-19 | Matsushita Electric Ind Co Ltd | 走査線変換装置 |
JP2005538397A (ja) * | 2002-09-06 | 2005-12-15 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | スクリーン上への画像表示において干渉パターンを低減するための制御ユニットおよび方法 |
JP2010134162A (ja) * | 2008-12-04 | 2010-06-17 | Sharp Corp | 表示装置 |
Also Published As
Publication number | Publication date |
---|---|
TW201248586A (en) | 2012-12-01 |
CN102222457A (zh) | 2011-10-19 |
WO2012155401A1 (zh) | 2012-11-22 |
US20140071115A1 (en) | 2014-03-13 |
KR101327966B1 (ko) | 2013-11-13 |
KR20130009576A (ko) | 2013-01-23 |
CN102222457B (zh) | 2013-11-13 |
US9069397B2 (en) | 2015-06-30 |
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