JP2013518443A - 熱管理のための微細加工されたピラーフィン - Google Patents
熱管理のための微細加工されたピラーフィン Download PDFInfo
- Publication number
- JP2013518443A JP2013518443A JP2012551265A JP2012551265A JP2013518443A JP 2013518443 A JP2013518443 A JP 2013518443A JP 2012551265 A JP2012551265 A JP 2012551265A JP 2012551265 A JP2012551265 A JP 2012551265A JP 2013518443 A JP2013518443 A JP 2013518443A
- Authority
- JP
- Japan
- Prior art keywords
- die
- fins
- pillar
- package
- electrical package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims abstract description 52
- 239000010410 layer Substances 0.000 claims description 56
- 230000008569 process Effects 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 20
- 239000004020 conductor Substances 0.000 claims description 16
- 239000011247 coating layer Substances 0.000 claims description 8
- 238000000206 photolithography Methods 0.000 claims description 4
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 4
- 238000005530 etching Methods 0.000 claims 1
- 239000000945 filler Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 41
- 239000002184 metal Substances 0.000 description 41
- 235000012431 wafers Nutrition 0.000 description 32
- 239000000758 substrate Substances 0.000 description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 17
- 229910052802 copper Inorganic materials 0.000 description 17
- 239000010949 copper Substances 0.000 description 17
- 239000000463 material Substances 0.000 description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 238000004891 communication Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- 239000011135 tin Substances 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06568—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
102 基板
104 ダイ
106 システムボード
108 半田ボール
110 アンダーフィル層
112 放熱板
114 サーマルペースト
116 半田ボール
200 電気パッケージ
202 システムボード
204 基板
206 ダイ
208 半田ボール
210 アンダーフィル層
212 フリップチップバンプ
214 単一層
216 金属充填ビア
218 金属層
220 ピラーフィン
300 電気パッケージ
302 システムボード
304 ダイ
306 フリップチップバンプ
308 アンダーフィル層
310 層
312 金属層
314 ピラーフィン
316 金属充填ビア
400 ダイ
402 背面
404 ピラーフィン
406 チャネル
500 電気パッケージ
502 システムボード
504 基板
506 第1ダイ
508 半田ボール
510 アンダーフィル層
512 フリップチップバンプ
514 層
516 金属層
518 金属充填ビア
520 ピラーフィン
522 マイクロバンプ
524 第2ダイ
526 金属層
528 ピラーフィン
530 ビア
600 電気パッケージ
602 システムボード
604 第1ダイ
606 第2ダイ
608 アンダーフィル層
610 フリップチップバンプ
612 層
614 金属層
616 ビア
618 ピラーフィン
620 マイクロバンプ
622 金属層
624 ピラーフィン
626 ビア
800 無線通信システム
820 リモートユニット
830 リモートユニット
840 ベースステーション
850 リモートユニット
880 フォワードリンク信号
890 リバースリンク信号
Claims (33)
- 外表面を有するダイと、
前記外表面に一体的に形成され、パッケージからの熱を分散するためにそこから外側に延長するフィンと、
を備える、電気パッケージ。 - 前記フィンが、導体材料で形成される、請求項1に記載の電気パッケージ。
- 前記フィンが、円筒形、正方形又は長方形の断面を有する、請求項1に記載の電気パッケージ。
- 前記フィンが、複数のフィンを含む、請求項1に記載の電気パッケージ。
- 前記複数のフィンの間に画定されるチャネルをさらに備える、請求項4に記載の電気パッケージ。
- 前記複数のフィンが、前記ダイの外表面を実質的に占める、請求項4に記載の電気パッケージ。
- 前記複数のフィンの各々の断面が、前記外表面の形状と実質的に同様である、請求項4に記載の電気パッケージ。
- 前記フィンが、約3:1から約10:1の間のアスペクト比を有する、請求項1に記載の電気パッケージ。
- 前記ダイに形成されるビアをさらに備える、請求項1に記載の電気パッケージ。
- 前記外表面が、周囲環境に曝される、請求項1に記載の電気パッケージ。
- 各々が外表面を有する複数のダイと、
前記少なくとも1つのダイの表面から外側に延長する複数のフィンと、
をさらに備える電気パッケージであって、
前記複数のダイが、連結され、前記パッケージ内に積層される、電気パッケージ。 - 前記複数のフィンが、前記少なくとも1つのダイの外表面に一体的に形成される、請求項11に記載の電気パッケージ。
- 前記複数のフィンが、上部ダイ及び下部ダイを備え、前記上部ダイが、複数のマイクロバンプによって前記下部ダイに連結される、請求項11に記載の電気パッケージ。
- 前記複数のフィンが、前記上部ダイの表面及び前記下部ダイの表面の一部から外側に延長する、請求項13に記載の電気パッケージ。
- 前記複数のダイが、少なくとも1つの中間ダイを含み、前記中間ダイの背面が、前記上部ダイに連結するための複数のマイクロバンプを備え、前記中間ダイの前面が、前記下部ダイに連結するための複数のマイクロバンプを備える、請求項13に記載の電気パッケージ。
- 前記少なくとも1つの中間ダイの背面の一部が、そこから外側に延長する複数のフィンを備える、請求項15に記載の電気パッケージ。
- ウエハにダイを組み立てる段階と、
前記ダイの表面にピラーフィンの断面形状を形成する段階と、
前記ダイの表面にピラーフィンを一体的に形成する段階と、
前記ダイを分離するために前記ウエハをダイシングする段階と、
を含む、ダイの組立方法。 - 前記ピラーフィンが、フォトリソグラフィを用いて形成される、請求項17に記載の方法。
- 前記ダイの表面にマイクロバンプを組み立てる段階をさらに含む、請求項17に記載の方法。
- 前記ピラーフィンの断面形状を形成する段階が、前記ダイの表面にフォトレジストを堆積する段階を含む、請求項17に記載の方法。
- 前記ピラーフィンの断面形状を形成する段階が、マスクを介して紫外線光に前記フォトレジストを曝す段階を含む、請求項20に記載の方法。
- 前記マスクが、パターンを有し、前記ピラーフィンの断面が、前記マスクを通過した光の前記パターンによって形成される、請求項21に記載の方法。
- 前記ピラーフィンを形成する段階が、電解槽に前記フォトレジスト浸漬する段階を含む、請求項20に記載の方法。
- 前記槽の電流、及び、前記フォトレジストが前記槽に浸漬される時間の量を制御する段階をさらに含む、請求項23に記載の方法。
- 前記形成されたフィラーピンの高さが、前記槽の電流、及び、前記フォトレジストが前記槽に浸漬される時間の量によって決定され、請求項24に記載の方法。
- 前記表面から前記フォトレジストを除去する段階をさらに含む、請求項20に記載の方法。
- 前記表面に熱接触を形成する段階をさらに含む、請求項17に記載の方法。
- 前記表面に被覆層を堆積する段階をさらに含む、請求項17に記載の方法。
- 前記被覆層を堆積する段階が、スピンコーティング又は化学気相堆積を含む、請求項28に記載の方法。
- リソグラフィ工程によって前記被覆層に開口部を形成する段階をさらに含む、請求項28に記載の方法。
- 前記表面にシード層を堆積する段階をさらに含む、請求項17に記載の方法。
- プラズマ衝撃工程によって前記表面から前記シード層をエッチングする段階をさらに含む、請求項31に記載の方法。
- 前記ピラーフィンを形成する段階が、前記ダイの表面に一体的に複数のピラーフィンを形成する段階を含む、請求項17に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/693,760 | 2010-01-26 | ||
US12/693,760 US8283776B2 (en) | 2010-01-26 | 2010-01-26 | Microfabricated pillar fins for thermal management |
PCT/US2011/022585 WO2011094319A2 (en) | 2010-01-26 | 2011-01-26 | Microfabricated pillar fins for thermal management |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013518443A true JP2013518443A (ja) | 2013-05-20 |
JP5808345B2 JP5808345B2 (ja) | 2015-11-10 |
Family
ID=43877298
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012551265A Active JP5808345B2 (ja) | 2010-01-26 | 2011-01-26 | 熱管理のための微細加工されたピラーフィン |
Country Status (6)
Country | Link |
---|---|
US (2) | US8283776B2 (ja) |
EP (1) | EP2548223B1 (ja) |
JP (1) | JP5808345B2 (ja) |
KR (3) | KR20170126026A (ja) |
CN (1) | CN102714197B (ja) |
WO (1) | WO2011094319A2 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8283776B2 (en) | 2010-01-26 | 2012-10-09 | Qualcomm Incorporated | Microfabricated pillar fins for thermal management |
US9385060B1 (en) * | 2014-07-25 | 2016-07-05 | Altera Corporation | Integrated circuit package with enhanced thermal conduction |
US10199356B2 (en) | 2017-02-24 | 2019-02-05 | Micron Technology, Inc. | Semiconductor device assembles with electrically functional heat transfer structures |
US10096576B1 (en) * | 2017-06-13 | 2018-10-09 | Micron Technology, Inc. | Semiconductor device assemblies with annular interposers |
US10586751B2 (en) * | 2017-08-03 | 2020-03-10 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
US10600774B2 (en) * | 2018-04-06 | 2020-03-24 | Qualcomm Incorporated | Systems and methods for fabrication of gated diodes with selective epitaxial growth |
US11239134B2 (en) * | 2020-01-17 | 2022-02-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of fabricating the same |
US11837521B2 (en) * | 2021-04-19 | 2023-12-05 | Raytheon Company | Wire bonded air heat sink |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0396075U (ja) * | 1990-01-22 | 1991-10-01 | ||
JPH11224924A (ja) * | 1998-02-06 | 1999-08-17 | Matsushita Electron Corp | 半導体装置及びその製造方法 |
JP2003332504A (ja) * | 2002-05-13 | 2003-11-21 | Fujitsu Ltd | 半導体装置及びその製造方法 |
WO2004055891A1 (ja) * | 2002-12-17 | 2004-07-01 | Fujitsu Limited | 半導体装置および積層型半導体装置 |
JP2004186651A (ja) * | 2002-12-06 | 2004-07-02 | Nec Corp | 半導体装置及びその製造方法 |
US20050059238A1 (en) * | 2003-09-12 | 2005-03-17 | International Business Machines Corporation | Cooling system for a semiconductor device and method of fabricating same |
US20060278974A1 (en) * | 2005-06-09 | 2006-12-14 | Advanced Semiconductor Engineering. Inc. | Method for forming wafer-level heat spreader structure and package structure thereof |
US7271034B2 (en) * | 2004-06-15 | 2007-09-18 | International Business Machines Corporation | Semiconductor device with a high thermal dissipation efficiency |
JP2007266419A (ja) * | 2006-03-29 | 2007-10-11 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2009038049A (ja) * | 2007-07-31 | 2009-02-19 | Seiko Epson Corp | 半導体装置、放熱体、及び半導体装置の製造方法 |
JP2009239256A (ja) * | 2008-03-03 | 2009-10-15 | Panasonic Corp | 半導体装置及びその製造方法 |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0897336A (ja) * | 1994-09-29 | 1996-04-12 | Shinko Electric Ind Co Ltd | 半導体装置 |
US6531771B1 (en) * | 1999-04-20 | 2003-03-11 | Tyco Electronics Corporation | Dissipation of heat from a circuit board having bare silicon chips mounted thereon |
US6680015B2 (en) * | 2000-02-01 | 2004-01-20 | Cool Options, Inc. | Method of manufacturing a heat sink assembly with overmolded carbon matrix |
KR100391093B1 (ko) * | 2001-01-04 | 2003-07-12 | 삼성전자주식회사 | 히트 싱크가 부착된 볼 그리드 어레이 패키지 |
US6455924B1 (en) * | 2001-03-22 | 2002-09-24 | International Business Machines Corporation | Stress-relieving heatsink structure and method of attachment to an electronic package |
US6870246B1 (en) * | 2001-08-31 | 2005-03-22 | Rambus Inc. | Method and apparatus for providing an integrated circuit cover |
US6593224B1 (en) * | 2002-03-05 | 2003-07-15 | Bridge Semiconductor Corporation | Method of manufacturing a multilayer interconnect substrate |
TW556469B (en) * | 2002-08-20 | 2003-10-01 | Via Tech Inc | IC package with an implanted heat-dissipation fin |
US6919504B2 (en) * | 2002-12-19 | 2005-07-19 | 3M Innovative Properties Company | Flexible heat sink |
US7112472B2 (en) * | 2003-06-25 | 2006-09-26 | Intel Corporation | Methods of fabricating a composite carbon nanotube thermal interface device |
US7030485B2 (en) * | 2003-06-26 | 2006-04-18 | Intel Corporation | Thermal interface structure with integrated liquid cooling and methods |
JP4204989B2 (ja) | 2004-01-30 | 2009-01-07 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
US20050258536A1 (en) * | 2004-05-21 | 2005-11-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Chip heat sink device and method |
US7259458B2 (en) | 2004-08-18 | 2007-08-21 | Advanced Micro Devices, Inc. | Integrated circuit with increased heat transfer |
US20060097385A1 (en) * | 2004-10-25 | 2006-05-11 | Negley Gerald H | Solid metal block semiconductor light emitting device mounting substrates and packages including cavities and heat sinks, and methods of packaging same |
TWI236116B (en) * | 2004-11-04 | 2005-07-11 | Advanced Semiconductor Eng | High heat dissipation flip chip package structure |
TW200707676A (en) | 2005-08-09 | 2007-02-16 | Chipmos Technologies Inc | Thin IC package for improving heat dissipation from chip backside |
US7494910B2 (en) | 2006-03-06 | 2009-02-24 | Micron Technology, Inc. | Methods of forming semiconductor package |
US7361972B2 (en) | 2006-03-20 | 2008-04-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Chip packaging structure for improving reliability |
KR100771291B1 (ko) * | 2006-05-24 | 2007-10-29 | 삼성전기주식회사 | 방열기판 및 그 제조방법 |
TW200820401A (en) * | 2006-10-23 | 2008-05-01 | Via Tech Inc | Chip package and manufacturing method thereof |
KR20090047862A (ko) * | 2007-11-08 | 2009-05-13 | 삼성전기주식회사 | 웨이퍼 레벨 패키지 제조방법 |
KR20090051640A (ko) | 2007-11-19 | 2009-05-22 | 삼성전자주식회사 | 반도체 소자용 히트싱크 및 이를 포함하는 반도체 모듈 |
JP2009182328A (ja) * | 2008-01-29 | 2009-08-13 | Asml Holding Nv | 液浸リソグラフィ装置 |
US8115303B2 (en) * | 2008-05-13 | 2012-02-14 | International Business Machines Corporation | Semiconductor package structures having liquid coolers integrated with first level chip package modules |
JP2010021451A (ja) * | 2008-07-14 | 2010-01-28 | Panasonic Corp | 固体撮像装置およびその製造方法 |
KR101519601B1 (ko) * | 2008-09-09 | 2015-05-13 | 삼성전자주식회사 | 반도체 모듈 및 이를 포함하는 전자 시스템 |
US7964951B2 (en) * | 2009-03-16 | 2011-06-21 | Ati Technologies Ulc | Multi-die semiconductor package with heat spreader |
US20100276701A1 (en) * | 2009-04-29 | 2010-11-04 | Hebert Francois | Low thermal resistance and robust chip-scale-package (csp), structure and method |
US8283776B2 (en) | 2010-01-26 | 2012-10-09 | Qualcomm Incorporated | Microfabricated pillar fins for thermal management |
-
2010
- 2010-01-26 US US12/693,760 patent/US8283776B2/en active Active
-
2011
- 2011-01-26 KR KR1020177032114A patent/KR20170126026A/ko not_active Application Discontinuation
- 2011-01-26 KR KR1020157030947A patent/KR102001128B1/ko active IP Right Grant
- 2011-01-26 KR KR1020127022268A patent/KR101565302B1/ko active IP Right Grant
- 2011-01-26 EP EP11704691.2A patent/EP2548223B1/en active Active
- 2011-01-26 CN CN201180006500.0A patent/CN102714197B/zh active Active
- 2011-01-26 JP JP2012551265A patent/JP5808345B2/ja active Active
- 2011-01-26 WO PCT/US2011/022585 patent/WO2011094319A2/en active Application Filing
-
2012
- 2012-09-06 US US13/604,730 patent/US8877563B2/en active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0396075U (ja) * | 1990-01-22 | 1991-10-01 | ||
JPH11224924A (ja) * | 1998-02-06 | 1999-08-17 | Matsushita Electron Corp | 半導体装置及びその製造方法 |
JP2003332504A (ja) * | 2002-05-13 | 2003-11-21 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP2004186651A (ja) * | 2002-12-06 | 2004-07-02 | Nec Corp | 半導体装置及びその製造方法 |
WO2004055891A1 (ja) * | 2002-12-17 | 2004-07-01 | Fujitsu Limited | 半導体装置および積層型半導体装置 |
US20050059238A1 (en) * | 2003-09-12 | 2005-03-17 | International Business Machines Corporation | Cooling system for a semiconductor device and method of fabricating same |
US7271034B2 (en) * | 2004-06-15 | 2007-09-18 | International Business Machines Corporation | Semiconductor device with a high thermal dissipation efficiency |
US20060278974A1 (en) * | 2005-06-09 | 2006-12-14 | Advanced Semiconductor Engineering. Inc. | Method for forming wafer-level heat spreader structure and package structure thereof |
JP2007266419A (ja) * | 2006-03-29 | 2007-10-11 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP2009038049A (ja) * | 2007-07-31 | 2009-02-19 | Seiko Epson Corp | 半導体装置、放熱体、及び半導体装置の製造方法 |
JP2009239256A (ja) * | 2008-03-03 | 2009-10-15 | Panasonic Corp | 半導体装置及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2011094319A2 (en) | 2011-08-04 |
JP5808345B2 (ja) | 2015-11-10 |
EP2548223A2 (en) | 2013-01-23 |
WO2011094319A3 (en) | 2012-02-02 |
US20110180925A1 (en) | 2011-07-28 |
US8283776B2 (en) | 2012-10-09 |
KR20170126026A (ko) | 2017-11-15 |
US8877563B2 (en) | 2014-11-04 |
CN102714197A (zh) | 2012-10-03 |
KR20150125736A (ko) | 2015-11-09 |
US20130237015A1 (en) | 2013-09-12 |
EP2548223B1 (en) | 2021-01-13 |
KR20120125314A (ko) | 2012-11-14 |
CN102714197B (zh) | 2017-02-15 |
KR101565302B1 (ko) | 2015-11-04 |
KR102001128B1 (ko) | 2019-07-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11626388B2 (en) | Interconnect structure with redundant electrical connectors and associated systems and methods | |
TWI653719B (zh) | 半導體裝置及其形成方法 | |
JP5808345B2 (ja) | 熱管理のための微細加工されたピラーフィン | |
US10157900B2 (en) | Semiconductor structure and manufacturing method thereof | |
US9837383B2 (en) | Interconnect structure with improved conductive properties and associated systems and methods | |
TWI501327B (zh) | 三維積體電路及其製造方法 | |
TW201916280A (zh) | 積體扇出型封裝及其形成方法 | |
KR20160129687A (ko) | 더미 다이들을 갖는 팬-아웃 적층 시스템 인 패키지(sip) 및 그 제조 방법 | |
CN108269767A (zh) | 衬底晶片上芯片结构的形成方法 | |
CN220829951U (zh) | 半导体封装 | |
US20240153843A1 (en) | Package structure and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130828 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130917 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131209 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140811 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141111 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141118 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150209 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150810 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150908 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5808345 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |