JP2012500482A - 3次元集積回路の製造方法及び記録媒体(インターフェース・ウエハを永久的キャリアとして使用する3次元集積回路デバイスの製造方法) - Google Patents
3次元集積回路の製造方法及び記録媒体(インターフェース・ウエハを永久的キャリアとして使用する3次元集積回路デバイスの製造方法) Download PDFInfo
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Abstract
【解決手段】 第1配線層及びスルー・シリコン・ビアを含むインターフェース・ウエハ並びに能動回路を含む第1の能動回路層ウエハを準備する。第1の能動回路層ウエハはインターフェース・ウエハにボンディングされる。次いで、第1の能動回路層ウエハの第2部分がインターフェース・ウエハに取り付けられたままになるように、第1の能動回路層ウエハの第1部分が除去される。インターフェース・ウエハ及び第1の能動回路層ウエハの第2部分を含む積層構造がベース・ウエハにボンディングされる。次に、インターフェース・ウエハはインターフェース層を形成するように薄くされ、そしてインターフェース・ウエハのスルー・シリコン・ビアを介して第1配線層に結合される金属がインターフェース・ウエハ上に形成される。
【選択図】図11
Description
102 スルー・シリコン・ビア
104 配線層
200 第1の能動回路層ウエハ
202 P+ウエハ
204 P−上部能動回路層
206 スルー・シリコン・ビア
208 配線レベル
300 第2の能動回路層ウエハ
302 P+ウエハ
304 P−上部能動回路層
306 スルー・シリコン・ビア
308 配線レベル
800 ベース・ウエハ
808 配線層
820 誘電体層
822 コンタクト金属
825 C4ハンダ・バンプ
910 設計プロセス
920 入力設計構造
930 ライブラリィ・エレメント
940 設計仕様
950 特性データ
960 検証データ
970 設計ルール
980 ネットリスト
985 テスト・データ・ファイル
990 設計構造
995 ステージ
Claims (25)
- 第1配線層及びスルー・シリコン・ビアを含むインターフェース・ウエハを準備するステップと、
能動回路及びスルー・シリコン・ビアを含む第1の能動回路層ウエハを準備するステップと、
前記第1の能動回路層ウエハを前記インターフェース・ウエハにフェイス・ダウン・ボンディングするステップと、
前記第1の能動回路層ウエハを前記インターフェース・ウエハにフェイス・ダウン・ボンディングした後に、前記第1の能動回路層ウエハの第2部分が前記インターフェース・ウエハに取り付けられたままになるように、前記第1の能動回路層ウエハの第1部分を除去するステップと、
前記第1の能動回路層ウエハの第1部分を除去した後に、前記第1の能動回路層ウエハの前記第2部分上に第2配線層を形成するステップと、
能動回路を含む第2の能動回路層ウエハを準備するステップと、
前記第2の能動回路層ウエハを前記第2配線層にフェイス・ダウン・ボンディングするステップと、
前記第2の能動回路層ウエハを前記第2配線層にフェイス・ダウン・ボンディングした後に、前記第2の能動回路層ウエハの第2部分が前記第2配線層に取り付けられたままになるように、前記第2の能動回路層ウエハの第1部分を除去するステップと、
前記第2の能動回路層ウエハの第1部分を除去した後に、前記第2の能動回路層ウエハの前記第2部分上に第3配線層を形成するステップと、
第4配線層を含むベース・ウエハを準備するステップと、
前記第3配線層を前記ベース・ウエハにフェイス・ダウン・ボンディングするステップと、
前記第3配線層を前記ベース・ウエハにフェイス・ダウン・ボンディングした後に、前記インターフェース・ウエハを薄くしてインターフェース層を形成し、そして前記インターフェース層上にハンダ・バンプを構成する金属を形成するステップであって、前記ハンダ・バンプは前記インターフェース層の前記スルー・シリコン・ビアを介して前記第1配線層に結合されている前記ステップと、
前記ハンダ・バンプをパッケージにボンディングするステップを含む、3次元集積回路の製造方法。 - 第1配線層及びスルー・シリコン・ビアを含むインターフェース・ウエハを準備するステップと、
能動回路を含む第1の能動回路層ウエハを準備するステップと、
前記第1の能動回路層ウエハを前記インターフェース・ウエハにフェイス・ダウン・ボンディングするステップと、
前記第1の能動回路層ウエハをボンディングした後に、前記第1の能動回路層ウエハの第2部分が前記インターフェース・ウエハに取り付けられたままになるように、前記第1の能動回路層ウエハの第1部分を除去するステップと、
第2配線層を含むベース・ウエハを準備するステップと、
前記インターフェース・ウエハ及び前記第1の能動回路層ウエハの前記第2部分を含む積層構造を前記ベース・ウエハにフェイス・ダウン・ボンディングするステップと、
前記積層構造をボンディングした後に、前記インターフェース・ウエハを薄くしてインターフェース層を形成し、そして前記インターフェース層上に金属を形成するステップであって、前記金属は前記インターフェース層の前記スルー・シリコン・ビアを介して前記第1配線層に結合されている前記ステップとを含む、3次元集積回路構造の製造方法。 - 能動回路を含む他の能動回路層ウエハを準備するステップと、
前記他の能動回路層ウエハを前記第1の能動回路層ウエハの前記第2部分にフェイス・ダウン・ボンディングするステップと、
前記他の能動回路層ウエハをボンディングした後に、前記他の能動回路層ウエハの第2部分が前記第1の能動回路層ウエハの前記第2部分に取り付けられたままになるように、前記他の能動回路層ウエハの第1部分を除去するステップとを含み、
前記ベース・ウエハにフェイス・ダウン・ボンディングされた前記積層構造は、前記他の能動回路層ウエハの前記第2部分を含む、請求項2に記載の方法。 - 前記他の能動回路層ウエハを準備するステップと、前記他の能動回路層ウエハをボンディングするステップと、前記他の能動回路層ウエハの第1部分を除去するステップとをN回繰り返すステップとを含み、
前記ベース・ウエハにフェイス・ダウン・ボンディングされる積層構造は、N個の他の能動回路層ウエハの第2部分を含む、請求項3に記載の方法。 - 前記他の能動回路層ウエハの第1部分を除去した後に、前記他の能動回路層ウエハの第2部分譲に他の配線層を形成するステップと、
更に他の能動回路層ウエハを準備するステップと、前記更に他の能動回路層ウエハをボンディングするステップと、前記更に他の能動回路層ウエハの第1部分を除去するステップと、更に他の配線層を形成するステップとをN回繰り返すステップとを含み、
前記積層構造を前記ベース・ウエハにフェイス・ダウン・ボンディングするステップにおいて、N番目の能動回路層ウエハの第2部分上の配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項3に記載の方法。 - 前記第1の能動回路層ウエハの前記第1部分を除去した後に、前記第1の能動回路層ウエハの前記第2部分上に第3配線層を形成するステップと、
前記他の能動回路層ウエハの第1部分を除去した後に、前記他の能動回路層ウエハの
第2部分上に第4配線層を形成するステップとを含み、
前記他の能動回路層ウエハのボンディングするステップにおいて、前記他の能動回路層ウエハが前記第3配線層にフェイス・ダウン・ボンディングされ、
前記積層構造をボンディングするステップにおいて、前記第4配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項3に記載の方法。 - 前記第1の能動回路層ウエハの前記第1部分を除去した後に、前記第1の能動回路層ウエハの前記第2部分上に第3配線層を形成するステップを含み、
前記積層構造をボンディングするステップにおいて、前記第3配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項2に記載の方法。 - 前記インターフェース・ウエハは、前記第1の能動回路層ウエハの前記第1部分を除去するステップにおいて使用されるエッチング剤に溶解しない材料で形成されている、請求項2に記載の方法。
- 前記インターフェース・ウエハ上の金属はハンダ・バンプである、請求項2に記載の方法。
- 前記第1の能動回路層ウエハは、バルク・シリコン・ウエハである、請求項2に記載の方法。
- 前記第1の能動回路層ウエハは、SOIウエハである、請求項2に記載の方法。
- 前記インターフェース・ウエハは、SOIウエハである、請求項2に記載の方法。
- 前記インターフェース・ウエハは、更に能動回路素子又は受動回路素子あるいはその両方を含む、請求項2に記載の方法。
- 前記インターフェース・ウエハは、更に減結合キャパシタ又は電圧調整回路あるいはその両方を含む、請求項2に記載の方法。
- 前記ベース・ウエハは、論理回路を含む、請求項2に記載の方法。
- コンピュータに、3次元集積回路構造を製造するための、
第1配線層及びスルー・シリコン・ビアを含むインターフェース・ウエハを準備する手順と、
能動回路を含む第1の能動回路層ウエハを準備する手順と、
前記第1の能動回路層ウエハを前記インターフェース・ウエハにフェイス・ダウン・ボンディングする手順と、
前記第1の能動回路層ウエハをボンディングした後に、前記第1の能動回路層ウエハの第2部分が前記インターフェース・ウエハに取り付けられたままになるように、前記第1の能動回路層ウエハの第1部分を除去する手順と、
第2配線層を含むベース・ウエハを準備する手順と、
前記インターフェース・ウエハ及び前記第1の能動回路層ウエハの前記第2部分を含む積層構造を前記ベース・ウエハにフェイス・ダウン・ボンディングする手順と、
前記積層構造をボンディングした後に、前記インターフェース・ウエハを薄くしてインターフェース層を形成し、そして前記インターフェース層上に金属を形成する手順であって、前記金属は前記インターフェース層の前記スルー・シリコン・ビアを介して前記第1配線層に結合されている前記手順とを実行させるためのプログラムを記録したコンピュータ読み取り可能な記憶媒体。 - 能動回路を含む他の能動回路層ウエハを準備する手順と、
前記他の能動回路層ウエハを前記第1の能動回路層ウエハの前記第2部分にフェイス・ダウン・ボンディングする手順と、
前記他の能動回路層ウエハをボンディングした後に、前記他の能動回路層ウエハの第2部分が前記第1の能動回路層ウエハの前記第2部分に取り付けられたままになるように、前記他の能動回路層ウエハの第1部分を除去する手順とを含み、
前記ベース・ウエハにフェイス・ダウン・ボンディングされた前記積層構造は、前記他の能動回路層ウエハの前記第2部分を含む、請求項16に記載のコンピュータ読み取り可能な記憶媒体。 - 前記他の能動回路層ウエハを準備する手順と、前記他の能動回路層ウエハをボンディングする手順と、前記他の能動回路層ウエハの第1部分を除去する手順とをN回繰り返す手順とを含み、
前記ベース・ウエハにフェイス・ダウン・ボンディングされる積層構造は、N個の他の能動回路層ウエハの第2部分を含む、請求項17に記載のコンピュータ読み取り可能な記憶媒体。 - 前記他の能動回路層ウエハの第1部分を除去した後に、前記他の能動回路層ウエハの第2部分譲に他の配線層を形成する手順と、
更に他の能動回路層ウエハを準備する手順と、前記更に他の能動回路層ウエハをボンディングする手順と、前記更に他の能動回路層ウエハの第1部分を除去する手順と、更に他の配線層を形成する手順とをN回繰り返す手順とを含み、
前記積層構造を前記ベース・ウエハにフェイス・ダウン・ボンディングするステップにおいて、N番目の能動回路層ウエハの第2部分上の配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項17に記載のコンピュータ読み取り可能な記憶媒体。 - 前記第1の能動回路層ウエハの前記第1部分を除去した後に、前記第1の能動回路層ウエハの前記第2部分上に第3配線層を形成する手順と、
前記他の能動回路層ウエハの第1部分を除去した後に、前記他の能動回路層ウエハの
第2部分上に第4配線層を形成する手順とを含み、
前記他の能動回路層ウエハのボンディングする手順において、前記他の能動回路層ウエハが前記第3配線層にフェイス・ダウン・ボンディングされ、
前記積層構造をボンディングする手順において、前記第4配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項17に記載のコンピュータ読み取り可能な記憶媒体。 - 前記第1の能動回路層ウエハの前記第1部分を除去した後に、前記第1の能動回路層ウエハの前記第2部分上に第3配線層を形成する手順を含み、
前記積層構造をボンディングする手順において、前記第3配線層が前記ベース・ウエハにフェイス・ダウン・ボンディングされる、請求項16に記載のコンピュータ読み取り可能な記憶媒体。 - 前記インターフェース・ウエハは、前記第1の能動回路層ウエハの前記第1部分を除去する手順において使用されるエッチング剤に溶解しない材料で形成されている、請求項16に記載のコンピュータ読み取り可能な記憶媒体。
- 前記インターフェース・ウエハ上の金属はハンダ・バンプである、請求項16に記載のコンピュータ読み取り可能な記憶媒体。
- 前記インターフェース・ウエハは、SOIウエハである、請求項16に記載のコンピュータ読み取り可能な記憶媒体。
- 前記インターフェース・ウエハは、更に能動回路素子又は受動回路素子あるいはその両方を含む、請求項16に記載のコンピュータ読み取り可能な記憶媒体。
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US20120309127A1 (en) | 2012-12-06 |
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