JP2012204636A - 半導体装置およびその製造方法 - Google Patents
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- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
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Abstract
【解決手段】実施形態の半導体装置は、ドリフト層と、ドリフト層の上に設けられたベース層と、ベース層の表面に選択的に設けられたソース層と、ソース層およびベース層を貫通し、ドリフト層に到達するトレンチ内に、ゲート絶縁膜を介して設けられたゲート電極と、トレンチ内において、ゲート電極の下側に、フィールドプレート絶縁膜を介して設けられたフィールドプレート電極と、ドリフト層に電気的に接続されたドレイン電極と、ソース層に電気的に接続されたソース電極と、を備える。ベース層に含まれる第1導電型の不純物濃度は、ドリフト層に含まれる第1導電型の不純物濃度よりも低い。ドリフト層に含まれる第1導電型の不純物濃度は、1×1016(atoms/cm3)以上である。
【選択図】図1
Description
図1は、第1実施形態に係る半導体装置の模式図であり、(a)は、平面模式図、(b)は、(a)のX−Y位置における断面模式図と、不純物濃度プロファイルである。
図2〜図4は、半導体装置の製造方法を説明するための断面模式図である。
図8は、第2実施形態に係る半導体装置の断面模式図と、不純物濃度プロファイルである。
10 ドレイン層
11、11a ドリフト層
12、120 ベース層
12p 半導体層
13 ソース層
15 コンタクト層
19A、19B 半導体積層体
20 トレンチ
21 ゲート絶縁膜
22 ゲート電極
25 フィールドプレート絶縁膜
26 フィールドプレート電極
50 ドレイン電極
51 ソース電極
80、81 マスク部材
Claims (5)
- 第1導電型のドリフト層と、
前記ドリフト層の上に設けられた第2導電型のベース層と、
前記ベース層の表面に選択的に設けられた第1導電型のソース層と、
前記ソース層および前記ベース層を貫通し、前記ドリフト層に到達するトレンチ内に、ゲート絶縁膜を介して設けられたゲート電極と、
前記トレンチ内において、前記ゲート電極の下側に、フィールドプレート絶縁膜を介して設けられたフィールドプレート電極と、
前記ソース層に隣接するように前記ベース層の表面に選択的に設けられた第2導電型のコンタクト層と、
前記ドリフト層に電気的に接続されたドレイン電極と、
前記ソース層に電気的に接続されたソース電極と、
を備え、
前記フィールドプレート電極は、前記ソース電極に電気的に接続され、
前記コンタクト層に含まれる第2導電型の不純物濃度は、前記ベース層に含まれる前記第2導電型の不純物濃度から前記ベース層に含まれる前記第1導電型の不純物濃度を差し引いた値よりも高く、
前記コンタクト層は、前記ソース電極に接続され、
前記ベース層に含まれる前記第1導電型の不純物濃度は、前記ドリフト層に含まれる前記第1導電型の不純物濃度よりも低く、
前記ドリフト層に含まれる前記第1導電型の不純物濃度は、1×1016(atoms/cm3)以上であることを特徴とする半導体装置。 - 第1導電型のドリフト層と、
前記ドリフト層の上に設けられた第2導電型のベース層と、
前記ベース層の表面に選択的に設けられた第1導電型のソース層と、
前記ソース層および前記ベース層を貫通し、前記ドリフト層に到達するトレンチ内に、ゲート絶縁膜を介して設けられたゲート電極と、
前記トレンチ内において、前記ゲート電極の下側に、フィールドプレート絶縁膜を介して設けられたフィールドプレート電極と、
前記ドリフト層に電気的に接続されたドレイン電極と、
前記ソース層に電気的に接続されたソース電極と、
を備え、
前記フィールドプレート電極は、前記ソース電極に電気的に接続され、
前記ベース層に含まれる前記第1導電型の不純物濃度は、前記ドリフト層に含まれる前記第1導電型の不純物濃度よりも低く、
前記ドリフト層に含まれる前記第1導電型の不純物濃度は、1×1016(atoms/cm3)以上であることを特徴とする半導体装置。 - 第1導電型のドリフト層と、
前記ドリフト層の上に設けられた第2導電型のベース層と、
前記ベース層の表面に選択的に設けられた第1導電型のソース層と、
前記ソース層および前記ベース層を貫通し、前記ドリフト層に到達するトレンチ内にゲート絶縁膜を介して設けられたゲート電極と、
前記ベース層に接続され、前記ドリフト層の表面から内部にかけて設けられたピラー状の第2導電型の半導体層と、
前記ドリフト層に電気的に接続されたドレイン電極と、
前記ソース層に電気的に接続されたソース電極と、
を備え、
前記ベース層に含まれる前記第1導電型の不純物濃度は、前記ドリフト層に含まれる前記第1導電型の不純物濃度よりも低く、
前記ドリフト層に含まれる前記第1導電型の不純物濃度は、1×1016(atoms/cm3)以上であることを特徴とする半導体装置。 - 前記ソース層に隣接するように、前記ベース層の表面に第2導電型のコンタクト層がさらに選択的に設けられ、
前記コンタクト層に含まれる第2導電型の不純物濃度は、前記ベース層に含まれる前記第2導電型の不純物濃度から前記ベース層に含まれる前記第1導電型の不純物濃度を差し引いた値よりも高く、
前記コンタクト層は、前記ソース電極に接続されていることを特徴とする請求項2または3に記載の半導体装置。 - 第1導電型のドリフト層と、前記ドリフト層の上に設けられた第2導電型のベース層と、を有する半導体積層体を準備する工程と、
前記ベース層を貫通し、前記ドリフト層に到達するトレンチを形成する工程と、
前記トレンチ内において、フィールドプレート絶縁膜を介して設けられたフィールドプレート電極を形成する工程と、
前記トレンチ内において、前記フィールドプレート電極の上に、ゲート絶縁膜を介してゲート電極を形成する工程と、
前記ベース層の表面に、前記ゲート絶縁膜に接するように、第1導電型のソース層を選択的に型成する工程と、
前記ソース層および前記フィールドプレート電極に電気的に接続されるソース電極と、前記ドリフト層に電気的に接続されるドレイン電極と、を形成する工程と、
を備え、
前記ベース層に含まれる前記第1導電型の不純物濃度は、前記ドリフト層に含まれる前記第1導電型の不純物濃度よりも低く、
前記ドリフト層に含まれる前記第1導電型の不純物濃度は、1×1016(atoms/cm3)以上であることを特徴とする半導体装置の製造方法。
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JP2011068275A JP2012204636A (ja) | 2011-03-25 | 2011-03-25 | 半導体装置およびその製造方法 |
CN2011102515121A CN102694022A (zh) | 2011-03-25 | 2011-08-29 | 半导体装置及其制造方法 |
US13/239,248 US8643095B2 (en) | 2011-03-25 | 2011-09-21 | Semiconductor transistor device and method for manufacturing same |
US14/141,279 US9236468B2 (en) | 2011-03-25 | 2013-12-26 | Semiconductor transistor device and method for manufacturing same |
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WO2016132552A1 (ja) * | 2015-02-20 | 2016-08-25 | 新電元工業株式会社 | 半導体装置 |
US9831335B2 (en) | 2015-02-20 | 2017-11-28 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
WO2022004807A1 (ja) * | 2020-07-03 | 2022-01-06 | 株式会社デンソー | 半導体装置 |
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US8748976B1 (en) * | 2013-03-06 | 2014-06-10 | Texas Instruments Incorporated | Dual RESURF trench field plate in vertical MOSFET |
US20140273374A1 (en) * | 2013-03-15 | 2014-09-18 | Joseph Yedinak | Vertical Doping and Capacitive Balancing for Power Semiconductor Devices |
US9960269B2 (en) * | 2016-02-02 | 2018-05-01 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
JP7010184B2 (ja) * | 2018-09-13 | 2022-01-26 | 株式会社デンソー | 半導体装置 |
JP7193371B2 (ja) * | 2019-02-19 | 2022-12-20 | 株式会社東芝 | 半導体装置 |
JP7224979B2 (ja) | 2019-03-15 | 2023-02-20 | 株式会社東芝 | 半導体装置 |
CN112447822A (zh) * | 2019-09-03 | 2021-03-05 | 苏州东微半导体股份有限公司 | 一种半导体功率器件 |
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WO2016132552A1 (ja) * | 2015-02-20 | 2016-08-25 | 新電元工業株式会社 | 半導体装置 |
JPWO2016132552A1 (ja) * | 2015-02-20 | 2017-04-27 | 新電元工業株式会社 | 半導体装置 |
US9831335B2 (en) | 2015-02-20 | 2017-11-28 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
US9831337B2 (en) | 2015-02-20 | 2017-11-28 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
WO2022004807A1 (ja) * | 2020-07-03 | 2022-01-06 | 株式会社デンソー | 半導体装置 |
JP7364081B2 (ja) | 2020-07-03 | 2023-10-18 | 株式会社デンソー | 半導体装置 |
Also Published As
Publication number | Publication date |
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US9236468B2 (en) | 2016-01-12 |
US8643095B2 (en) | 2014-02-04 |
CN102694022A (zh) | 2012-09-26 |
US20120241851A1 (en) | 2012-09-27 |
US20140103427A1 (en) | 2014-04-17 |
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