JP2012108407A - Electro-optic device, method of manufacturing electro-optic device, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electro-optic device including a transistor where incident light is surely shielded to obtain a stable operation, a method of manufacturing the electro-optic device, and an electronic apparatus including the electro-optic device.SOLUTION: The electro-optic device includes: a semiconductor layer 30a including a source region 30s, a drain region 30d, a channel region 30c, and a junction region 30f formed between the channel region 30c and the drain region 30d; a gate electrode portion 30g facing the channel region 30c via a first insulating film covering the semiconductor layer 30a; contact holes CNT5 and CNT6 as grooves provided in the first insulating film and a second insulating film planarly along the junction region 30f; and light-shielding side wall portions in the contact holes CNT5 and CNT6, which have at least two layers of conductive films including a first conductive film provided to extend from the gate electrode portion 30g and a second conductive film constituting a data line 6a.

Description

  The present invention relates to an electro-optical device, a method for manufacturing the electro-optical device, and an electronic apparatus.

The electro-optical device includes a transistor that performs switching of a pixel electrode, and a gate electrode that is disposed on an upper layer side through the first insulating film with respect to the semiconductor layer of the transistor and overlaps a channel region of the semiconductor layer. Further, an active drive type liquid crystal device is known (Patent Document 1).
In this liquid crystal device, a longitudinal groove is formed in the first insulating film along at least one of the junction region between the channel region and the source / drain region when viewed in plan on the substrate, and the gate electrode Has an in-groove portion extending from a portion overlapping the channel region to at least a part of the groove.

  The liquid crystal device is used, for example, as a light modulation means (light valve) of a projection display device. Since the gate electrode uses a light-shielding conductive film, the groove portion also has a light-shielding property. It is said that the light incident on the light valve can be prevented from entering the channel region of the transistor. This prevents an increase in light leakage current and light malfunction in the transistor, and ensures stable display quality without causing flicker or display unevenness.

JP 2008-77030 A

However, in the conventional liquid crystal device, in the step of forming a conductive film to be a gate electrode, it is difficult to dispose the conductive film over every corner in the longitudinal groove, and there is no conductive film partially. A portion (so-called void) sometimes occurred.
If it does so, the light shielding property of the electrically conductive film in the said groove | channel will become incomplete, and there existed a subject that display quality might become unstable.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 An electro-optical device according to this application example includes a semiconductor including a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region. A layer, a first insulating film covering the semiconductor layer, a gate electrode portion facing the channel region via the first insulating film, and a second insulating film covering the gate electrode portion, A data line electrically connected to the layer, a groove provided in the first insulating film and the second insulating film along the junction region in a plane, and extending from the gate electrode portion into the groove. And a light-shielding side wall having at least two conductive films including the first conductive film and the data line.

According to this configuration, since the light-shielding side wall provided in the groove is made of at least two layers of conductive film, the light-shielding property of the side wall can be improved as compared with the case of being made of one layer of conductive film. That is, since light incident on the junction region of the semiconductor layer can be reliably blocked, an electro-optical device including a transistor that can obtain a stable driving state with respect to incident light can be provided.
In addition, since the first conductive film constituting the gate electrode portion and the data line are used as at least two layers of the conductive film constituting the side wall portion, it is not necessary to introduce a new conductive film, and the structure is simplified. it can.

Application Example 2 In the electro-optical device according to the application example, the at least two conductive films may be stacked via an insulating film.
According to this configuration, even if light passes through one conductive film, it is reflected at the interface between the insulating film and the other conductive film, or is shielded by the other conductive film, that is, the light shielding property of the side wall is improved. be able to.

  Application Example 3 Another electro-optical device according to this application example includes a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region. A semiconductor layer including the first insulating film covering the semiconductor layer, a gate electrode portion facing the channel region through the first insulating film, and a second insulating film and a third insulating film covering the gate electrode portion. And a groove provided in the first insulating film and the second insulating film in a plane along the junction region, and a first conductive film provided in the groove so as to extend from the gate electrode portion. And a light-shielding side wall portion having at least two conductive films including a second conductive film provided between the first insulating film and the third insulating film.

  According to this configuration, the light-shielding side wall provided in the groove is composed of at least two layers of the conductive film including the first conductive film and the second conductive film. Thus, the light shielding property of the side wall portion can be improved. That is, since light incident on the junction region of the semiconductor layer can be reliably blocked, an electro-optical device including a transistor that can obtain a stable driving state with respect to incident light can be provided. In other words, the second conductive film is not limited to the one constituting the data line other than the gate electrode portion, and a conductive film provided between the first insulating film and the third insulating film can be used.

Application Example 4 In the electro-optical device according to the application example described above, the at least two conductive films may be in contact with each other.
According to this configuration, more reliable light shielding can be obtained at the side wall portion. Further, the parasitic capacitance generated between the two conductive films can be eliminated as compared with the case where the two conductive films are arranged in the trench with an insulating film interposed therebetween.

Application Example 5 In the electro-optical device according to the application example described above, it is preferable that the upper conductive film among the at least two conductive films is provided so as to fill the groove.
According to this configuration, for example, even if one conductive film is partially defective in the groove, the other conductive film is provided so as to fill the groove. A reliable light-shielding property can be obtained.

Application Example 6 In the electro-optical device according to the application example described above, it is preferable that the groove is provided on both sides of the bonding area in a plane along the bonding area.
According to this configuration, since the groove having the side wall portion is provided on both sides of the junction region, light incident on the junction region from both sides of the semiconductor layer can be shielded, and a more stable driving state can be achieved. realizable.

Application Example 7 In the electro-optical device according to the application example described above, the at least two conductive films may be different types of conductive films.
According to this configuration, by configuring the side wall portion with different types of conductive films, the degree of freedom in design is improved as compared with the case where the same type of conductive film is used. For example, even if the gate electrode portion uses polysilicide whose light shielding property is lowered by heating, the light shielding property of the side wall portion can be ensured by using a metal material exhibiting a stable light shielding property against heat as the second conductive film. .

  Application Example 8 A method for manufacturing an electro-optical device according to this application example includes a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region. A first insulating film covering the semiconductor layer, a gate electrode portion facing the channel region through the first insulating film, and a second insulating film covering the gate electrode portion. And an electro-optical device comprising: a data line electrically connected to the semiconductor layer; and a groove provided in the first insulating film and the second insulating film along the junction region in a plan view. In the method, a light-shielding first conductive film is formed on the first insulating film including the groove, and the first conductive film is patterned so as to be opposed to the channel region in a planar manner. Gate electrode forming electrode part A forming step; a second insulating film forming step for forming the second insulating film so as to cover the gate electrode portion and the exposed first insulating film; and a first removal for removing the second insulating film in the trench A step, a third insulating film forming step of forming a third insulating film so as to cover the second insulating film including the exposed trench, and a light-shielding second conductive film covering the third insulating film Forming a side wall portion in which the first conductive film and the second conductive film are laminated through the third insulating film in the groove; and patterning the second conductive film to form a data line. Forming a data line to be formed.

According to this method, since the light-shielding side wall provided in the groove is formed of at least two layers of the conductive film including the first conductive film and the second conductive film, the light-shielding side wall portion includes only the first conductive film. Compared to the above, the light shielding property of the side wall portion can be improved. In other words, since light incident on the junction region of the semiconductor layer can be reliably shielded, an electro-optical device including a transistor that can obtain a stable driving state with respect to incident light can be manufactured.
In addition, since the first conductive film serving as the gate electrode portion and the second conductive film serving as the data line are used as at least two layers of conductive films serving as the sidewall portions, there is no need to form a new conductive film. The manufacturing process can be simplified.

  Application Example 9 Another electro-optical device manufacturing method according to this application example includes a source region, a drain region, a channel region, and a junction formed between the source region or the drain region and the channel region. A semiconductor layer including a region; a first insulating film covering the semiconductor layer; a gate electrode portion facing the channel region through the first insulating film; a second insulating film covering the gate electrode portion; A method of manufacturing an electro-optical device including a groove provided in the first insulating film and the second insulating film along the bonding region in a plan view, on the first insulating film including the groove Forming a gate electrode portion by forming a light-shielding first conductive film on the substrate and patterning the first conductive film so as to face the channel region in a plan view; and the gate electrode Part and said exposed A second insulating film forming step of covering the insulating film to form the second insulating film; a first removing step of removing the second insulating film in the trench; and the second so as to fill the exposed trench. Forming a light-shielding second conductive film so as to cover the insulating film, forming a sidewall portion in which the first conductive film and the second conductive film are laminated in the groove, and excluding the groove portion; And a second removal step of removing the second conductive film on the second insulating film.

  According to this method, since the first conductive film and the second conductive film are laminated in contact with each other in the groove, a side wall having more excellent light shielding properties can be formed.

Application Example 10 In the method of manufacturing the electro-optical device according to the application example, in the step of forming the side wall portion, an aluminum film is used as the light-shielding second conductive film, and the second insulating film including the groove is formed. It is preferable that the method includes a step of heating the aluminum film formed to the vicinity of the melting point.
According to this method, by heating the formed aluminum film to near the melting point, the aluminum film can be filled to every corner in the groove. Therefore, for example, even if a void or the like is generated during film formation, this can be closed and a side wall portion having high light shielding properties can be formed.

Application Example 11 In the method of manufacturing the electro-optical device according to the application example described above, a third insulating film forming step of covering the second insulating film including the exposed trench and forming a third insulating film; Forming a through-hole penetrating the first insulating film, the second insulating film, and the third insulating film at a position overlapping the end portion in plan, and covering the third insulating film including the through-hole. The method further comprises: forming a third conductive film; and patterning the third conductive film to form a conductive part that electrically connects the drain region and the pixel electrode. And
According to this method, the second conductive film of the two conductive films constituting the side wall portion is adjacent to the third conductive film via the third insulating film. Therefore, the parasitic capacitance generated between the gate electrode portion and the conducting portion can be reduced as compared with the case where the third conductive film is part of the side wall portion. That is, it is possible to reduce deterioration of the electrical characteristics of the transistor due to parasitic capacitance.

Application Example 12 An electronic apparatus according to this application example includes the electro-optical device according to the application example described above or the electro-optical device manufactured using the method for manufacturing the electro-optical device according to the application example.
According to this configuration, it is possible to provide an electronic apparatus that can obtain a stable operation state with respect to light.

(A) is a schematic plan view which shows the structure of the liquid crystal device of 1st Embodiment, (b) is a schematic sectional drawing cut | disconnected by the H-H 'line | wire of (a). FIG. 2 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the first embodiment. FIG. 2 is a schematic plan view showing the arrangement of pixels in the liquid crystal device of the first embodiment. (A) And (b) is a schematic plan view which shows the structure of the pixel in the liquid crystal device of 1st Embodiment. FIG. 5 is a schematic cross-sectional view illustrating the structure of a pixel cut along line A-A ′ in FIG. 4. FIG. 5 is a schematic cross-sectional view illustrating a structure of a pixel cut along a B-B ′ line in FIG. 4. (A)-(e) is a schematic sectional drawing which shows the manufacturing method of a liquid crystal device. The equivalent circuit diagram of the liquid crystal device of 2nd Embodiment. The schematic plan view which shows the structure of the pixel of 2nd Embodiment. FIG. 10 is a schematic cross-sectional view illustrating a structure of a pixel cut along line E-E ′ in FIG. 9. FIG. 10 is a schematic cross-sectional view showing the main structure of a pixel cut along line F-F ′ in FIG. 9. FIG. 10 is a schematic cross-sectional view illustrating a main structure of a pixel cut along a line G-G ′ in FIG. 9. (A)-(e) is a schematic sectional drawing which shows the manufacturing method of the liquid crystal device of 2nd Embodiment. Schematic which shows the structure of the projection type display apparatus as an electronic device.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. Note that the drawings to be used are appropriately enlarged or reduced so that the part to be described can be recognized.

  In the following embodiments, for example, when “on the substrate” is described, the substrate is disposed so as to be in contact with the substrate, or is disposed on the substrate via another component, or the substrate. It is assumed that a part is arranged so as to be in contact with each other and a part is arranged via another component.

(First embodiment)
In the present embodiment, an active matrix liquid crystal device as an electro-optical device including a thin film transistor (TFT) as a pixel switching element will be described as an example. This liquid crystal device can be suitably used as, for example, a light modulation element (liquid crystal light valve) of a projection type display device (liquid crystal projector) described later.

<Liquid crystal device>
First, a liquid crystal device as an electro-optical device according to this embodiment will be described with reference to FIGS. 1 and 2. 1A is a schematic plan view showing the configuration of the liquid crystal device, FIG. 1B is a schematic cross-sectional view taken along line HH ′ of FIG. 1A, and FIG. 2 is an electrical configuration of the liquid crystal device. FIG.

  As shown in FIGS. 1A and 1B, a liquid crystal device 100 according to the present embodiment includes an element substrate 10 and a counter substrate 20 that are disposed to face each other, and a liquid crystal layer 50 that is sandwiched between the pair of substrates. . As the element substrate 10 and the counter substrate 20, a transparent glass substrate such as quartz is used.

  The element substrate 10 is slightly larger than the counter substrate 20, and both substrates are bonded via a seal material 40 arranged in a frame shape, and liquid crystal having positive or negative dielectric anisotropy is sealed in the gap. A liquid crystal layer 50 is formed. For the sealing material 40, for example, an adhesive such as a thermosetting or ultraviolet curable epoxy resin is employed. A spacer (not shown) is mixed in the sealing material 40 to keep the distance between the pair of substrates constant.

  A light shielding film 21 is similarly provided in a frame shape inside the sealing material 40 arranged in a frame shape. The light shielding film 21 is made of, for example, a light shielding metal or metal oxide, and the inside of the light shielding film 21 is a display region E having a plurality of pixels P. Although not shown in FIG. 1, the display area E is also provided with a light-shielding portion that divides a plurality of pixels P in a plane.

A data line driving circuit 101 is provided between the element substrate 10 and the sealing material 40 along one side. Further, an inspection circuit 103 is provided inside the sealing material 40 along the other one side facing the one side. Further, a scanning line driving circuit 102 is provided inside the sealing material 40 along the other two sides orthogonal to the one side and facing each other. A plurality of wirings 105 that connect the two scanning line driving circuits 102 are provided inside the sealing material 40 on the other side facing the one side. Wirings connected to the data line driving circuit 101 and the scanning line driving circuit 102 are connected to a plurality of external connection terminals 104 arranged along the one side.
Hereinafter, the direction along the one side will be referred to as the X direction, and the direction along the other two sides orthogonal to the one side and facing each other will be described as the Y direction.
The arrangement of the inspection circuit 103 is not limited to this, and the inspection circuit 103 may be provided at a position along the inner side of the sealing material 40 between the data line driving circuit 101 and the display area E.

As shown in FIG. 1B, on the surface of the element substrate 10 on the liquid crystal layer 50 side, a light-transmitting pixel electrode 15 provided for each pixel P and a thin film transistor (TFT; Thin Film) as a switching element. Transistor) 30, signal wiring, and an alignment film 18 covering these are formed.
In addition, a light shielding structure is employed that prevents light from entering the semiconductor layer in the TFT 30 to make the switching operation unstable. The light shielding structure will be described later.

  On the surface of the counter substrate 20 on the liquid crystal layer 50 side, a light shielding film 21, an interlayer film layer 22 formed so as to cover the light shielding film 21, and a common electrode 23 provided so as to cover the interlayer film layer 22 are shared. An alignment film 24 covering the electrode 23 is provided.

  As shown in FIG. 1A, the light shielding film 21 is provided in a frame shape at a position where the data line driving circuit 101, the scanning line driving circuit 102, and the inspection circuit 103 overlap in plan view. Thus, the light incident from the counter substrate 20 side is shielded, and the malfunction of the peripheral circuits including these drive circuits due to the light is prevented. Further, unnecessary stray light is shielded from entering the display area E, and high contrast in the display of the display area E is ensured.

  The interlayer film layer 22 is made of an inorganic material such as silicon oxide, for example, and is provided so as to cover the light shielding film 21 with light transmittance. Examples of a method for forming such an interlayer film layer 22 include a method of forming a film using a plasma CVD method or the like.

  The common electrode 23 is made of, for example, a transparent conductive film such as ITO, and covers the interlayer film layer 22 and, as shown in FIG. 1A, the element substrate 10 side by the vertical conduction parts 106 provided at the four corners of the counter substrate 20. It is electrically connected to the wiring.

  The alignment film 18 covering the pixel electrode 15 and the alignment film 24 covering the common electrode 23 are selected based on the optical design of the liquid crystal device 100. For example, an organic material such as polyimide is formed, and the surface thereof is rubbed so that liquid crystal molecules are subjected to a substantially horizontal alignment treatment, or an inorganic material such as SiOx (silicon oxide) is vapor-phase grown. And a film formed by a method and aligned substantially perpendicularly to liquid crystal molecules.

As shown in FIG. 2, the liquid crystal device 100 is disposed so as to be parallel to the plurality of scanning lines 3 a and the plurality of data lines 6 a as signal lines that are insulated and orthogonal to each other at least in the display region E along the data lines 6 a. Capacitance line 3b.
The direction in which the scanning line 3a extends is the X direction, and the direction in which the data line 6a extends is the Y direction.

  A pixel electrode 15, a TFT 30, and a storage capacitor 16 are provided in a region divided by the scanning line 3a, the data line 6a, the capacitor line 3b, and these signal lines, and these constitute a pixel circuit of the pixel P. is doing.

The scanning line 3 a is electrically connected to the gate of the TFT 30, and the data line 6 a is electrically connected to the source of the TFT 30. The pixel electrode 15 is electrically connected to the drain of the TFT 30.
The data line 6a is connected to the data line driving circuit 101 (see FIG. 1), and supplies image signals D1, D2,..., Dn supplied from the data line driving circuit 101 to the pixels P. The scanning line 3a is connected to a scanning line driving circuit 102 (see FIG. 1), and supplies scanning signals SC1, SC2,..., SCm supplied from the scanning line driving circuit 102 to each pixel P. The image signals D1 to Dn supplied from the data line driving circuit 101 to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each of a plurality of adjacent data lines 6a for each group. Good. The scanning line driving circuit 102 supplies the scanning signals SC1 to SCm to the scanning line 3a in a pulse-sequential manner at a predetermined timing.

In the liquid crystal device 100, the TFT 30 that is a switching element is turned on for a certain period by the input of the scanning signals SC1 to SCm, so that the image signals D1 to Dn supplied from the data line 6a are supplied to the pixel electrode 15 at a predetermined timing. It is the structure written in. The predetermined level of image signals D1 to Dn written to the liquid crystal layer 50 via the pixel electrode 15 is held for a certain period between the pixel electrode 15 and the common electrode 23 arranged to face each other via the liquid crystal layer 50. The
In order to prevent the held image signals D1 to Dn from leaking, the holding capacitor 16 is connected in parallel with the liquid crystal capacitor formed between the pixel electrode 15 and the common electrode 23. The storage capacitor 16 is provided between the drain of the TFT 30 and the capacitor line 3b. As will be described in detail later, the storage capacitor 16 has a dielectric layer between the light-shielding first capacitor electrode and the second capacitor electrode, and the second capacitor electrode constitutes the capacitor line 3b. is doing. The capacitor line 3b is connected to a fixed potential. The fixed potential is, for example, a common potential (LCCOM) applied to GND or the common electrode 23.

  Note that a data line 6a is connected to the inspection circuit 103 shown in FIG. 1A, and an operation defect or the like of the liquid crystal device 100 is confirmed by detecting the image signal in the manufacturing process of the liquid crystal device 100. Although it can be configured, it is omitted in the equivalent circuit of FIG. The inspection circuit 103 includes a sampling circuit that samples the image signal and supplies it to the data line 6a, and a precharge circuit that supplies a precharge signal of a predetermined voltage level to the data line 6a prior to the image signal. Also good.

  Such a liquid crystal device 100 is a transmission type, and adopts an optical design of a normally white mode in which the pixel P is brightly displayed when not driven and a normally black mode in which the pixel P is darkly displayed when not driven. Polarizing elements are arranged and used according to the optical design on the light incident side and the light exit side, respectively.

  Next, the planar arrangement and structure of the pixel P will be described with reference to FIGS. 3 is a schematic plan view showing the arrangement of pixels in the liquid crystal device of the first embodiment, FIGS. 4A and 4B are schematic plan views showing the configuration of pixels in the liquid crystal device of the first embodiment, and FIG. 4 is a schematic cross-sectional view showing the structure of the pixel cut along the line AA ′ in FIG. 4, and FIG. 6 is a schematic cross-sectional view showing the structure of the pixel cut along the line BB ′ in FIG.

  As shown in FIG. 3, the pixel P in the liquid crystal device 100 has, for example, a substantially rectangular opening region in a plan view. The opening area is surrounded by a light-shielding non-opening area extending in the X direction and the Y direction and provided in a lattice shape.

  A scanning line 3a shown in FIG. 2 is provided in the non-opening region extending in the X direction. The scanning line 3a uses a light-shielding conductive member, and at least a part of the non-opening region is constituted by the scanning line 3a.

  Similarly, the data line 6a and the capacitor line 3b shown in FIG. 2 are provided in the non-opening region extending in the Y direction. The data line 6a and the capacitor line 3b are also made of a light-shielding conductive member, and at least a part of the non-opening region is constituted by these.

  The non-opening region can be formed not only by the signal lines provided on the element substrate 10 side, but also by the light shielding film 21 patterned in a lattice shape on the counter substrate 20 side.

  Near the intersection of the non-opening regions, the TFT 30 and the storage capacitor 16 shown in FIG. 2 are provided. By providing the TFT 30 in the vicinity of the intersection of the non-opening region having the light shielding property, the optical malfunction of the TFT 30 is prevented and the aperture ratio in the opening region is secured. Although the detailed structure of the pixel P will be described later, the width of the non-opening region in the vicinity of the intersecting portion is wider than that in the other portions because the TFT 30 and the storage capacitor 16 are provided in the vicinity of the intersecting portion.

  As shown in FIG. 4A, the pixel P is provided with a TFT 30 at the intersection of the scanning line 3a and the data line 6a. The TFT 30 is provided between the source region 30s, the drain region 30d, the channel region 30c, the junction region 30e provided between the source region 30s and the channel region 30c, and the channel region 30c and the drain region 30d. The semiconductor layer 30a has an LDD (Lightly Doped Drain) structure having a junction region 30f. The semiconductor layer 30a is disposed so as to pass through the intersection and overlap the scanning line 3a.

  The scanning line 3a has a quadrangular extended portion in a plan view extended in the X and Y directions at the intersection with the data line 6a. A bent gate electrode portion 30g having an opening that overlaps the extension portion in plan and does not overlap the junction region 30f and the drain region 30d is provided.

  In the gate electrode portion 30g, a portion extending in the Y direction overlaps the channel region 30c in a plane. Also, the portion that overlaps the channel region 30c is bent and extends in the X direction, and the portions facing each other are electrically scanned by contact holes CNT5 and CNT6 provided between the extended portions of the scanning lines 3a. It is connected to the line 3a.

  The contact holes CNT5 and CNT6 are rectangular (rectangular) having a long X direction in a plan view, and are provided on both sides so as to sandwich the junction region 30f along the channel region 30c and the junction region 30f of the semiconductor layer 30a. It corresponds to the groove in the present application.

  The data line 6a extends in the Y direction and has the same extended portion that overlaps the scanning line 3a in a plan view. The data line 6a is connected to the source region 30s by a contact hole CNT1 provided in a portion protruding from the extended portion in the X direction. Electrically connected. A portion including the contact hole CNT1 is a source electrode 31. On the other hand, a contact hole CNT2 is also provided at the end of the drain region 30d, and a portion including the contact hole CNT2 serves as the drain electrode 32. A contact hole CNT3 is provided adjacent to the contact hole CNT2, and the contact hole CNT2 and the contact hole CNT3 are electrically connected by a relay electrode 6b provided in an island shape.

  The pixel electrode 15 is provided so that the outer edge portion overlaps with the scanning line 3a and the data line 6a. In this embodiment, the pixel electrode 15 is drain electrode via two contact holes CNT3 and CNT4 provided at the position overlapping the scanning line 3a. 32 is electrically connected.

The storage capacitor 16 includes a light-shielding first capacitor electrode 16b and a light-transmitting second capacitor electrode 16a disposed so as to face the first capacitor electrode 16b. The first capacitor electrode 16b includes a portion that overlaps the extended portion of the scanning line 3a, and a portion that extends from the portion overlapping the extended portion in the extending direction of the scanning line 3a and the extending direction of the data line 6a. And is disposed in the non-opening region (see FIG. 3).
Further, as shown in FIG. 4B, the first capacitor electrode 16b is provided in an island shape independently for each pixel P. The first capacitor electrode 16b of the pixel P and the first capacitor electrode 16b of the adjacent pixel P are arranged so as to surround one pixel P, thereby forming a light-shielding non-opening region.
On the other hand, as shown in FIGS. 4A and 4B, the second capacitor electrode 16a overlaps the first capacitor electrode 16b in a plane and is provided across a plurality of pixels P in the Y direction. A main line portion 16am and a protruding portion 16ap protruding from the main line portion 16am in the X direction. The main line portion 16am and the protruding portion 16ap are provided with substantially the same width as the first capacitor electrode 16b, the data line 6a, and the scanning line 3a. The second capacitor electrode 16a is provided so as to overlap the first capacitor electrode 16b except for a region including the contact hole CNT4 in which the pixel electrode 15 is electrically connected to the first capacitor electrode 16b.

Next, the structure of the pixel P will be described in more detail with reference to FIGS.
As shown in FIG. 5, the scanning line 3 a is first formed on the element substrate 10. The scanning line 3a is made of, for example, a single metal containing at least one of metals such as Al, Ti, Cr, W, Ta, and Mo, an alloy, a metal silicide, a polysilicide, a nitride, or a laminate of these. , Has light shielding properties.

  A base insulating film 11a made of, for example, silicon oxide is formed so as to cover the scanning line 3a, and a semiconductor layer 30a is formed in an island shape on the base insulating film 11a. The semiconductor layer 30a is made of, for example, a polycrystalline silicon film, and impurity ions are implanted to form an LDD structure having the above-described source region 30s, junction region 30e, channel region 30c, junction region 30f, and drain region 30d.

  A first insulating film (gate insulating film) 11b is formed so as to cover the semiconductor layer 30a. Further, a gate electrode portion 30g is formed at a position facing the channel region 30c with the first insulating film 11b interposed therebetween.

  A second insulating film 11c and a third insulating film 11d are formed so as to cover the gate electrode portion 30g and the first insulating film 11b, and the first insulating film 11b and the first insulating film 11d are formed at positions overlapping with respective end portions of the semiconductor layer 30a. Two holes penetrating the second insulating film 11c and the third insulating film 11d are formed. Then, a conductive film is formed using a light-shielding conductive part material such as Al (aluminum) so as to fill the two holes and cover the third insulating film 11d, and is patterned to form the source region 30s. The connected contact hole CNT1, the data line 6a, and the source electrode 31 are formed. At the same time, the contact hole CNT2 and the drain electrode 32 are formed by patterning the relay electrode 6b in an island shape.

  Interlayer insulating film 12 is formed to cover data line 6a (source electrode 31), drain electrode 32, and third insulating film 11d. The interlayer insulating film 12 is made of, for example, silicon oxide or nitride, and is subjected to a flattening process for flattening surface irregularities caused by covering the region where the TFT 30 is provided. Examples of the planarization method include chemical mechanical polishing (CMP) and spin coating.

  On the interlayer insulating film 12, a shield layer 35 patterned so as to overlap the scanning line 3a and the data line 6a in a plane is formed. The shield layer 35 is made of a light-shielding conductive member such as Al, for example, and shields the invading electromagnetic wave to protect the TFT 30. In the plan view of FIG. 4A, the shield layer 35 is not shown, but is formed in the non-opening region shown in FIG. 3 in plan view.

  An interlayer insulating film 13 is formed so as to cover the shield layer 35 and the interlayer insulating film 12. The interlayer insulating film 13 is also made of, for example, silicon oxide or nitride, and may be planarized in the same manner as the interlayer insulating film 12.

A hole penetrating the two interlayer insulating films 12 and 13 is formed at a position overlapping the drain electrode 32, and a light-shielding conductive film is formed so as to fill the hole. The conductive film is patterned to form the first capacitor electrode 16b.
As the light-shielding conductive film, a single layer film made of Al (aluminum), TiN (titanium nitride) or the like, or a multilayer film in which these layers are stacked can be used.

  Next, a protective film made of, for example, silicon oxide is formed so as to cover the first capacitor electrode 16 b and the interlayer insulating film 13. The protective film is patterned so as to exclude the region where the dielectric layer 16c is formed in the protective film. As a method of patterning by partially removing the protective film, for example, a method of partially dry-etching the formed protective film, or a state in which the surface of the first capacitor electrode 16b to be removed is masked with a resist or the like in advance. There is a lift-off method in which the resist is removed after forming the protective film. As a result, the protective layer 37 that covers the outer edge portion of the first capacitor electrode 16b and covers the surface of the interlayer insulating film 13 is formed.

Next, a dielectric film is formed so as to cover the first capacitor electrode 16b and the protective layer 37, and the dielectric film is patterned to remove the portion overlapping the contact hole CNT4 of the first capacitor electrode 16b. A body layer 16c is formed. Examples of the dielectric film include a silicon nitride film, a single layer film such as haunium oxide (HfO ₂ ), alumina (Al ₂ O ₃ ), and tantalum oxide (Ta ₂ O ₅ ), or at least two of these single layer films. A multilayer film in which seed single-layer films are stacked may be used. Further, the second capacitor electrode 16a is formed by patterning so as to substantially overlap the dielectric layer 16c. For example, even when the first capacitor electrode 16b and the second capacitor electrode 16a are both made of the same material, when the second capacitor electrode 16a is patterned, the first capacitor electrode 16b is formed of the protective layer 37 and the dielectric material. Since it is completely covered with the layer 16c, problems such as etching of the first capacitor electrode 16b are prevented.

  The storage capacitor 16 includes the light-shielding first capacitor electrode 16b and the second capacitor electrode 16a formed as described above, and a dielectric layer 16c sandwiched between these electrodes.

  An interlayer insulating film 14 is formed so as to cover the storage capacitor 16 and the protective layer 37. The interlayer insulating film 14 is also made of, for example, silicon oxide or nitride, and may be planarized in the same manner as the interlayer insulating film 13.

  A hole penetrating the interlayer insulating film 14 is formed at a position overlapping the first capacitor electrode 16b, and a transparent conductive film such as ITO is formed so as to fill the hole. The transparent conductive film is patterned to form a pixel electrode 15 and a contact hole CNT4 that electrically connects the first capacitor electrode 16b and the pixel electrode 15.

  In the storage capacitor 16, as described above, the first capacitor electrode 16b is electrically connected to the drain electrode 32 of the TFT 30 through the contact hole CNT3 and electrically connected to the pixel electrode 15 through the contact hole CNT4. Yes. As described above, the main line portion 16am of the second capacitor electrode 16a is formed so as to straddle a plurality of pixels P in the extending direction (Y direction) of the data line 6a, and also as the capacitor line 3b in the equivalent circuit (see FIG. 2). It is functioning. A fixed potential is applied to the second capacitor electrode 16a. Thereby, the potential applied to the pixel electrode 15 through the drain electrode 32 of the TFT 30 can be held between the second capacitor electrode 16a and the first capacitor electrode 16b.

  As shown in FIG. 6, the contact holes CNT5 and CNT6 are gated through a third insulating film 11d as an insulating film in a groove penetrating the base insulating film 11a to the second insulating film 11c covering the scanning line 3a. The light-shielding side wall portion 33 is formed by laminating a first conductive film extending from the electrode portion 30g and a second conductive film extending from the data line 6a.

  Therefore, the semiconductor layer 30a of the TFT 30 is provided in a non-opening region where the scanning line 3a, the data line 6a, the shield layer 35, the first capacitor electrode 16b, and the second capacitor electrode 16a overlap each other in a plan view. . Further, light is shielded from the side by contact holes CNT5 and CNT6 provided on both sides so as to sandwich the junction region 30f along the channel region 30c and the junction region 30f. That is, even if light enters the pixel P from various directions, a three-dimensional light blocking structure is employed in which light does not enter at least the channel region 30c and the junction region 30f of the semiconductor layer 30a.

  Next, a method for manufacturing the liquid crystal device 100 having such a light shielding structure, particularly a method for forming the side wall 33 will be described with reference to FIG. 7A to 7E are schematic cross-sectional views illustrating a method for manufacturing a liquid crystal device.

  As shown in FIG. 7A, first, corresponding to the positions where the contact holes CNT5 and CNT6 are formed, two grooves through which the scanning line 3a is exposed through the base insulating film 11a and the first insulating film 11b are exposed. Form. As a method for forming such a groove, a method such as dry etching or wet etching can be used. Then, a silicide film of a refractory metal such as tungsten, molybdenum, titanium, tantalum, or the like is formed as a light-shielding first conductive film on the first insulating film 11b including the trench, and the channel region is planarly formed. The silicide film is patterned so as to face each other to form a gate electrode portion 30g (gate electrode portion forming step). Since the silicide film is also formed on the bottom and inner wall portions of the trench, the scanning line 3a and the gate electrode portion 30g are electrically connected. Hereinafter, the silicide film in the trench may be referred to as the silicide film 30g by being given the same reference numeral as the gate electrode portion 30g.

Next, as shown in FIG. 7B, a second insulating film 11c is formed covering the gate electrode portions 30g of the contact holes CNT5 and CNT6 and the exposed first insulating film 11b (second insulating film forming step). .
Then, as shown in FIG. 7C, a photosensitive resist film 60 is formed so as to cover the second insulating film 11c, and the photosensitive resist film 60 is formed so that positions corresponding to the contact holes CNT5 and CNT6 are opened. Is patterned. Subsequently, the second insulating film 11c in the opened groove is removed by a method such as dry etching (first removal step).
Next, as shown in FIG. 7D, a third insulating film 11d is formed to cover the second insulating film 11c including the groove exposed by peeling off the photosensitive resist film 60 (third insulating film forming step). ).
Then, as shown in FIG. 7E, for example, an Al (aluminum) film is formed as a light-shielding second conductive film covering the third insulating film 11d including the groove portion, and the formed aluminum film is formed. The data line 6a is formed by patterning (data line forming step). Hereinafter, the aluminum film in the groove may be referred to as the aluminum film 6a with the same reference numeral as that of the data line 6a. As a result, a sidewall 33 is formed in the trench, in which different types of silicide films 30g as two layers of conductive films and the aluminum film 6a are stacked via the third insulating film 11d as an insulating film (sidewalls). Part forming step).

The effects of the first embodiment are as follows.
(1) In the liquid crystal device 100, the TFT 30 that performs switching control of the pixel electrode 15 of the pixel P is planarly disposed in a non-opening region near the intersection of the scanning line 3a and the data line 6a. The semiconductor layer 30a is sandwiched between two contact holes CNT5 and CNT6 each having a light-shielding side wall 33 provided along the channel region 30c and the junction region 30f. Therefore, since each pixel P has a three-dimensional light shielding structure that shields the TFT 30, even if the liquid crystal device 100 is irradiated with strong (bright) light from the outside, no light leakage current flows through the semiconductor layer 30 a. Therefore, the operation of the TFT 30 does not become unstable and optical malfunction does not occur. That is, it is possible to provide (manufacture) the liquid crystal device 100 that can obtain stable display quality without depending on illumination light.

  (2) In addition, the light-shielding side wall portion 33 is provided in each of the contact holes CNT5 and CNT6 that electrically connect the scanning line 3a and the gate electrode portion 30g. In other words, since the conductive film in the contact holes CNT5 and CNT6 is used as the side wall portion 33, it is not necessary to newly provide a light shielding side wall portion (or groove).

  (3) Since the side wall 33 has a laminated structure of different types of conductive films (silicide film 30g and aluminum film 6a), for example, even if the first conductive film is defective, the second conductive film However, this can be compensated for and the light shielding property can be secured. In particular, when the gate electrode portion 30g is formed using a silicide film, if the high temperature treatment is performed after the gate electrode portion 30g is formed, the light shielding property of the silicide film may be lowered. Even if incident light passes through the silicide film, it is shielded by the aluminum film, so that a more reliable light shielding structure can be realized.

  (4) Furthermore, the second conductive film constituting the side wall portion 33 is simultaneously formed in the process of forming the data line 6a made of an aluminum film. Therefore, it is not necessary to newly provide a step of forming a second conductive film made of a material different from that of the first conductive film, so that the side wall portion 33 can be formed efficiently.

(Second Embodiment)
Next, another embodiment of a liquid crystal device as an electro-optical device according to the present invention will be described with reference to FIGS. 8 is an equivalent circuit diagram of the liquid crystal device according to the second embodiment, FIG. 9 is a schematic plan view showing the configuration of the pixel according to the second embodiment, and FIG. 10 shows the structure of the pixel taken along line EE ′ of FIG. FIG. 11 is a schematic cross-sectional view showing a main part structure of a pixel cut along the line FF ′ of FIG. 9, and FIG. 12 shows a main part structure of the pixel cut along a line GG ′ of FIG. It is a schematic sectional drawing shown. In addition, the same code | symbol is attached | subjected to the same structure as the liquid crystal device 100 of 1st Embodiment, and detailed description is abbreviate | omitted.

  The second embodiment differs from the first embodiment in the arrangement of the TFT 30 and the light-shielding side wall portion.

As shown in FIG. 8, the liquid crystal device 150 of the present embodiment is arranged so as to be parallel to the plurality of scanning lines 3a and the plurality of data lines 6a as signal lines that are insulated and orthogonal to each other along the scanning lines 3a. Capacitance line 3b.
The direction in which the scanning line 3a extends is the X direction, and the direction in which the data line 6a extends is the Y direction.

  In order to hold the pixel electrode 15B, the TFT 30 for switching control of the pixel electrode 15B, and the image signal (potential) applied to the pixel electrode 15B in a region divided by the scanning line 3a, the capacitor line 3b, and the data line 6a. Storage capacitor 16 is provided.

  Although not shown in FIG. 8, the scanning line 3 a is connected to the scanning line driving circuit 102 and the data line 6 a is connected to the data line driving circuit 101, as in the liquid crystal device 100 of the first embodiment. That is, the liquid crystal device 150 is different from the liquid crystal device 100 of the first embodiment in the electrical configuration in that the capacitance line 3b is provided in parallel to the scanning line 3a.

  As shown in FIG. 9, the data lines 6a in this embodiment are arranged substantially linearly in the Y direction. The TFT 30 is arranged extending in the Y direction so that the semiconductor layer 30a overlaps the data line 6a in the vicinity of the intersection of the scanning line 3a and the data line 6a.

  The scanning line 3a extends in the X direction, and is arranged so as to overlap the channel region 30c of the semiconductor layer 30a at the intersection with the data line 6a and not to overlap with the semiconductor layer 30a other than the channel region 30c. That is, in the present embodiment, the scanning line 3a at the intersection functions as the gate electrode portion 30g.

  Further, the scanning line 3a has a pair of protruding portions 3d protruding in the Y direction from the main line portion extending in the X direction at the intersection. The pair of protrusions 3d are disposed on both sides of the junction region 30f along the junction region 30f and the drain region 30d joined to the channel region 30c. In addition, a pair of rectangular grooves 72 and 73 are provided in plan view that overlap the pair of protruding portions 3d and extend from the channel region 30c of the semiconductor layer 30a to the drain region 30d.

  A contact hole CNT11 is provided at the end of the source region 30s of the semiconductor layer 30a to make electrical connection with the data line 6a. At the end of the other drain region 30d, a contact hole CNT12 for providing electrical connection between the pixel electrode 15B and the storage capacitor 16 is provided.

  The capacitor line 3b in the present embodiment is provided to extend in the X direction so as to overlap the scanning line 3a in a plan view and straddle a plurality of pixels. Further, in the vicinity of the intersection with the data line 6a, the pair of protrusions 3d of the scanning line 3a are planarly overlapped and overlapped with the channel region 30c of the semiconductor layer 30a over the drain region 30d.

  The first capacitor electrode 16b of the storage capacitor 16 is provided in an isolated cross shape for each pixel so as to overlap the capacitor line 3b at the intersection. One end of the first capacitor electrode 16b in the Y direction is disposed so as to overlap with the source region 30s except for the contact hole CNT11 portion of the semiconductor layer 30a, and the other end in the Y direction overlaps with the contact hole CNT12. Is arranged. Further, a rectangular relay electrode 71 is provided between the TFTs 30 of the pixels adjacent in the X direction and in a position overlapping the pixel electrode 15B in plan view. The first capacitor electrode 16 b is patterned so as to overlap the relay electrode 71. The relay electrode 71 is provided with a contact hole CNT13 for electrical connection with the first capacitor electrode 16b and a contact hole CNT14 for electrical connection with the pixel electrode 15B. The portion of the capacitance line 3 b that overlaps the first capacitance electrode 16 b in a plane functions as the second capacitance electrode 16 a of the storage capacitor 16.

  A light shielding film 3c is provided so as to overlap the scanning line 3a and the data line 6a in a plan view and surround the square pixel electrode 15B.

  Next, the pixel structure will be described in more detail with reference to FIGS. As shown in FIG. 10, a light-shielding conductive film is first formed on the element substrate 10, and the light-shielding film 3c described above is formed by patterning this. A base insulating film 11a is formed so as to cover the light shielding film 3c, and a semiconductor layer 30a having an LDD structure is formed on the base insulating film 11a facing the light shielding film 3c. A first insulating film 11b as a gate insulating film is formed so as to cover the semiconductor layer 30a, and a gate electrode portion 30g, that is, a scanning line 3a is formed on the first insulating film 11b so as to face the channel region 30c. A second insulating film 11c and a third insulating film 11d are formed so as to cover the scanning line 3a, and a through hole is formed in the first insulating film 11b, the second insulating film 11c, and the third insulating film 11d covering the drain region 30d. The A light-shielding conductive film is formed so as to cover the third insulating film 11d including the through hole, and the first capacitor electrode 16b and the contact hole CNT12 are formed by patterning this. Then, a dielectric layer 16c is formed so as to cover the first capacitor electrode 16b. A light-shielding conductive film is formed on the dielectric layer 16c and patterned to form the capacitor line 3b, that is, the second capacitor electrode 16a. An interlayer insulating film 12 is formed so as to cover the second capacitor electrode 16a, and penetrates the first insulating film 11b, the second insulating film 11c, the third insulating film 11d, the dielectric layer 16c, and the interlayer insulating film 12, and the source region 30s. A through hole is formed so that a part of the hole is exposed. A light-shielding conductive film is formed so as to cover the interlayer insulating film 12 including the through hole, and the data line 6a and the contact hole CNT11 are formed by patterning the conductive film. An interlayer insulating film 13 is formed so as to cover the data line 6a, and after planarizing the surface, a transparent conductive film such as ITO is formed, and this is patterned to form a pixel electrode 15B. .

  As shown in FIG. 11, in the step of forming the data line 6a, a through hole is formed so as to penetrate the dielectric layer 16c and the interlayer insulating film 12 and to expose a part of the first capacitor electrode 16b. A conductive film covering the interlayer insulating film 12 including the through hole is formed and patterned to form the data line 6a and the relay electrode 71 and the contact hole CNT13 as described above. The Further, in the step of forming the pixel electrode 15B, a through hole is formed so as to penetrate the interlayer insulating film 13 and a part of the relay electrode 71 is exposed, and the transparent conductive film covering the interlayer insulating film 13 including the through hole As a result, the pixel electrode 15B is formed as described above.

  That is, the drain region 30d of the semiconductor layer 30a is electrically connected to the first capacitor electrode 16b through the contact hole CNT12, and the pixel electrode 15B through the first capacitor electrode 16b, the relay electrode 71, and the contact holes CNT13 and CNT14. And are electrically connected.

Next, the structure of the grooves 72 and 73 will be described with reference to FIG. As shown in FIG. 12, a pair of grooves 72 and 73 penetrating the second insulating film 11c and the first insulating film 11b and reaching the base insulating film 11a are formed on both sides of the junction region 30f of the semiconductor layer 30a.
In each of the grooves 72 and 73, for example, a silicide film 30g as a first conductive film extending from the scanning line 3a is provided, and for example, an aluminum film 81 as a second conductive film in contact with the silicide film 30g. Is provided. The aluminum film 81 is provided so as to fill in the grooves 72 and 73. As a result, a light-shielding sidewall 83 is formed in which the two conductive films (silicide film 30g and aluminum film 81) are stacked in contact with the grooves 72 and 73, respectively.
The pair of grooves 72 and 73 may be formed so as to reach the light shielding film 3c. However, since the scanning line 3a and the light shielding film 3c are electrically short-circuited, at least the junction region 30f is formed by the side wall portion 83. It is desirable to form at a depth that can block light.

  A third insulating film 11d is formed so as to cover the grooves 72 and 73 and the second insulating film 11c. As described above, the storage capacitor 16 including the first capacitor electrode 16b, the dielectric layer 16c, and the second capacitor electrode 16a is provided on the third insulating film 11d.

  Next, a method for manufacturing the liquid crystal device 150 according to the present embodiment, particularly a method for forming the grooves 72 and 73 including the side wall 83 will be described with reference to FIG. 13A to 13E are schematic cross-sectional views illustrating a method for manufacturing a liquid crystal device. Specifically, this corresponds to a cross-sectional view of the main part taken along line G-G ′ in FIG. 9.

First, as shown in FIG. 13A, grooves 72 and 73 that penetrate the first insulating film 11b and reach the base insulating film 11a are formed. Examples of the method for forming the grooves 72 and 73 include dry etching. For example, a silicide film is formed as a first conductive film on the first insulating film 11b including the trenches 72 and 73 and is patterned to form the scanning line 3a, that is, the gate electrode portion 30g (gate electrode portion forming step). . A silicide film 30g is also formed on the bottom and inner walls of the grooves 72 and 73.
Subsequently, a second insulating film 11c is formed so as to cover the first insulating film 11b including the grooves 72 and 73 (second insulating film forming step). Then, a photosensitive resist film 70 is formed so as to cover the second insulating film 11 c and patterned so as to have openings at positions corresponding to the grooves 72 and 73. Further, the portion of the second insulating film 11c covering the grooves 72 and 73 is removed using a method such as dry etching (first removal step).

  Next, as shown in FIG. 13B, after the photosensitive resist film 70 is removed, for example, an aluminum film 81 is formed as a second conductive film so as to cover the second insulating film 11c including the grooves 72 and 73. To do. Depending on the planar size and depth of the grooves 72 and 73 and the film forming method, the grooves 72 and 73 may not be completely filled, and a space 82 may be generated.

  Therefore, the formed aluminum film 81 is heated to near the melting point. Then, as shown in FIG. 13C, the aluminum film 81 can be formed so as to fill the space 82 in the grooves 72 and 73.

  Next, as shown in FIG. 13D, the aluminum film 81 on the second insulating film 11c excluding the portions of the grooves 72 and 73 is removed (second removal step). As a method of selectively removing the aluminum film 81, a method of removing the exposed aluminum film 81 by dry etching or wet etching by covering the portions of the grooves 72 and 73 with an etching resist can be cited.

  Next, as shown in FIG. 13E, a third insulating film 11d is formed to cover the second insulating film 11c including the grooves 72 and 73 (third insulating film forming step). A third conductive film is formed so as to cover the third insulating film 11d, and is patterned to form the first capacitor electrode 16b as a conductive portion that electrically connects the drain region 30d and the pixel electrode 15B. (Conducting part forming step). A dielectric layer 16c is formed to cover the first capacitor electrode 16b, a fourth conductive film is formed to cover the dielectric layer 16c, and this is patterned to form the second capacitor electrode 16a, that is, the capacitor line 3b. To do. An interlayer insulating film 12 is formed so as to cover the capacitor line 3b.

According to the said 2nd Embodiment, there exist the following effects.
(1) The semiconductor layer 30a of the TFT 30 in the liquid crystal device 150 is formed in a non-opening region on the element substrate 10 where the light shielding film 3c, the first capacitor electrode 16b, the second capacitor electrode 16a, and the data line 6a are stacked in a plane. Is provided. The semiconductor layer 30a is sandwiched between two grooves 72 and 73 each having a light-shielding side wall 83 provided along the channel region 30c and the junction region 30f. Accordingly, since each pixel has a three-dimensional light shielding structure that shields the TFT 30, even if the liquid crystal device 150 is irradiated with strong (bright) light from the outside, no light leakage current flows through the semiconductor layer 30 a, and the TFT 30. Will not become unstable or cause optical malfunction. That is, it is possible to provide the liquid crystal device 150 that can obtain stable display quality without depending on illumination light.

  (2) In the liquid crystal device 150, a part of the scanning line 3a functions as the gate electrode portion 30g. Therefore, as compared with the case where the gate electrode portion 30g is separately provided and electrically connected to the scanning line 3a by the contact holes CNT5 and CNT6 as in the first embodiment, the electrical connection between them can be ensured. . In addition, the two types of conductive films in the contact holes CNT5 and CNT6 of the first embodiment are stacked via the third insulating film 11d as an insulating film, whereas in the second embodiment, two types of conductive films are stacked. Since the conductive films (silicide film 30g and aluminum film 81) are stacked in contact with each other, no parasitic capacitance is generated in the grooves 72 and 73. That is, it is possible to reduce the push-down phenomenon in the operation of the TFT 30 due to the generation of parasitic capacitance. In other words, it is possible to provide the liquid crystal device 150 including the TFT 30 in which the push-down phenomenon hardly occurs even when the high-speed switching operation is performed.

  (3) When forming the side wall 83 in the grooves 72 and 73, the formed aluminum film 81 is heated to the vicinity of the melting point so as to fill the grooves 72 and 73, so that the side wall having light shielding properties is formed. 83 can be formed reliably.

(Third embodiment)
<Electronic equipment>
FIG. 14 is a schematic diagram illustrating a configuration of a projection display device as an electronic apparatus. As shown in FIG. 14, a projection display apparatus 1000 as an electronic apparatus according to the present embodiment includes a polarization illumination apparatus 1100 arranged along the system optical axis L, and two dichroic mirrors 1104 and 1105 as light separation elements. Three reflection mirrors 1106, 1107, 1108, five relay lenses 1201, 1202, 1203, 1204, 1205, three transmissive liquid crystal light valves 1210, 1220, 1230 as light modulation means, and a light combining element As a cross dichroic prism 1206 and a projection lens 1207.

  The polarized light illumination device 1100 is generally configured by a lamp unit 1101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 1102, and a polarization conversion element 1103.

  The dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 1100. Another dichroic mirror 1105 reflects the green light (G) transmitted through the dichroic mirror 1104 and transmits the blue light (B).

The red light (R) reflected by the dichroic mirror 1104 is reflected by the reflection mirror 1106 and then enters the liquid crystal light valve 1210 via the relay lens 1205.
Green light (G) reflected by the dichroic mirror 1105 enters the liquid crystal light valve 1220 via the relay lens 1204.
The blue light (B) transmitted through the dichroic mirror 1105 enters the liquid crystal light valve 1230 via a light guide system including three relay lenses 1201, 1202, 1203 and two reflection mirrors 1107, 1108.

  The liquid crystal light valves 1210, 1220, and 1230 are disposed to face the incident surfaces of the cross dichroic prism 1206 for each color light. The color light incident on the liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 1206. In this prism, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected on the screen 1300 by the projection lens 1207 which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 1210 is obtained by applying the liquid crystal device 100 or the liquid crystal device 150 described above. The liquid crystal device 100 or the liquid crystal device 150 is arranged with a gap between a pair of polarizing elements arranged in crossed Nicols on the incident side and the emission side of colored light. The same applies to the other liquid crystal light valves 1220 and 1230.

  According to such a projection type display device 1000, even when strong (bright) light is irradiated from the lamp unit 1101 as a light source to each of the liquid crystal light valves 1210, 1220, 1230, a liquid crystal device that can obtain stable operation quality. 100 or the liquid crystal device 150 is provided, and high display quality is realized.

  Various modifications other than the above embodiment are conceivable. Hereinafter, a modification will be described.

  (Modification 1) The structure of the side wall 33 in the contact holes CNT5 and CNT6 of the liquid crystal device 100 of the first embodiment is not limited to this. For example, the structure of the side wall portion 83 of the second embodiment can be applied. That is, an aluminum film as a second conductive film is stacked in contact with a silicide film as a first conductive film provided extending from the gate electrode portion 30g, and a third insulating film 11d is formed to cover the aluminum film. Then, the data line 6a may be formed on the third insulating film 11d. If it does in this way, the same effect as operation and effect (2) of a 2nd embodiment can be acquired.

  (Modification 2) The arrangement of the semiconductor layer 30a in the first embodiment or the second embodiment is not limited to this. For example, even if the semiconductor layer 30a is arranged to be bent at the intersection of the scanning line 3a and the data line 6a, the above three-dimensional light shielding structure can be applied.

  (Modification 3) The electronic apparatus to which the liquid crystal device 100 or the liquid crystal device 150 is applied is not limited to the projection display device 1000. For example, projection-type HUD (head-up display), direct-view type HMD (head-mounted display), electronic book, personal computer, digital still camera, LCD TV, viewfinder type or monitor direct-view type video recorder, car navigation system It can be suitably used as a display unit of an information terminal device such as an electronic notebook or POS.

  3a ... scanning line, 6a ... data line, 11b ... first insulating film, 11c ... second insulating film, 11d ... third insulating film, 15, 15B ... pixel electrode, 30 ... thin film transistor (TFT), 30a ... semiconductor layer , 30s ... source region, 30d ... drain region, 30c ... channel region, 30e, 30f ... junction region, 30g ... gate electrode portion and first conductive film, 33 ... sidewall portion, 72, 73 ... groove, 83 ... sidewall portion, DESCRIPTION OF SYMBOLS 100,150 ... Liquid crystal device as an electro-optical device, 1000 ... Projection type display apparatus as an electronic device.

Claims (12)

A semiconductor layer including a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region;
A first insulating film covering the semiconductor layer;
A gate electrode portion facing the channel region via the first insulating film;
A data line provided on the second insulating film covering the gate electrode portion and electrically connected to the semiconductor layer;
A groove provided in the first insulating film and the second insulating film along the bonding region in a plane;
A light-shielding side wall portion having at least two layers of conductive films including a first conductive film provided from the gate electrode portion and the data line is provided in the trench. Electro-optic device.   The electro-optical device according to claim 1, wherein the at least two conductive films are stacked via an insulating film. A semiconductor layer including a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region;
A first insulating film covering the semiconductor layer;
A gate electrode portion facing the channel region via the first insulating film;
A second insulating film and a third insulating film covering the gate electrode portion;
A groove provided in the first insulating film and the second insulating film along the bonding region in a plane;
At least two layers including a first conductive film provided in the trench extending from the gate electrode portion and a second conductive film provided between the first insulating film and the third insulating film. An electro-optical device comprising: a light-shielding side wall portion having the conductive film.   The electro-optical device according to claim 3, wherein the at least two conductive films are in contact with each other.   The electro-optical device according to claim 4, wherein an upper conductive film among the at least two conductive films is provided so as to fill the groove.   6. The electro-optical device according to claim 1, wherein the groove is provided on both sides of the bonding area along the bonding area in a plan view.   The electro-optical device according to claim 1, wherein the at least two conductive films are different types of conductive films. A semiconductor layer including a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region;
A first insulating film covering the semiconductor layer;
A gate electrode portion facing the channel region via the first insulating film;
A data line provided on the second insulating film covering the gate electrode portion and electrically connected to the semiconductor layer;
A method of manufacturing an electro-optical device, comprising: a groove provided in the first insulating film and the second insulating film along the bonding region in plan view;
A light-shielding first conductive film is formed on the first insulating film including the groove, and the gate electrode portion is formed by patterning the first conductive film so as to face the channel region in a plane. A gate electrode portion forming step;
A second insulating film forming step of forming the second insulating film so as to cover the gate electrode portion and the exposed first insulating film;
A first removal step of removing the second insulating film in the trench;
A third insulating film forming step of forming a third insulating film so as to cover the second insulating film including the exposed trench;
A side wall portion in which a light-shielding second conductive film is formed so as to cover the third insulating film, and the first conductive film and the second conductive film are stacked in the groove via the third insulating film Forming a step;
A data line forming step of patterning the second conductive film to form a data line;
A method for manufacturing an electro-optical device. A semiconductor layer including a source region, a drain region, a channel region, and a junction region formed between the source region or the drain region and the channel region;
A first insulating film covering the semiconductor layer;
A gate electrode portion facing the channel region via the first insulating film;
A second insulating film covering the gate electrode portion;
A method of manufacturing an electro-optical device, comprising: a groove provided in the first insulating film and the second insulating film along the bonding region in plan view;
A light-shielding first conductive film is formed on the first insulating film including the groove, and the gate electrode portion is formed by patterning the first conductive film so as to face the channel region in a plane. A gate electrode portion forming step;
A second insulating film forming step of forming the second insulating film so as to cover the gate electrode portion and the exposed first insulating film;
A first removal step of removing the second insulating film in the trench;
A side wall portion in which the light-shielding second conductive film is formed to cover the second insulating film so as to fill the exposed groove, and the first conductive film and the second conductive film are stacked in the groove Forming a step;
And a second removing step of removing the second conductive film on the second insulating film except for the groove portion. The step of forming the side wall portion uses an aluminum film as the second light-shielding conductive film,
The method of manufacturing an electro-optical device according to claim 9, further comprising a step of heating an aluminum film formed on the second insulating film including the groove to near a melting point. A third insulating film forming step of forming a third insulating film so as to cover the second insulating film including the exposed trench;
Forming a through-hole penetrating the first insulating film, the second insulating film, and the third insulating film at a position overlapping the end of the drain region in plan view;
Forming a third conductive film covering the third insulating film including the through hole;
The conductive part forming step of patterning the third conductive film to form a conductive part that electrically connects the drain region and the pixel electrode, further comprising: Manufacturing method of electro-optical device.   An electro-optical device manufactured using the electro-optical device according to any one of claims 1 to 7 or the electro-optical device manufacturing method according to any one of claims 8 to 11. Electronic equipment characterized by

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