JP2000356787A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a pixel structure of a light valve which can increase the pixel aperture ratio as much as possible and can suppress the incident light from the substrate surface or the reflected light from the optical system from entering the channel. SOLUTION: The reflected light from the edge of a back face light shielding film 3 or the incident light from the edge of a black matrix 12 is cut by the following structure. Dummy contact holes 7 which have a depth not touching the back face light-shielding film 3 are formed near the side faces in the longitudinal direction of the channel of a thin film transistor on the region defined by the back face light-shielding film 3 and the black matrix 12, and in an interlayer film 4 formed at least on the back face light-shielding film. A film consisting of at least a wiring material is formed on the side walls of the dummy contact holes.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pixel structure using a thin film transistor (TFT), such as a liquid crystal projector, and more particularly, to an improvement in light shielding of an active matrix type liquid crystal display device for a light valve in which liquid crystal is switched by the TFT. About. The invention also relates to a method for manufacturing the pixel structure.

[0002]

2. Description of the Related Art In recent years, various display devices using liquid crystal panels as wall-mounted TVs, projection TVs, and displays for OA equipment have been developed. Among active liquid crystal panels, an active matrix liquid crystal display in which a thin film transistor, which is an active element, is incorporated in a liquid crystal display device is a high-quality display device for OA equipment because of its advantages that the contrast and the response speed do not decrease even if the number of scanning lines increases. And high-definition display devices,
In a projection type liquid crystal display such as a liquid crystal projection, a large screen display can be easily obtained.

In an active matrix type liquid crystal display device for a light valve, which is usually used for liquid crystal projection, an intense light is incident on a small element and the liquid crystal is switched by a TFT, thereby turning on / off each pixel.
Perform FF to control the transmitted light according to the image information,
The transmitted light is enlarged and projected on a screen or the like via an optical element such as a lens. At this time, if the active layer of the TFT is formed of polysilicon (p-Si), the influence of the incident light is of course Also, there is a problem of off-state leak current generated by light excitation in a channel portion of a TFT due to light reflected from an optical system such as a lens.

Conventionally, in such an active matrix type liquid crystal display device for a light valve, as shown in FIG. 11, gate lines 8 and data lines 10 are arranged in a matrix so as to be orthogonal to each other. A transparent electrode such as ITO 18 serving as a pixel electrode is provided in a region defined by the lines, and a TF is provided at a portion where the gate line 8 and the data line 10 cross.
T is formed. FIG. 12 is an enlarged view of a portion surrounded by a circle in FIG. 11 and shows a TFT formation region. A data line-TFT contact 16 for supplying a signal to the source electrode 13 is formed on the data line 10, and the drain electrode 14 and the ITO 18 serving as a pixel electrode are formed of an ITO-TF.
They are connected by T contacts 17. An LDD region 15 is formed between a channel portion (a portion covered with a gate line) of the TFT and a source / drain region. FIG.
12A is a cross-sectional view taken along line FF ′ of FIG. 12 and FIG. 12B is a cross-sectional view taken along line GG ′. A backside light-shielding film 3 provided on a transparent insulating substrate such as a glass substrate 1 with a base insulating film 2 interposed therebetween, and a black matrix 12 provided on the TFT
Having. That is, when light is incident from the counter substrate side of the TFT with the liquid crystal layer interposed therebetween, the incident light is shielded by the black matrix 12 and the reflected light from the optical system is shielded by the back light shielding film 3.

The black matrix 12 may be formed on the same substrate as the TFT with an interlayer film interposed therebetween as shown in FIG. 13 or may be formed on the TFT opposite substrate with a liquid crystal layer interposed therebetween. When the TFT 12 is formed on the counter substrate side of the TFT, it is necessary to make the overlapping accuracy of the two substrates about 10 μm larger than that of the rear light-shielding film 3. As a result, there is a problem that the aperture ratio cannot be increased.

Therefore, at present, a method of forming the TFT on the same substrate as the TFT has been adopted. In this case, it is not necessary to expect a large margin as described above in order to obtain high alignment accuracy using the semiconductor device manufacturing process, but since the positional relationship between the two light-shielding films and the TFT is not taken into consideration, Measures were not sufficient for light blocking due to irregular reflection in the panel. In particular, as shown in FIG. 13B, in the formation region of the gate line, the back light-shielding film 3 and the black matrix 12 are also formed, so that the light shielding is sufficient, but as shown in FIG. The width of both the back light-shielding film 3 and the black matrix 12 is limited in the portion over the electrodes to increase the pixel aperture ratio. for that reason,
A region of the channel made of polysilicon sandwiched between the source electrode 13 and the drain electrode 14 over the pixel electrode;
In the LDD region 15, the incident light from the edge of the black matrix 12 is reflected by the surface of the back light-shielding film 3, and the reflected light from the edge of the back light-shielding film 3 enters the LDD region 15. This was the cause of current leakage. Of course, the directional components of the incident light and the reflected light include not only the component parallel to the gate line direction but also various directional components as shown in this example. There is.

[0007]

Of course, if the width of the back light-shielding film and the black matrix is increased, it is possible to prevent the incident light and the reflected light from entering the channel, but the pixel aperture ratio is correspondingly reduced. descend.

Accordingly, the present invention provides a pixel structure of a light valve capable of suppressing the incidence of incident light from a substrate surface or reflected light from an optical system on a channel by increasing a pixel aperture ratio as much as possible. With the goal.

[0009]

That is, the present invention provides a method for forming a channel, a gate insulating film and a gate line made of polysilicon on a transparent insulating substrate, a backside light-shielding film, and an interlayer film on the backside light-shielding film. In a pixel structure using a thin film transistor (TFT) in which connected gate electrodes are sequentially formed, a data line for inputting a data signal to the TFT, and a black matrix for shielding incident light on the TFT, a back light shielding film is used. And a black matrix, and a dummy contact hole having a depth not in contact with the back surface light-shielding film is formed at least in an interlayer film formed on the back surface light-shielding film near the side surface of the TFT in the channel length direction. A TFT comprising at least a film made of a wiring material formed on a side wall of the dummy contact hole.
This is related to a pixel structure using.

In the above-mentioned pixel structure, the dummy contact hole is formed before the formation of the gate line, and a gate line material is formed in the dummy contact hole simultaneously with the formation of the gate line. Preferably, the contact hole is formed before the formation of the data line, and a data line material is formed in the dummy contact hole at the same time as the formation of the data line. Further, in the above pixel structure, the back light-shielding film is formed in a matrix on a transparent insulating substrate, and the back light-shielding film has a width only in a portion where a channel and an LDD portion are projected compared to other wiring portions. Provided is a method for manufacturing a TFT pixel structure, which has a wide structure.

Further, there is provided a pixel structure in which a thin film transistor is formed at an intersection of a gate line and a data line, and dummy contact holes are formed at four corners of the intersection.

Further, according to the present invention, a back light-shielding film, a first interlayer film, polysilicon serving as a channel of a thin film transistor (TFT), a gate insulating film, a gate line including a gate electrode portion, a second interlayer film are formed on a transparent insulating substrate. Film, data line, third interlayer film,
In a method of manufacturing a pixel structure using a TFT in which a black matrix is sequentially formed, the TFT is formed in a region defined by a back light-shielding film and a black matrix after a gate insulating film is formed and before a gate line is formed. A dummy contact hole having a depth not in contact with the back surface light-shielding film is formed in the gate insulating film and the first interlayer film formed on the back surface light-shielding film near the side surface in the channel length direction of the semiconductor device. Forming a film made of a gate line material on the side wall of the contact hole, or after forming the second interlayer film, and before forming the data line, in a region defined by the back light-shielding film and the black matrix, A second interlayer film, a gate insulating film, and a first interlayer film formed on the back surface light-shielding film in the vicinity of the side surface in the channel length direction do not contact the back surface light-shielding film Forming a difference between the dummy contact holes, to provide a manufacturing method of a pixel structure using a TFT, which comprises forming a film comprising the same time the dummy contact hole sidewalls in data line formed from the data line material.

In particular, the back surface light-shielding film is formed of a conductive material, and a contact for controlling the potential of the back surface light-shielding film is formed by a plurality of etchings. In the process,
It is preferable to form the dummy contact holes simultaneously.

The back light-shielding film is formed of a conductive material, and the back light-shielding film is formed in a matrix for controlling the potential, and the channel and the LDD region of the back light-shielding film are projected. A method of manufacturing a TFT pixel structure using a backside light-shielding film, characterized in that only a portion to be formed has a structure wider than other wiring portions.

[0015]

FIG. 1 is a partial plan view of a pixel structure of a light valve according to an embodiment of the present invention, in which a TFT is formed at a portion where a gate line 8 and a data line 10 are orthogonal to each other. 2 shows the configuration. In this example, a case where a channel made of polysilicon is formed below the data line 10 is shown. FIG. 2 is a sectional view taken along line AA ′ of FIG. 1 and FIG. 2B is a sectional view taken along line BB ′ of FIG. It includes a back light-shielding film 3 provided on a transparent insulating substrate such as a glass substrate 1 with a base insulating film 2 interposed therebetween, and a black matrix 12 provided on the TFT. The back light-shielding film 3 has a structure wider than the other portions only in the region below the channel and the LDD.
Have sufficient width to prevent incidence on the channel consisting of The first interlayer film 4 and the gate insulating film 6 are formed at four corners formed by the intersection of the gate line 8 and the data line 10.
In addition, a dummy contact hole 7 having a depth not in contact with the back light-shielding film 3 is provided. At the time of gate line formation, a film made of a gate line material is also formed in the dummy contact hole 7, and after patterning the gate line, a film made of the gate line material remains at least on the side walls of the dummy contact hole 7. As a result, as shown in FIG.
In the LDD region 15, incident light from the edge portion of the black matrix 12 and reflected light from the edge portion of the back surface light-shielding film 3 are blocked by the gate line material formed in the dummy contact hole 7, and from the polysilicon 5. It is possible to prevent irregular reflection on the channel.

FIG. 5 is a view for explaining another embodiment of the present invention, and FIG. 6 is a cross section (a) along the line CC 'and a cross section (b) along the line DD' in FIG. It shows. 1 and 2 are different from the second interlayer film 9, the gate insulating film 6, the first
A dummy contact hole 7 ′ having a depth not in contact with the back surface light-shielding film 3 is provided in the interlayer film 4, and a film made of a data line material is also formed in the dummy contact hole 7 ′ when a data line is formed. After the patterning, a film made of the data line material remains at least on the side wall of the dummy contact hole 7 '. As a result, FIG.
In the LDD region 15, incident light from the edge of the black matrix 12 and reflected light from the edge of the back light-shielding film 3 are blocked by the data line material formed in the dummy contact hole 7 '. As a result, irregular reflection on the channel made of polysilicon 5 can be prevented.

The width of the back light-shielding film is appropriately designed in consideration of the lower limit of the aperture ratio so as not to cause a step in the data line and the gate line normally formed in the upper layer.
Only the area below the DD is designed by the following method.
FIG. 14 shows an example. In the partial cross-sectional view of the TFT in the channel width direction, the upper surface end of the rear light-shielding film 3 is 3a, and the lower surface end of the channel 5 or the LDD portion is pulled from 5a, 5a onto the rear light-shielding film 3 in the normal direction of the liquid crystal panel. The point at which the bent line intersects the upper surface of the back light shielding film 3 is defined as 3b. 3a-
The angle between 5a and 5a-3b is defined as θ. When the liquid crystal panel is arranged perpendicular to the light emitted from the light source, most of the incident light passes through the liquid crystal panel at an angle of 30 ° or less with respect to the normal direction of the liquid crystal panel. This is disclosed in paragraph (0065) of JP-A-8-171101. Therefore, it is considered that most of the reflected light from the back surface of the substrate or the optical system is within a range of up to 30 ° with respect to the normal direction of the liquid crystal panel. In order to effectively shield the backside reflected light, it is sufficient that θ> 30 ° (1). Therefore, the distance d ₁ between 3a and 3b is determined when the film thickness of the first interlayer 4 is d ₂ . d ₁ > d ₂ tan30 ° (2) This is also considered in the channel length direction. That is, the back surface light-shielding film 3 is preferably formed wider at least from the region where the channel 5 and the LDD are projected by the distance d ₁ defined by the equation (2). The upper limit of d ₁ may be appropriately determined based on a balance between the first interlayer film thickness, the depth of the dummy contact hole 7 and the lower limit of the allowable aperture ratio.

The shapes of the dummy contact holes 7 and 7 'are not limited to the rectangular shapes as shown in FIGS. 1 and 5, and the incident light from the front surface of the substrate and the reflected light from the rear surface can be sufficiently reduced. Any shape may be used as long as it can shield light. For example, in FIG. 1, a hook shape extending further along the gate line 8 may be used. The size of the dummy contact holes 7 and 7 ′ is not particularly limited as long as a sufficient light-shielding effect can be obtained within a region defined by the back light-shielding film 3 and the black matrix 12. For example, in FIG. Considering the easiness of forming a dummy contact hole, the contact hole may be formed to have a width (in the channel length direction) of the order of a normal contact. The length (in the direction orthogonal to the channel length direction) is only required to sufficiently prevent light from entering the LDD region 15, and the channel 5 and the dummy contact hole 7,
What is necessary is just to change suitably according to the distance with 7 '. It is preferable that the distance between the channel and the dummy contact hole is larger than the thickness of the gate insulating film 6, and the channel and the dummy contact hole are usually formed in a region where the dummy contact hole can be easily formed in accordance with the wiring pattern.

The depth of the dummy contact holes 7, 7 'may be a depth which does not make contact with the back surface light-shielding film 3. However, if the depth is too small, the light-shielding effect of the dummy contact holes will not be sufficient. The thickness is required to be at least about half of the thickness of the first interlayer film, though it depends on the size of the first interlayer film and the distance from the channel.

The formation of the dummy contact hole may be performed before the wiring material to be formed therein is formed, and a separate formation step may be provided. It is preferable to perform the process simultaneously with the formation of the contact hole. For example, when the back light-shielding film is formed of a conductive material, it is necessary to fix the back light-shielding film to an arbitrary potential such as a ground potential in order to reduce adverse effects on the TFT.
In order to fix the potential, it is common practice to form a contact hole outside the pixel formation region and control the potential there, but the thickness of the first interlayer film is such that the back surface light-shielding film acts as a back gate. In order to avoid this, it is not easy to form a contact hole that reaches the backside light-shielding film by a single etching.
The contact is formed by etching twice or more. Therefore, by forming a dummy contact hole at the same time as the first etching, a dummy contact hole can be formed without increasing the number of steps.

In the above two embodiments, the configuration in which the channel of the TFT is arranged below the data line has been described. For example, as shown in FIG. 9, even when the channel is formed in a region which does not overlap with the data line, The present invention can be applied. That is, FIG. 1 corresponding to a cross section taken along line EE ′ in FIG.
0, a configuration having a dummy contact hole 7 in which a gate line material is disposed (a), a configuration having a dummy contact hole 7 'in which a data line material is disposed (b),
Further, a dummy contact hole 7 in which a gate line material is provided.
And dummy contact hole 7 'in which data line material is arranged
Various configurations such as configuration (c) having As shown in FIG. 9, the dummy contact hole can be formed at a position away from the data line, so that there is no problem even if the dummy contact hole 7 'in which the data line material is arranged is in contact with the gate line 8.

The source electrode 13 and the drain electrode 14 are not essential, and a contact may be directly formed in the source / drain region of the TFT.

[0023]

EXAMPLES Hereinafter, the present invention will be described in detail with reference to examples, but the present invention is not limited to these examples.

Embodiment 1 A case where the pixel structure shown in FIGS. 1 and 2 (a gate line material is formed in a dummy contact hole) will be described as an example. 3 and 4 are process cross-sectional views for explaining the manufacturing process of the present example, and are cross-sectional views taken along line BB 'in FIG. First,
As shown in FIG. 3A, a base insulating film 2 is formed on a glass substrate 1 with SiN or the like. This is a film for preventing contamination of impurities from the glass substrate, and may have a thickness of about 200 nm.

Next, as shown in FIG.
To form The backside light-shielding film may be formed of any material as long as it can shield the reflected light from the substrate side.
i. When formed of WSi, a light-shielding effect can be obtained if the thickness of the backside light-shielding film 3 is 100 nm or more, but preferably 160 nm or more. The upper limit of the film thickness is not particularly limited, and may be appropriately selected according to the design. Usually, the upper limit is about 500 nm. Here, it was set to about 170 nm. When patterning the back light shielding film, the width of the wiring portion is set to, for example, 2 μm in consideration of the line width of the gate line and the data line. The width of the back surface light-shielding film corresponding to the channel and the lower part of the LDD is set as follows.
May be formed to be 0.6 μm or more longer on one side than the region where is projected. For example, when the channel width is 1 μm, the channel length is 4 μm, and the LDD length is 1 μm, the light-shielding film width in the channel length direction is 7.2 μm and the light-shielding film width in the channel width direction is 2.2 μm.

Next, as shown in FIG. 3C, a first interlayer film 4 is formed. For example, it is formed of SiN or the like. The thickness of the first interlayer film 4 is set at 500 to prevent the back light-shielding film 3 from acting as a back gate for the TFT.
Desirably, it is not less than nm. The upper limit of the film thickness is not particularly limited and may be appropriately selected according to the design.
It is desirable to set it to about μm. Here, it is formed to a thickness of about 1 μm.

Subsequently, as shown in FIG. 3D, an island-shaped polysilicon 5 is formed to a thickness of 50 nm. For example, LPC
After forming an amorphous silicon layer doped with boron by the VD method, a laser annealing step is added, and further, a photolithography step and an etching step are added to form a polysilicon layer 5. A gate insulating film 6 is formed to a thickness of 0.1 μm by CVD so as to cover the polysilicon 5 (FIG. 3E).

Next, as shown in FIG. 4A, a dummy contact hole 7 is formed in the gate insulating film 6 and the first interlayer film 4. Since the back light-shielding film 3 is formed of WSi, a contact for controlling the potential of the back light-shielding film is formed.
At the first time of this contact etching, dummy contact holes 7 are simultaneously formed at both ends of the LDD portion of the pixel TFT. Here, the dummy contact hole 7 was formed to have a width of about 500 nm and a depth of about 700 nm as shown in the sectional view.

Next, as shown in FIG.
A gate electrode portion of the gate line 8 is formed by forming a film to a thickness of about 100 nm by a CVD method such as Si and patterning the film.
At this time, a WSi film is also formed in the dummy contact hole 7. As a result, the total thickness of the WSi film formed on the side wall of the dummy contact hole is about 200 nm, and a sufficient light-shielding property can be obtained. Subsequently, phosphorus ions are added to the N-type MOS-TFT by ion implantation, and P-type MOS-T
After the source and the drain are formed by implanting boron into the FT, impurity activation annealing is performed. After that, a second contact formation reaching the back light shielding film 3 is performed.

On these, as a second interlayer film 9, SiN
Are formed to a thickness of about 300 nm by a CVD method (FIG. 4C). Fig. 4
As shown in (d), a data line 10 (400 nm thick) is formed, and thereafter, a third interlayer film 11 and a black matrix 12 are sequentially formed. For example, the third interlayer film 11 is made of Si
N is formed to a thickness of 300 nm, and black matrix 12 is formed of aluminum to a thickness of 400 nm. The second contact formation that reaches the back surface light-shielding film 3 may be performed simultaneously with the formation of the contact between the data line and the TFT.

Embodiment 2 A case where the pixel structure shown in FIGS. 5 and 6 (a data line material is formed in a dummy contact hole) will be described as an example. 7 and 8 are process cross-sectional views illustrating the manufacturing process of the present example, and are cross-sectional views taken along line DD 'in FIG. FIG.
FIGS. 3A to 3E illustrate FIGS. 3A to 3E described in the first embodiment.
This is the same as (e), and the description is omitted.

Next, FIG. 8A shows a CV such as WSi.
A film is formed to a thickness of about 100 nm by method D and patterned to form a gate electrode portion of the gate line 8. Subsequently, phosphorus ions are added to the N-type MOS-TFT by ion implantation,
After the source and the drain are formed by implanting boron into the type MOS-TFT, impurity activation annealing is performed.

On these, as a second interlayer film 9, SiN
Are formed to a thickness of about 300 nm by a CVD method (FIG. 8B).

Next, as shown in FIG. 8C, the second interlayer film 9, the gate insulating film 6, and the first interlayer film 4 are etched to form dummy contact holes 7 '. The contact etching may be performed at the same time as the contact etching to the back light-shielding film 3, and may be performed so that the first etching has a depth of about 1 μm. For this reason, the distance between the dummy contact hole 7 ′ and the back surface light-shielding film is
(About 300 nm). The width shown in the cross-sectional view is about 500 nm.

Next, a metal material such as aluminum is used as shown in FIG.
A data line 10 (400 nm thick) is formed as shown in FIG. At this time, an aluminum film is simultaneously formed in the dummy contact hole 7 '. As a result, the dummy contact holes are almost filled with aluminum, and sufficient light-shielding properties can be obtained. After that, the third interlayer film 11 and the black matrix 12 are sequentially formed.

[0036]

According to the present invention, a dummy contact hole is provided in the vicinity of a channel side surface, and a film made of a wiring material is formed in the dummy contact hole, so that incident light incident from a black matrix edge portion or Light reflected from the back surface light-shielding film edge from the back surface of the substrate is shielded by the film of the wiring material formed in the dummy contact hole, and is prevented from reaching the channel portion of the TFT, so that light leakage can be prevented. Further, by increasing only the width of the light shielding film below the channel of the TFT, the reflected light from the back surface can be effectively shielded. As a result, the black matrix and the backside light-shielding film can be minimized, and a reduction in aperture ratio can be prevented.

Further, by forming the dummy contact holes simultaneously with the formation of other contact holes, it is not necessary to add a step for forming the dummy contact holes, and it is possible to suppress an increase in manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a plan view of a pixel structure according to an embodiment of the present invention.

FIG. 2A is a cross-sectional view of the pixel structure of FIG. 1 taken along line AA ′.
FIG. 3B is a cross-sectional view taken along line BB ′.

FIG. 3 is a process cross-sectional view for explaining a manufacturing process of the pixel structure in FIG. 1;

FIG. 4 is a process cross-sectional view for explaining a manufacturing process of the pixel structure in FIG. 1;

FIG. 5 is a plan view of a pixel structure according to another embodiment of the present invention.

FIG. 6A is a cross-sectional view of the pixel structure of FIG. 5 taken along line CC ′.
And (b) is a sectional view taken along line DD ′.

FIG. 7 is a process cross-sectional view illustrating a manufacturing process of the pixel structure in FIG. 5;

FIG. 8 is a process cross-sectional view illustrating a manufacturing process of the pixel structure in FIG. 5;

FIG. 9 is a plan view illustrating still another embodiment of the present invention.

FIG. 10 is a cross-sectional view taken along the line EE ′ of FIG. 9, showing an example in which the form of the dummy contact hole is variously changed.

FIG. 11 is a plan view illustrating a conventional pixel structure.

FIG. 12 is a partially enlarged view of the pixel structure of FIG. 11;

13A is a cross-sectional view taken along line FF ′ of the pixel structure of FIG. 12, and FIG. 13B is a cross-sectional view taken along line GG ′.

FIG. 14 is a drawing for explaining a method of designing a back light shielding film.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Base insulating film 3 Back light shielding film 4 First interlayer film 5 Polysilicon 6 Gate insulating film 7, 7 'Dummy contact hole 8 Gate line 9 Second interlayer film 10 Data line 11 Third interlayer film 12 Black matrix 13 Source electrode 14 Drain electrode 15 LDD region 16 Data line-TFT contact 17 ITO-TFT contact 18 ITO

Claims (11)

[Claims] 1. A thin film transistor in which a back light shielding film, a channel made of polysilicon, a gate insulating film, and a gate electrode connected to a gate line are sequentially formed on the back light shielding film via an interlayer film on the transparent insulating substrate. (TFT), the TFT
In a pixel structure using a TFT having a data line for inputting a data signal to the TFT and a black matrix for shielding incident light on the TFT, the pixel structure is within a region defined by the back light-shielding film and the black matrix, At least in the vicinity of the side surface in the channel length direction, at least an interlayer film formed on the back light-shielding film has a dummy contact hole having a depth not in contact with the back light-shielding film, and at least a film made of a wiring material is formed on a side wall of the dummy contact hole. A pixel structure using a TFT, which is formed. 2. The method according to claim 1, wherein the dummy contact hole is formed before the formation of the gate line, and a gate line material is formed in the dummy contact hole simultaneously with the formation of the gate line. Item 1. TF according to item 1.
Pixel structure using T. 3. The dummy contact hole is formed before forming a data line, and a data line material is formed in the dummy contact hole at the same time as forming the data line. Item 1. TF according to item 1.
Pixel structure using T. 4. The light-shielding film is formed in a matrix on a transparent insulating substrate, and the rear light-shielding film is formed wider only in a portion where a channel and an LDD portion are projected than in other portions. 4. The method according to claim 1, wherein:
A pixel structure using the TFT according to any one of the above. 5. The semiconductor device according to claim 1, wherein the TFT is formed at an intersection of the gate line and the data line, and dummy contact holes are formed at four corners of the intersection. A pixel structure using the TFT according to claim 1. 6. A back light-shielding film, a first interlayer film, polysilicon serving as a channel of a thin film transistor (TFT), a gate insulating film, a gate line including a gate electrode portion, a second interlayer film, and a data line on a transparent insulating substrate. , A third interlayer film, and a pixel structure using a TFT in which a black matrix is sequentially formed. After the gate insulating film is formed and before the gate line is formed, the region defined by the back light-shielding film and the black matrix is formed. A gate insulating film formed on the back light-shielding film in the vicinity of a side surface of the TFT in the channel length direction;
A dummy contact hole having a depth not in contact with the backside light-shielding film is formed in the interlayer film, and a film made of a gate line material is formed on the side wall of the dummy contact hole at the same time as the gate line is formed. A method for manufacturing a pixel structure. 7. The back light-shielding film is formed of a conductive material, and a contact for controlling the potential of the back light-shield film is formed by etching a plurality of times. 7. The method for manufacturing a pixel structure using a TFT according to claim 6, wherein the dummy contact holes are simultaneously formed in the step. 8. The back light-shielding film is formed of a conductive material, and the back light-shield film is formed in a matrix for controlling the potential of the back light-shield film. 8. A pixel structure using a TFT according to claim 6, wherein only a portion where the LDD portion is projected is formed wider than other wiring portions. 9. A back light-shielding film, a first interlayer film, polysilicon serving as a channel of a thin film transistor (TFT), a gate insulating film, a gate line including a gate electrode portion, a second interlayer film, and a data line on a transparent insulating substrate. In the method for manufacturing a pixel structure using a TFT in which a third interlayer film and a black matrix are sequentially formed, after the formation of the second interlayer film and before the formation of the data lines, the back light-shielding film and the black matrix are defined. A dummy contact having a depth not in contact with the back surface light-shielding film in the second interlayer film, the gate insulating film, and the first interlayer film formed on the back surface light-shielding film in the region near the side surface of the TFT in the channel length direction. A method of manufacturing a pixel structure using a TFT, wherein a hole is formed and a film made of a data line material is formed on the side wall of the dummy contact hole simultaneously with the formation of the data line. 10. The back light-shielding film is formed of a conductive material, and a contact for controlling the potential of the back light-shield film is formed by etching a plurality of times. 10. The method according to claim 9, wherein the dummy contact holes are formed simultaneously in the step. 11. The back light-shielding film is formed of a conductive material, the back light-shield film is formed in a matrix for controlling the potential of the back light-shield film, and the back light-shield film is formed of a channel. 11. The pixel structure using a TFT according to claim 9, wherein only a portion where the LDD portion is projected is formed wider than other wiring portions.