JP2009216899A - Display element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal panel for preventing reduction in surface luminance without increasing the thickness even when aperture ratio decreases. <P>SOLUTION: A signal line 33 that does not transmit light is formed on a glass substrate 25. A pixel electrode 35 partially overlapping the signal line 33 in a plan view is formed. A projecting part 37 for irregularly reflecting incident light L1 is formed on the back surface side of the signal line 33. Even when the width dimension of the signal line 33 is set at a predetermined size to reduce the aperture ratio, the reduction in surface luminance can be prevented by reusing the light L1 irregularly reflected by the projecting part 37. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display element including a pixel electrode partially overlapping a wiring in a plan view.

  In recent years, a liquid crystal display device has been put to practical use as a display device capable of obtaining a high-functionality and high-definition display while having a high density and a large capacity.

  There are various types of liquid crystal display devices. Among them, a thin film transistor (TFT) is used as a switching element because crosstalk between adjacent pixels is small, a high-contrast display is obtained, and a large area is easy. An active matrix type liquid crystal display element including an array substrate which is a first substrate provided with pixel electrodes in a matrix, that is, a liquid crystal display device using a liquid crystal panel is often used.

  In an active matrix liquid crystal display device, a black matrix (BM) is provided for the purpose of preventing light leakage between pixels. The black matrix is generally disposed on the counter substrate side, which is a second substrate disposed opposite to the array substrate and a liquid crystal layer as a light modulation layer, together with a color filter color layer. For this reason, it is necessary to consider misalignment between the array substrate and the counter substrate in order to accurately arrange the black matrix corresponding to the position between the pixels. Since it is formed in a wide width, there is a problem in that the ratio (opening ratio) of the opening that transmits light is reduced.

  In order to solve such a problem, in recent years, an organic insulating film is provided on the wiring of the array substrate, a pixel electrode is provided on the uppermost layer, and a wiring (signal line) provided with a matrix in the end thereof is planar. A wiring black matrix structure using wirings as a black matrix by forming them so as to overlap with each other has been proposed (see, for example, Patent Document 1).

  However, even with such a configuration, when a color filter is provided on the counter substrate side, the signal line can be made thinner than a certain width in consideration of color mixing due to misalignment between the array substrate and the counter substrate and variation in aperture ratio. become unable. Since the minimum required signal line width is determined by the ability of the cell process to be applied, as the pixel size decreases as the definition becomes higher, the proportion of wiring increases and the aperture ratio decreases. There is a problem that the surface brightness is lowered.

Therefore, a configuration is also known in which a concave / convex scattering layer is provided on the backlight side of the liquid crystal panel so that the light reflected by the signal line and the like is scattered and reflected and reused, thereby suppressing the decrease in surface luminance. (For example, see Patent Document 2).
JP-A-8-50305 Japanese Patent Laid-Open No. 10-339872

  The present invention has been made in view of such a point, and an object of the present invention is to provide a display element capable of suppressing a decrease in surface luminance without increasing a thickness even when an aperture ratio is decreased.

  The present invention provides a first substrate body, a plurality of wirings that are formed on the first substrate body so as to cross each other and do not transmit light, and are arranged corresponding to the crossing positions of these wirings. A first substrate including a pixel electrode that is partially overlapped and at least a portion that is capable of transmitting light from the back surface side, and a switching element that is connected to the wiring and drives the pixel electrode, and a second substrate A main body, a colored layer provided on the second substrate main body corresponding to the pixel electrodes, and a second substrate disposed opposite to the first substrate; the first substrate and the second substrate; And a concavo-convex structure for irregularly reflecting the light incident on the back surface side on at least a part of the back surface side of the wiring.

  And the uneven | corrugated | grooved part which diffusely reflects the light which injected into this back surface side is formed in the back surface side of at least one part of wiring which overlapped with a part of pixel electrode by planar view.

  According to the present invention, even if the width ratio of the wiring is increased to reduce the aperture ratio in consideration of the positional deviation between the pixel electrode and the colored layer when the first substrate and the second substrate are opposed to each other, The light irregularly reflected by the light can be reused to prevent a decrease in surface luminance, and the uneven portion is formed on the back side of the signal line, so that the overall thickness does not increase.

  Hereinafter, the configuration of an embodiment of the present invention will be described with reference to FIGS.

  Reference numeral 11 denotes a liquid crystal display device as a display device. The liquid crystal display device 11 includes a liquid crystal panel 12 which is a liquid crystal display element as a display element, and a surface which is disposed on the back side of the liquid crystal panel 12 and emits white light. And a backlight 13 as a light source device, and is a so-called transmission type that transmits light from the backlight 13 and uses it.

  The liquid crystal panel 12 is an active matrix type liquid crystal panel capable of color display. An array substrate 15 as a first substrate and a counter substrate 16 as a second substrate are arranged to face each other, and light is transmitted between the substrates 15 and 16. A liquid crystal layer 17 as a modulation layer and a spacer that holds the gap constant are interposed, and a peripheral portion thereof is bonded by an adhesive layer 18, and a rectangular display region 22 located in the center is formed in FIGS. A plurality of pixels (sub-pixels) 23 shown in FIG. 2 are arranged in a matrix, and a non-display area 24 as a light-shielding portion is formed in a frame shape surrounding the display area 22. In addition, polarizing plates (not shown) are attached to the liquid crystal panel 12 on the display side of the array substrate 15 and the back surface (back surface) side of the counter substrate 16, respectively.

  The array substrate 15 has a glass substrate 25 as a first substrate body which is a translucent insulating substrate such as a high strain point glass substrate or a quartz substrate, for example, and the liquid crystal layer 17 side of the glass substrate 25 (in FIG. 4). On the upper main surface, as shown in FIG. 3, scanning lines (gate wirings) 31 and auxiliary capacitance lines 32, which are a plurality of wirings, and signal lines (source wirings) 33, which are a plurality of wirings, are connected to each other. A thin film transistor (TFT) 34, which is a switching element, is provided at each crossing position of the scanning line 31 (auxiliary capacitance line 32) and the signal line 33 and covers them. Thus, an alignment film such as a vertical alignment film (not shown) for aligning the liquid crystal molecules of the liquid crystal layer 17 is formed.

  The scanning line 31, the auxiliary capacitance line 32, and the signal line 33 are, for example, tantalum (Ta), chromium (Cr), aluminum (Al), molybdenum (Mo), tungsten (W), copper (Cu), etc. Each is formed by the laminated film or alloy film. For this reason, the scanning line 31, the auxiliary capacitance line 32, and the signal line 33 do not transmit light. In other words, the scanning line 31, the auxiliary capacitance line 32, and the signal line 33 have a light shielding property (reflection property) and function as a wiring black matrix (BM).

  The scanning line 31 is formed along the left-right direction in FIG. 1, and a part of the scanning line 31 protrudes in a direction perpendicular to the scanning line 31 (upward in FIG. 1). It is a gate electrode 34g. The scanning lines 31 are electrically connected to a peripheral drive circuit (not shown) formed in the non-display area 24, and a signal for switching control of each thin film transistor 34 is applied.

  The auxiliary capacitance line 32 also serves as an upper electrode of an auxiliary capacitance element (not shown) formed in parallel with the liquid crystal layer 17, and is formed substantially in parallel with the scanning line 31. The auxiliary capacitance lines 32 are electrically connected to the peripheral drive circuit, and a signal for redistributing the potentials of the auxiliary capacitance elements is applied.

  The auxiliary capacitive element is electrically connected to the drain electrode 34d of the thin film transistor 34 together with the pixel electrode 35, and is electrically in parallel with the liquid crystal capacitance of the liquid crystal layer 17. The auxiliary capacitance element is for redistributing the potential by changing the potential of the auxiliary capacitance line 32 by a signal and determining the voltage applied to the pixel electrode 35.

  The signal line 33 is formed along the vertical direction in FIG. 1 and is electrically connected to the source electrode 34s of the thin film transistor 34. These signal lines 33 are electrically connected to the peripheral drive circuit, and a voltage corresponding to the signal from the peripheral drive circuit is applied to the pixel electrode 35 through each thin film transistor 34 to drive the pixel electrode 35. It is configured to let you. Further, a concave-convex structure is formed on the back side of a part of the signal lines 33, for example, the side of the pixel electrode 35 and the back side of the part located between the scanning line 31 and the lower auxiliary capacitance line 32. A plurality of convex portions 37 are formed.

  The thin film transistor 34 is, for example, an N channel type polysilicon (p-Si) TFT, and a source region 34cs and a drain region 34cd are formed in a channel layer 34c, which is a semiconductor layer made of polysilicon, respectively. A translucent gate insulating film 40 is formed on the entire surface covering 34c by a silicon oxide film or the like. Further, a gate electrode 34g is formed on the gate insulating film 40, and a light-transmitting interlayer insulating film 41 is formed on the entire surface covering the gate electrode 34g by a silicon oxide film or the like. A source electrode 34s (signal line 33) and a drain electrode 34d are formed, and these electrodes 34s and 34d are connected to each region through contact holes 42 and 43 formed across the gate insulating film 40 and the interlayer insulating film 41. It is electrically connected to 34cs and 34cd. Further, a light-transmitting protective insulating film 44 and a transparent organic insulating film 45 such as a silicon nitride film are sequentially formed so as to cover these electrodes 34s, 34d, etc., and a gate insulating film 40, an interlayer insulating film 41, and a protective insulating film 44 are formed. The pixel electrode 35 formed on the transparent organic insulating film 45 is connected to the drain electrode 34d through contact holes 46 and 47 respectively formed in the transparent organic insulating film 45.

  The gate electrode 34g is formed by projecting a part of the scanning line 31 to the side opposite to the side where the convex portion 37 is formed, here, the upper side in FIG.

  Although not shown, the peripheral drive circuit includes a scan line drive circuit that sends a signal to the scan line 31, an auxiliary capacitance line drive circuit that sends a signal to the auxiliary capacitance line 32, and a signal line drive circuit that sends a signal to the signal line 33. Each of these is constituted by a thin film transistor which is a switching element. The thin film transistor includes, for example, an N channel type LDD (Lightly Doped Drain) type polysilicon TFT, a P channel type polysilicon TFT, and the like.

  Each pixel electrode 35 is formed in a substantially rectangular shape by a transparent conductive material such as ITO (Indium Tin Oxide), for example, and the upper and lower ends in FIG. 2 overlap the auxiliary capacitance lines 32 and 32 in plan view, respectively. Are formed so as to overlap the signal lines 33 and 33 respectively. Further, in each pixel electrode 35, a portion between the scanning line 31 and the upper auxiliary capacitance line 32 in FIG. 2 becomes an ineffective portion 34a facing the thin film transistor 34, and the scanning line 31 and the lower side in FIG. A portion between the auxiliary capacitance line 32 is an effective display portion 34b.

  A plurality of, for example, three, protrusions 37 are formed on each of the signal lines 33 in the longitudinal direction along the signal line 33, and are spaced apart at substantially equal intervals in the width direction. Further, each convex portion 37 extends over a portion from the scanning line 31 of the pixel electrode 35 to the auxiliary capacitance line 32 adjacent to the lower side, in other words, on each side portion of the effective display portion 35b of the pixel electrode 35. Along the entire side portion, a straight line is formed continuously. Further, the convex portion 37 closest to the pixel electrode 35, that is, the approximate center position in the width direction of the convex portion 37 located near both sides in the width direction of each signal line 33 is a position corresponding to the side edge of the pixel electrode 35. ing. In addition, each convex portion 37 is formed in a substantially trapezoidal shape so that the upper side width dimension which is the base end side is large and the lower side width dimension which is the distal end side is small in a sectional view. For this reason, inclined surfaces 37a and 37b are formed on each convex portion 37 on both sides in the width direction. Further, the tip of each convex portion 37 is in contact with the etching stopper 49 via a hole pattern 48 penetrating the gate insulating film 40 and the interlayer insulating film 41, respectively.

  The hole pattern 48 is formed by, for example, etching or the like in the same process as the contact holes 42 and 43, for example.

  The etching stopper 49 is formed, for example, on the glass substrate 25 by the same polysilicon film as the channel layer 34c in the same process as the channel layer 34c, and prevents over-etching when forming the hole pattern 48. .

  On the other hand, the counter substrate 16 has a glass substrate 51 as a second substrate body having translucency. On the glass substrate 51, a color filter layer 52 as a coloring layer, a counter electrode 53, and an orientation (not shown). Films and the like are sequentially stacked.

  The color filter layer 52 includes colored portions corresponding to, for example, red (R), green (G), and blue (B), and is formed corresponding to each pixel 23.

  The counter electrode 53 is formed of a transparent conductive material such as ITO at a position corresponding to the pixel electrode 35 in the display region 22, for example, by sputtering.

  The liquid crystal layer 17 is a light modulation layer formed of a predetermined liquid crystal material.

  Next, the manufacturing method of the one embodiment will be described.

  First, an amorphous silicon (a-Si) film of about 50 nm is deposited on the glass substrate 25 by a CVD (Chemical Vapor Deposition) method or the like (amorphous silicon film forming step).

  Next, for example, after furnace annealing at 450 ° C. for 1 hour, XeCl excimer laser is irradiated to polycrystallize amorphous silicon (polysilicon (p-Si)) (polycrystallization step).

  Thereafter, the polysilicon is patterned by a photoetching method or the like to form a polysilicon film that becomes a channel layer 34c of the thin film transistor 34 in the pixel portion in the display region and a channel layer of each thin film transistor of the peripheral drive circuit (not shown). Silicon film forming step). At the same time, an etching stopper 49 corresponding to the pattern of the convex portion 37 is formed with a polysilicon film (etching stopper forming step).

  Next, a silicon oxide film (SiOx) to be the gate insulating film 40 is deposited on the entire surface of the glass substrate 25 by a CVD method, for example, to a thickness of about 100 nm (silicon oxide film forming step).

  Subsequently, a single layer of tantalum, chromium, aluminum, molybdenum, tungsten, copper or the like, or a laminated film or alloy film thereof (not shown) is deposited on the entire surface of the silicon oxide film to a thickness of about 400 nm, and formed into a predetermined shape by a photoetching method or the like. Patterning is performed to form the scanning line 31, the auxiliary capacitance line 32, the gate electrode 34g of each thin film transistor 34 extending the scanning line 31, the gate electrode of each thin film transistor of a peripheral drive circuit (not shown), and various wirings (first wiring) Forming step).

Further, using the gate electrode 34g as a mask, impurities are implanted into the polysilicon layer by ion implantation, ion doping, or the like, so that the drain region 34cd, the source region 34cs of the thin film transistor 34 and an N channel type peripheral drive circuit (not shown) are formed. A source region and a drain region of the thin film transistor are formed (first electrode formation step). At this time, the impurity is implanted, for example, with an acceleration voltage of 80 keV and a dose of 5 × 10 ¹⁵ atoms / cm ² , and phosphorus is implanted at a high concentration by PH ₃ / H ₂ .

Next, after the thin film transistor 34 and the N channel type thin film transistor of the peripheral drive circuit are covered with a resist coated so that impurities are not implanted, the gate electrode of the P channel type thin film transistor of the peripheral drive circuit (not shown) is used as a mask, for example. Boron is implanted at a high concentration with B ₂ H ₆ / H _{2 at an} acceleration voltage of 80 keV and a dose of 5 × 10 ¹⁵ atoms / cm ² , and a source region and a drain region of a P-channel thin film transistor of a peripheral drive circuit (not shown) Is formed (second electrode forming step).

  Thereafter, impurities are implanted to form an LDD region of the N-channel type thin film transistor of the peripheral driver circuit, and the glass substrate 25 is annealed to activate the impurities (LDD region forming step).

  Further, an interlayer insulating film 41 is deposited on the entire surface of the glass substrate 25 to a thickness of about 500 nm by using, for example, PECVD (Plasma Enhanced CVD) (interlayer insulating film forming step).

  Subsequently, contact holes 42 reaching the drain electrode 34d of the thin film transistor 34, contact holes 43 reaching the source electrode 34s, and contacts reaching the source electrode and the drain electrode of each thin film transistor of a peripheral drive circuit (not shown) by, for example, photoetching. Holes are formed in the interlayer insulating film 41 and the gate insulating film 40, respectively (first contact hole forming step). At the same time, a hole pattern 48 is formed in the interlayer insulating film 41 and the gate insulating film 40 in order to make a partial region on the back surface of the signal line 33 uneven (uneven pattern forming step). In this concavo-convex pattern forming step, overetching of the hole pattern 48 is prevented by the etching stopper 49.

  Next, a single layer of tantalum, chromium, aluminum, molybdenum, tungsten, copper, or a laminated film or alloy film thereof is applied to a thickness of about 500 nm, and is patterned into a predetermined shape by a photoetching method or the like. The drain electrode 34d and the signal line 33 are connected, the source electrode 34s, and various wirings of the thin film transistor in the peripheral drive circuit (not shown) are performed (second wiring process).

  Further, a protective insulating film 44 made of a silicon nitride film (SiNx) is formed on the entire surface of the glass substrate 25 by PECVD or the like, and a contact hole 46 is formed by, for example, photoetching (second contact hole forming step).

  Next, for example, a transparent organic insulating film 45 is applied to the entire surface by about 2 μm to form a contact hole 47 (third contact hole forming step).

  Thereafter, for example, an ITO film is formed to a thickness of about 100 nm by a sputtering method or the like, and then patterned into a predetermined shape by a photoetching method or the like to form a pixel electrode 35 (pixel electrode forming step). The array substrate 15 is obtained by connecting the source electrode 34s and forming an alignment film (alignment film forming step).

  Then, the array substrate 15 configured as described above and the counter substrate 16 in which the color filter layer 52, the counter electrode 53, the alignment film, and the like are formed on the glass substrate 51 by repeating sputtering and etching are interposed via spacers. The liquid crystal panel 12 is completed by placing the liquid crystal layer 17 between the substrates 15 and 16 and attaching a polarizing plate or the like (not shown) together with the liquid crystal layer 17 interposed between the substrates 15 and 16.

  In the liquid crystal display device 11 having such a liquid crystal panel 12, the light L emitted from the backlight 13 to the back side of the liquid crystal panel 12 is applied to the liquid crystal layer 17 portion of each pixel 23 corresponding to each image signal. The transmission amount at each pixel 23 is set by the applied voltage, and the image is visually recognized by transmitting to the display side at each pixel 23 with the set transmission amount.

  At this time, the light L1 from the backlight 13 incident on the area shielded by the signal line 33, that is, the back surface side of the signal line 33 is transmitted to the signal line 33 by the inclined surfaces 37a and 37b of the convex portion 37 of the signal line 33, and the like. Are reused so as to be diffusely reflected (diffused) in the width direction of the signal line 33, that is, in the left-right direction in FIG.

  In this way, by forming the convex portion 37 that irregularly reflects the light L1 incident on the back surface side on the back surface side of the signal line 33 where the pixel electrode 35 overlaps in plan view, the width dimension of the signal line 33 is set to a predetermined value. Even when the aperture ratio is reduced as a size, a reduction in surface luminance can be suppressed by reusing the light L1 irregularly reflected by the convex portion 37.

  That is, when the color filter layer 52 is provided on the counter substrate 16 side, the signal line 33 should be made narrower than a certain width in consideration of color mixing due to misalignment between the array substrate 15 and the counter substrate 16 and variation in aperture ratio. Even if the aperture ratio cannot be increased beyond a certain level, even if the signal line 33 cannot be narrowed by a certain width or more by diffusely reflecting and reusing the light L1 by the convex portion 37 as described above. The surface brightness does not decrease.

  Moreover, since the convex portion 37 is formed through the insulating films 40 and 41 on the back side of the signal line 33, the thickness of the liquid crystal panel 12 is increased as in the case of attaching a reflection member or the like to the liquid crystal panel, for example. There is no increase.

  Further, by forming the convex portion 37 along the signal line 33, the surface direction of the inclined surfaces 37a and 37b is formed in the width direction of the signal line 33, so that the backlight 13 is connected to the back surface of the signal line 33. The incident light L1 can be reliably irregularly reflected outside the signal line 33, here in the direction intersecting the signal line 33, and the light L1 is repeatedly diffusely reflected without exiting the signal line 33 region. Can be prevented.

  Furthermore, by forming a plurality of convex portions 37, the light L1 can be diffused more effectively.

  Then, a hole pattern 48 is formed simultaneously with the gate insulating film 40 and the interlayer insulating film 41 when the contact holes 42 and 43 are formed, so that a signal for forming the convex portion 37 is not required. The convex portions 37 can be easily formed only by forming the lines 33 on the interlayer insulating film 41, and the productivity is not lowered.

  In the above-described embodiment, the polysilicon film pattern is arranged as the etching stopper 49 corresponding to the hole pattern 48 for forming the concavo-convex structure on the back surface of the signal line 33. In the case of forming in this manner, it is possible to adopt a configuration in which these etching stoppers 49 are not disposed.

  Further, although the polysilicon layer is used as the channel layer 34c of the thin film transistor 34, the same effect can be obtained even when another semiconductor layer such as an amorphous silicon layer is used as the channel layer.

  Furthermore, the concavo-convex structure can be appropriately configured not only by forming the convex portion 37 but also by forming only a concave portion or forming a concave portion and a convex portion.

  The uneven structure may be formed not only on the signal line 33 but also on any of the wirings such as the scanning lines 31 and the auxiliary capacitance lines 32, or may be formed on all of these wirings.

It is a longitudinal cross-sectional view which shows the principal part of the 1st board | substrate of the display element of one embodiment of this invention. It is a top view which shows the principal part of a 1st board | substrate same as the above. It is explanatory drawing which shows the display apparatus provided with the display element same as the above.

Explanation of symbols

12 Liquid crystal panels as display elements
15 Array substrate as first substrate
16 Counter substrate as second substrate
17 Liquid crystal layer as light modulation layer
25 Glass substrate as the first substrate body
31 Scanning lines that are wiring
32 Auxiliary capacitance lines
33 Signal lines that are wiring
34 Thin-film transistors as switching elements
35 pixel electrode
37 Convex part as uneven structure
51 Glass substrate as the second substrate body
52 Color filter layer as a colored layer

Claims (3)

A first substrate body, a plurality of wirings which are formed on the first substrate body so as to cross each other and do not transmit light, and are arranged corresponding to the intersection positions of the wirings, and a part of the wirings in plan view A first substrate comprising: a pixel electrode that overlaps and is at least partially capable of transmitting light from the back surface side; and a switching element that is connected to the wiring and drives the pixel electrode;
A second substrate provided with a second substrate main body and a colored layer provided on the second substrate main body corresponding to each pixel electrode, and disposed opposite to the first substrate;
A light modulation layer interposed between the first substrate and the second substrate,
A display element comprising a concavo-convex structure for irregularly reflecting light incident on the back surface side on at least a part of the back surface side of the wiring. The display device according to claim 1, wherein the concavo-convex structure is continuously formed along a part of the wiring. The display element according to claim 1, wherein the concavo-convex structure is formed simultaneously with the formation of the wiring.

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