JP2012009713A - 半導体パッケージおよび半導体パッケージの製造方法 - Google Patents

半導体パッケージおよび半導体パッケージの製造方法 Download PDF

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Publication number
JP2012009713A
JP2012009713A JP2010145550A JP2010145550A JP2012009713A JP 2012009713 A JP2012009713 A JP 2012009713A JP 2010145550 A JP2010145550 A JP 2010145550A JP 2010145550 A JP2010145550 A JP 2010145550A JP 2012009713 A JP2012009713 A JP 2012009713A
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Prior art keywords
resin layer
substrate
semiconductor chip
package
underfill resin
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JP2010145550A
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Japanese (ja)
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JP2012009713A5 (enExample
Inventor
Takashi Ozawa
隆史 小澤
Kota Takeda
幸太 武田
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2010145550A priority Critical patent/JP2012009713A/ja
Priority to US13/168,126 priority patent/US20110316151A1/en
Publication of JP2012009713A publication Critical patent/JP2012009713A/ja
Publication of JP2012009713A5 publication Critical patent/JP2012009713A5/ja
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP2010145550A 2010-06-25 2010-06-25 半導体パッケージおよび半導体パッケージの製造方法 Pending JP2012009713A (ja)

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JP2010145550A JP2012009713A (ja) 2010-06-25 2010-06-25 半導体パッケージおよび半導体パッケージの製造方法
US13/168,126 US20110316151A1 (en) 2010-06-25 2011-06-24 Semiconductor package and method for manufacturing semiconductor package

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JP2010145550A JP2012009713A (ja) 2010-06-25 2010-06-25 半導体パッケージおよび半導体パッケージの製造方法

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JP2012009713A5 JP2012009713A5 (enExample) 2013-05-16

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013239660A (ja) * 2012-05-17 2013-11-28 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US9013031B2 (en) 2013-06-18 2015-04-21 Samsung Electronics Co., Ltd. Semiconductor packages including heat diffusion vias and interconnection vias
KR20160090329A (ko) 2013-11-26 2016-07-29 토레이 엔지니어링 컴퍼니, 리미티드 실장 장치 및 실장 방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102351257B1 (ko) * 2014-07-07 2022-01-17 삼성전자주식회사 잔류응력을 갖는 반도체 패키지 및 그 제조방법
US10319607B2 (en) * 2014-08-22 2019-06-11 Taiwan Semiconductor Manufacturing Company, Ltd. Package-on-package structure with organic interposer

Citations (6)

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JPH09213741A (ja) * 1996-01-31 1997-08-15 Hitachi Chem Co Ltd 半導体装置およびその製造方法
JP2000277564A (ja) * 1999-03-23 2000-10-06 Casio Comput Co Ltd 半導体装置及びその製造方法
JP2005311321A (ja) * 2004-03-22 2005-11-04 Sharp Corp 半導体装置およびその製造方法、並びに、該半導体装置を備えた液晶モジュールおよび半導体モジュール
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