JP2011527485A - 磁気シフトレジスタ・メモリ装置 - Google Patents
磁気シフトレジスタ・メモリ装置 Download PDFInfo
- Publication number
- JP2011527485A JP2011527485A JP2011517481A JP2011517481A JP2011527485A JP 2011527485 A JP2011527485 A JP 2011527485A JP 2011517481 A JP2011517481 A JP 2011517481A JP 2011517481 A JP2011517481 A JP 2011517481A JP 2011527485 A JP2011527485 A JP 2011527485A
- Authority
- JP
- Japan
- Prior art keywords
- magnetic
- column
- magnetic column
- writing
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
- G11C19/0808—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure using magnetic domain propagation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/902—Specified use of nanostructure
- Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
- Y10S977/933—Spintronics or quantum computing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Hall/Mr Elements (AREA)
- Mram Or Spin Memory Techniques (AREA)
Abstract
【解決手段】メモリセルの一実施形態は、複数の磁区から成る少なくとも1つの磁気カラムと、前記少なくとも1つの磁気カラムに結合され且つ前記複数の磁区からデータを読み取るための少なくとも1つの読み取り手段と、前記複数の磁区から読み取られたデータを格納するための一時メモリと、前記少なくとも1つの磁気カラムに結合され且つ前記一時メモリ内のデータを前記複数の磁区に書き込むための少なくとも1つの書き込み手段とを備える。
【選択図】 図1
Description
102・・・磁気カラム
104・・・一時メモリ(例えば、キャッシュ・メモリ)
106・・・読み取り手段
108・・・書き込み手段
110・・・半導体装置
716、816、1016、1216、1316、1516、1716・・・ビア
1418、1518、1618、1718、1818・・・ダミー磁区
1620、1720、1820・・・貯蔵部
Claims (20)
- メモリセルであって、
複数の磁区から成る少なくとも1つの磁気カラムと、
前記少なくとも1つの磁気カラムに結合され且つ前記複数の磁区からデータを読み取るための少なくとも1つの読み取り手段と、
前記複数の磁区から読み取られたデータを格納するための一時メモリと、
前記少なくとも1つの磁気カラムに結合され且つ前記一時メモリ内のデータを前記複数の磁区に書き込むための少なくとも1つの書き込み手段とを備える、メモリセル。 - 前記少なくとも1つの磁気カラムに沿った前記複数の磁区の移動を制御するための半導体装置をさらに備える、請求項1に記載のメモリセル。
- 前記一時メモリは、前記少なくとも1つの磁気カラムに等しいか又はそれより大きな記憶容量を有する、請求項1に記載のメモリセル。
- 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、前記少なくとも1つの磁気カラムの同じ端部に配置される、請求項1に記載のメモリセル。
- 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、前記少なくとも1つの磁気カラムの互いに対向する端部に配置される、請求項1に記載のメモリセル。
- 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、前記少なくとも1つの磁気カラムの中心近傍に配置される、請求項1に記載のメモリセル。
- 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、
前記少なくとも1つの磁気カラムの第1端部に配置される第1読み取り手段/書き込み手段ペアと、
前記少なくとも1つの磁気カラムの対向する第2端部に配置される第2読み取り手段/書き込み手段ペアとを含む、請求項1に記載のメモリセル。 - 前記少なくとも1つの磁気カラムは、
前記メモリセルのワード線に沿ってチェーン構成として配列される複数の磁気カラムを含む、請求項1に記載のメモリセル。 - 前記複数の磁気カラムを電気的に接続する複数のビアをさらに備える、請求項8に記載のメモリセル。
- メモリセルであって、
複数の磁区から成る少なくとも1つの磁気カラムと、
前記少なくとも1つの磁気カラムに結合され且つ前記複数の磁区の第1端部に配置される第1磁区からデータを読み取るための少なくとも1つの読み取り手段と、
前記少なくとも1つの磁気カラムに結合され且つ前記少なくとも1つの読み取り手段によって読み取られたデータを前記複数の磁区の第2端部に配置される第2磁区に書き込むための少なくとも1つの書き込み手段とを備える、メモリセル。 - 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、前記少なくとも1つの磁気カラムの互いに対向する端部に配置される、請求項10に記載のメモリセル。
- 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段は、
前記少なくとも1つの磁気カラムの第1端部に配置される第1読み取り手段/書き込み手段ペアと、
前記少なくとも1つの磁気カラムの対向する第2端部に配置される第2読み取り手段/書き込み手段ペアとを含む、請求項10に記載のメモリセル。 - 前記少なくとも1つの磁気カラムは、
前記メモリセルのワード線に沿ってチェーン構成として配列される複数の磁気カラムを含む、請求項10に記載のメモリセル。 - メモリセルであって、
複数の磁区から成る少なくとも1つの磁気カラムと、
前記複数の磁区内の少なくとも1つのダミー磁区と、
前記少なくとも1つの磁気カラムに結合され且つ前記複数の磁区の第1端部に配置される第1磁区からデータを読み取るための少なくとも1つの読み取り手段と、
前記少なくとも1つの磁気カラムに結合され且つ前記少なくとも1つの読み取り手段によって読み取られたデータを前記複数の磁区の第2端部に配置される第2磁区に書き込むための少なくとも1つの書き込み手段とを備え、
前記少なくとも1つのダミー磁区が、前記複数の磁区のうちダミー磁区でない磁区の書き込みを防止する、メモリセル。 - 前記少なくとも1つの読み取り手段及び前記少なくとも1つの書き込み手段に隣接して配置される書き込みワイヤをさらに備える、請求項14に記載のメモリセル。
- 前記複数の磁区の一端部に配置される書き込みワイヤをさらに備える、請求項14に記載のメモリセル。
- 前記少なくとも1つの磁気カラムの中心近傍に配置される書き込みワイヤをさらに備える、請求項14に記載のメモリセル。
- 前記少なくとも1つの磁気カラム内の少なくとも1つの貯蔵部をさらに備える、請求項14に記載のメモリセル。
- 前記少なくとも1つの磁気カラムは、
前記メモリセルのワード線に沿ってチェーン構成として配列される複数の磁気カラムを含む、請求項14に記載のメモリセル。 - 前記メモリセルが複数のメモリセルの配列を構成し、当該複数のメモリセルの配列が前記少なくとも1つの書き込み手段を共有する、請求項14に記載のメモリセル。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/168,379 US8228706B2 (en) | 2008-07-07 | 2008-07-07 | Magnetic shift register memory device |
US12/168,379 | 2008-07-07 | ||
PCT/US2009/049381 WO2010005845A1 (en) | 2008-07-07 | 2009-07-01 | Magnetic shift register memory device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011527485A true JP2011527485A (ja) | 2011-10-27 |
JP5843611B2 JP5843611B2 (ja) | 2016-01-13 |
Family
ID=41464270
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011517481A Active JP5843611B2 (ja) | 2008-07-07 | 2009-07-01 | 磁気シフトレジスタ・メモリ装置 |
Country Status (5)
Country | Link |
---|---|
US (4) | US8228706B2 (ja) |
JP (1) | JP5843611B2 (ja) |
KR (1) | KR20110042279A (ja) |
CN (1) | CN102089829B (ja) |
WO (1) | WO2010005845A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9129679B2 (en) | 2012-09-05 | 2015-09-08 | Kabushiki Kaisha Toshiba | Shift register type magnetic memory |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8228706B2 (en) | 2008-07-07 | 2012-07-24 | International Business Machines Corporation | Magnetic shift register memory device |
US8649214B2 (en) | 2011-12-20 | 2014-02-11 | Samsung Electronics Co., Ltd. | Magnetic memory including magnetic memory cells integrated with a magnetic shift register and methods thereof |
JP5658704B2 (ja) * | 2012-03-13 | 2015-01-28 | 株式会社東芝 | シフトレジスタ型メモリおよびその駆動方法 |
US8750012B1 (en) | 2013-01-04 | 2014-06-10 | International Business Machines Corporation | Racetrack memory with low-power write |
US9123421B2 (en) | 2013-01-21 | 2015-09-01 | International Business Machines Corporation | Racetrack memory cells with a vertical nanowire storage element |
JP6420661B2 (ja) * | 2014-12-26 | 2018-11-07 | 東プレ株式会社 | 静電容量式キーボード |
JP6397773B2 (ja) * | 2015-01-30 | 2018-09-26 | 東芝メモリ株式会社 | 磁気記憶装置及び磁気記憶方法 |
WO2018182669A1 (en) * | 2017-03-31 | 2018-10-04 | Intel Corporation | Spin orbit coupling shift register memory device |
JP2021072318A (ja) * | 2019-10-29 | 2021-05-06 | 三星電子株式会社Samsung Electronics Co.,Ltd. | 磁気メモリ素子及び磁気メモリ装置 |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040252538A1 (en) * | 2003-06-10 | 2004-12-16 | International Business Machines Corporation | System and method for writing to a magnetic shift register |
US20040252539A1 (en) * | 2003-06-10 | 2004-12-16 | International Business Machines Corporation | Shiftable magnetic shift register and method of using the same |
US20050078509A1 (en) * | 2003-10-14 | 2005-04-14 | International Business Machines Corporation | System and method for reading data stored on a magnetic shift register |
US20060120132A1 (en) * | 2004-12-04 | 2006-06-08 | International Business Machines Corporation | System and method for transferring data to and from a magnetic shift register with a shiftable data column |
JP2007073103A (ja) * | 2005-09-05 | 2007-03-22 | Sharp Corp | メモリ素子およびメモリ素子のマップアドレス管理方法 |
JP2007096119A (ja) * | 2005-09-29 | 2007-04-12 | Sharp Corp | 磁気メモリ、磁気メモリの駆動回路、磁気メモリの配線方法、および磁気メモリの駆動方法 |
JP2007273064A (ja) * | 2006-03-31 | 2007-10-18 | Sharp Corp | 磁気メモリ、及びその駆動方法 |
JP2008090957A (ja) * | 2006-10-03 | 2008-04-17 | Toshiba Corp | 磁気記憶装置及びその書き込み/読み出し方法 |
JP2008091002A (ja) * | 2006-09-29 | 2008-04-17 | Samsung Electronics Co Ltd | 磁壁の移動を利用したデータ保存装置及びその動作方法 |
US20080100963A1 (en) * | 2006-10-27 | 2008-05-01 | Samsung Electronics Co., Ltd. | Data storage device using magnetic domain wall movement and method of operating the same |
US7965468B2 (en) * | 2008-06-09 | 2011-06-21 | Samsung Electronics Co., Ltd. | Magnetic racetrack memory device including write-back loop |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2002219095A1 (en) * | 2000-11-30 | 2002-06-11 | Ina-Schaeffler Kg | Seal for a clutch release bearing |
JP4212325B2 (ja) | 2002-09-30 | 2009-01-21 | 株式会社ルネサステクノロジ | 不揮発性記憶装置 |
US7108797B2 (en) * | 2003-06-10 | 2006-09-19 | International Business Machines Corporation | Method of fabricating a shiftable magnetic shift register |
US6970379B2 (en) * | 2003-10-14 | 2005-11-29 | International Business Machines Corporation | System and method for storing data in an unpatterned, continuous magnetic layer |
US6955926B2 (en) * | 2004-02-25 | 2005-10-18 | International Business Machines Corporation | Method of fabricating data tracks for use in a magnetic shift register memory device |
US7561923B2 (en) * | 2005-05-09 | 2009-07-14 | Cardiac Pacemakers, Inc. | Method and apparatus for controlling autonomic balance using neural stimulation |
US7416905B2 (en) * | 2005-10-17 | 2008-08-26 | International Busniess Machines Corporation | Method of fabricating a magnetic shift register |
KR100923302B1 (ko) | 2006-02-27 | 2009-10-27 | 삼성전자주식회사 | 자기 메모리 소자 |
US20080050092A1 (en) * | 2006-08-25 | 2008-02-28 | Forrest Lee Erickson | Video overlay text/ graphic inserter for exception video trigger |
KR100785026B1 (ko) * | 2006-10-27 | 2007-12-12 | 삼성전자주식회사 | 자구벽 이동을 이용한 데이터 저장 장치 및 그의 동작 방법 |
US7492622B2 (en) * | 2007-01-12 | 2009-02-17 | International Business Machines Corporation | Sequence of current pulses for depinning magnetic domain walls |
US8228706B2 (en) | 2008-07-07 | 2012-07-24 | International Business Machines Corporation | Magnetic shift register memory device |
-
2008
- 2008-07-07 US US12/168,379 patent/US8228706B2/en not_active Expired - Fee Related
-
2009
- 2009-07-01 KR KR1020117000151A patent/KR20110042279A/ko not_active Application Discontinuation
- 2009-07-01 JP JP2011517481A patent/JP5843611B2/ja active Active
- 2009-07-01 CN CN200980126285.0A patent/CN102089829B/zh active Active
- 2009-07-01 WO PCT/US2009/049381 patent/WO2010005845A1/en active Application Filing
-
2012
- 2012-03-27 US US13/431,185 patent/US8537588B2/en not_active Expired - Fee Related
-
2013
- 2013-08-02 US US13/957,937 patent/US8638587B2/en not_active Expired - Fee Related
- 2013-10-22 US US14/059,985 patent/US9230624B2/en not_active Expired - Fee Related
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040252538A1 (en) * | 2003-06-10 | 2004-12-16 | International Business Machines Corporation | System and method for writing to a magnetic shift register |
US20040252539A1 (en) * | 2003-06-10 | 2004-12-16 | International Business Machines Corporation | Shiftable magnetic shift register and method of using the same |
US20050078509A1 (en) * | 2003-10-14 | 2005-04-14 | International Business Machines Corporation | System and method for reading data stored on a magnetic shift register |
US20060120132A1 (en) * | 2004-12-04 | 2006-06-08 | International Business Machines Corporation | System and method for transferring data to and from a magnetic shift register with a shiftable data column |
JP2007073103A (ja) * | 2005-09-05 | 2007-03-22 | Sharp Corp | メモリ素子およびメモリ素子のマップアドレス管理方法 |
JP2007096119A (ja) * | 2005-09-29 | 2007-04-12 | Sharp Corp | 磁気メモリ、磁気メモリの駆動回路、磁気メモリの配線方法、および磁気メモリの駆動方法 |
JP2007273064A (ja) * | 2006-03-31 | 2007-10-18 | Sharp Corp | 磁気メモリ、及びその駆動方法 |
JP2008091002A (ja) * | 2006-09-29 | 2008-04-17 | Samsung Electronics Co Ltd | 磁壁の移動を利用したデータ保存装置及びその動作方法 |
JP2008090957A (ja) * | 2006-10-03 | 2008-04-17 | Toshiba Corp | 磁気記憶装置及びその書き込み/読み出し方法 |
US20080100963A1 (en) * | 2006-10-27 | 2008-05-01 | Samsung Electronics Co., Ltd. | Data storage device using magnetic domain wall movement and method of operating the same |
US7965468B2 (en) * | 2008-06-09 | 2011-06-21 | Samsung Electronics Co., Ltd. | Magnetic racetrack memory device including write-back loop |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9129679B2 (en) | 2012-09-05 | 2015-09-08 | Kabushiki Kaisha Toshiba | Shift register type magnetic memory |
Also Published As
Publication number | Publication date |
---|---|
US20140247639A1 (en) | 2014-09-04 |
KR20110042279A (ko) | 2011-04-26 |
US8638587B2 (en) | 2014-01-28 |
US8537588B2 (en) | 2013-09-17 |
US20130314981A1 (en) | 2013-11-28 |
CN102089829B (zh) | 2015-03-25 |
US8228706B2 (en) | 2012-07-24 |
US9230624B2 (en) | 2016-01-05 |
WO2010005845A1 (en) | 2010-01-14 |
CN102089829A (zh) | 2011-06-08 |
US20100002486A1 (en) | 2010-01-07 |
JP5843611B2 (ja) | 2016-01-13 |
US20120182781A1 (en) | 2012-07-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5843611B2 (ja) | 磁気シフトレジスタ・メモリ装置 | |
CN103548086B (zh) | 半导体存储装置 | |
US9595336B2 (en) | Vertical gate stacked NAND and row decoder for erase operation | |
KR101997868B1 (ko) | 뉴로모픽 시스템, 및 기억 장치 | |
JP5388814B2 (ja) | 半導体記憶装置 | |
US8373440B2 (en) | Three dimensional multilayer circuit | |
TWI476900B (zh) | 三維記憶陣列之z方向解碼 | |
CN102171764B (zh) | 半导体器件 | |
KR100749673B1 (ko) | 불휘발성 반도체 기억 장치 | |
US8902644B2 (en) | Semiconductor storage device and its manufacturing method | |
US20120187466A1 (en) | Non-volatile semiconductor storage device | |
US20160328332A1 (en) | Data Mapping For Non-Volatile Storage | |
US9324424B2 (en) | Memory device and access method | |
US20180102177A1 (en) | 3d memory with staged-level multibit programming | |
US20140211537A1 (en) | Resistance-based random access memory | |
KR20190101798A (ko) | 수평 커플링 구조 및 단일층 게이트를 갖는 불휘발성 메모리 소자 | |
US12052875B2 (en) | Magnetic memory | |
CN107017245A (zh) | 包括开关元件和半导体存储器的电子设备 | |
CN1502136A (zh) | 积体磁阻半导体记忆排列 | |
KR20120046247A (ko) | 저항 감지 엘리먼트 블록 소거 및 단방향 기록을 갖는 비휘발성 메모리 어레이 | |
CN110931060B (zh) | 半导体存储装置 | |
CN102446556B (zh) | 一种存储器及使用该存储器的方法 | |
CN100444285C (zh) | 多重位闪存的参考电流产生电路 | |
US20210134375A1 (en) | Memory plane structure for ultra-low read latency applications in non-volatile memories | |
US20140119123A1 (en) | Fault tolerant control line configuration |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120315 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130830 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20131015 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140114 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140701 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140926 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150310 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150608 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150707 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151005 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20151027 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20151117 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5843611 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |