JP2011523203A5 - - Google Patents

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Publication number
JP2011523203A5
JP2011523203A5 JP2011508449A JP2011508449A JP2011523203A5 JP 2011523203 A5 JP2011523203 A5 JP 2011523203A5 JP 2011508449 A JP2011508449 A JP 2011508449A JP 2011508449 A JP2011508449 A JP 2011508449A JP 2011523203 A5 JP2011523203 A5 JP 2011523203A5
Authority
JP
Japan
Prior art keywords
wafer
interconnect
conductive layer
functional device
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011508449A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011523203A (ja
Filing date
Publication date
Priority claimed from SG200803479-5A external-priority patent/SG156550A1/en
Application filed filed Critical
Publication of JP2011523203A publication Critical patent/JP2011523203A/ja
Publication of JP2011523203A5 publication Critical patent/JP2011523203A5/ja
Pending legal-status Critical Current

Links

JP2011508449A 2008-05-06 2009-05-06 相互接続を伴うウェハレベルインテグレーションモジュール Pending JP2011523203A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SG200803479-5 2008-05-06
SG200803479-5A SG156550A1 (en) 2008-05-06 2008-05-06 Wafer level integration module with interconnects
PCT/SG2009/000164 WO2009136873A2 (en) 2008-05-06 2009-05-06 Wafer level integration module with interconnects

Publications (2)

Publication Number Publication Date
JP2011523203A JP2011523203A (ja) 2011-08-04
JP2011523203A5 true JP2011523203A5 (https=) 2012-06-28

Family

ID=41265195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011508449A Pending JP2011523203A (ja) 2008-05-06 2009-05-06 相互接続を伴うウェハレベルインテグレーションモジュール

Country Status (6)

Country Link
US (2) US7998854B2 (https=)
JP (1) JP2011523203A (https=)
CN (1) CN102084479A (https=)
SG (1) SG156550A1 (https=)
TW (1) TW201001623A (https=)
WO (1) WO2009136873A2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102339816A (zh) * 2011-09-30 2012-02-01 上海宏力半导体制造有限公司 晶圆测试键结构及晶圆测试方法
US20140209926A1 (en) * 2013-01-28 2014-07-31 Win Semiconductors Corp. Semiconductor integrated circuit
US10163773B1 (en) 2017-08-11 2018-12-25 General Electric Company Electronics package having a self-aligning interconnect assembly and method of making same
US10811390B2 (en) * 2019-01-21 2020-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Die stack structure and method of fabricating the same and package
CN113767716B (zh) 2019-05-06 2024-07-30 3M创新有限公司 图案化导电制品
US12573766B2 (en) 2020-06-16 2026-03-10 3M Innovative Properties Company Patterned article including metallic bodies
CN112800715B (zh) * 2021-01-14 2021-09-24 国家数字交换系统工程技术研究中心 软件定义晶上系统及数据交互方法和系统体系架构
CN114975333A (zh) * 2022-07-29 2022-08-30 广东大普通信技术股份有限公司 芯片结构

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Publication number Priority date Publication date Assignee Title
JPS62219954A (ja) * 1986-03-20 1987-09-28 Fujitsu Ltd 三次元ｉｃの製造方法
KR900008647B1 (ko) * 1986-03-20 1990-11-26 후지쓰 가부시끼가이샤 3차원 집적회로와 그의 제조방법
JPS62272556A (ja) * 1986-05-20 1987-11-26 Fujitsu Ltd 三次元半導体集積回路装置及びその製造方法
JPH01189141A (ja) * 1988-01-25 1989-07-28 Nec Corp 半導体装置
US6882030B2 (en) * 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
JP4234244B2 (ja) * 1998-12-28 2009-03-04 富士通マイクロエレクトロニクス株式会社 ウエハーレベルパッケージ及びウエハーレベルパッケージを用いた半導体装置の製造方法
US6693358B2 (en) * 2000-10-23 2004-02-17 Matsushita Electric Industrial Co., Ltd. Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device
JP3967108B2 (ja) * 2001-10-26 2007-08-29 富士通株式会社 半導体装置およびその製造方法
US6706629B1 (en) * 2003-01-07 2004-03-16 Taiwan Semiconductor Manufacturing Company Barrier-free copper interconnect
TWI242274B (en) * 2003-02-27 2005-10-21 Siliconware Precision Industries Co Ltd Ball grid array semiconductor package and method for fabricating the same
TWI228295B (en) * 2003-11-10 2005-02-21 Shih-Hsien Tseng IC structure and a manufacturing method
JPWO2005086216A1 (ja) * 2004-03-09 2008-01-24 独立行政法人科学技術振興機構 半導体素子及び半導体素子の製造方法
JP5354765B2 (ja) * 2004-08-20 2013-11-27 カミヤチョウ アイピー ホールディングス 三次元積層構造を持つ半導体装置の製造方法
KR100688857B1 (ko) * 2004-12-17 2007-03-02 삼성전기주식회사 윈도우를 구비한 볼 그리드 어레이 기판 및 그 제조방법
US7629225B2 (en) * 2005-06-13 2009-12-08 Infineon Technologies Ag Methods of manufacturing semiconductor devices and structures thereof
US20090081862A1 (en) * 2007-09-24 2009-03-26 Taiwan Semiconductor Manufacturing Co., Ltd. Air gap structure design for advanced integrated circuit technology
US7799602B2 (en) * 2008-12-10 2010-09-21 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure
JP2010287831A (ja) * 2009-06-15 2010-12-24 Renesas Electronics Corp 半導体装置およびその製造方法

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