JP2011199077A - Method of manufacturing multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer wiring board which can increase the number of laminates easily by using a laminate after it is laminated on a supporting substrate and separated therefrom as a pseudo-core substrate.SOLUTION: The method of manufacturing a multilayer wiring board includes a step of forming an intermediate laminate by laminating resin insulating layers 20-23 and conductor layers 30-32 alternately on a planar supporting substrate 11, a step of separating the intermediate laminate and the supporting substrate 11 after the surface side thereof is subjected entirely to metal plating, and a step of forming a wiring lamination part by laminating the resin insulating layers and conductor layers alternately for the separated laminate 10b. Consequently, a multilayer wiring board where the number of laminates can be increased easily as compared with a conventional coreless wiring board can be obtained.

Description

  The present invention relates to a method for manufacturing a multilayer wiring board in which resin insulation layers and conductor layers are alternately laminated.

  In general, as a package for mounting an electronic component, a wiring board in which a build-up layer is formed by alternately laminating resin insulating layers and conductor layers on both sides of a core board is used. In the wiring substrate, the core substrate is made of a resin containing glass fiber, for example, and has a role of reinforcing the buildup layer with high rigidity. However, since the core substrate is made thick, it hinders miniaturization of the wiring substrate, and it is necessary to provide a through-hole conductor that electrically connects the build-up layers, so that the wiring length becomes long and high-frequency signal transmission performance There is a risk of causing deterioration. Therefore, in recent years, a coreless wiring board having a structure suitable for miniaturization and capable of improving high-frequency signal transmission performance without providing the above-described core board has been proposed (for example, see Patent Documents 1 and 2). . Such a coreless wiring board is formed by, for example, forming a build-up layer on a support provided with two metal foils adhered in a peelable manner on the surface, and then peeling the two metal foils at the peeling interface. Can be manufactured using a method of separating the buildup layer from the support and obtaining a wiring board.

JP 2004-235323 A JP 2005-93979 A

  In general, in order to cope with the multi-functionality and high density of the package, a wiring board having an increased number of layers as much as possible is required. There were restrictions. That is, since the core substrate is formed using a heavy material in order to ensure strength, when the number of stacked layers is increased, there is a problem that conveyance and handling become difficult in each process of forming the buildup layer. In addition, since the buildup layers laminated on both surfaces of the core substrate become separate wiring substrates after the separation step, the number of laminations of each wiring substrate must be reduced.

  The present invention has been made to solve these problems, and uses a laminate after forming and separating a wiring laminated portion on a supporting base material as a pseudo core substrate, and further laminating to form a multilayer wiring. An object of the present invention is to realize a method for manufacturing a multilayer wiring board capable of further multilayering by obtaining a substrate as compared with a conventional coreless wiring board.

  In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a multilayer wiring board in which a resin insulating layer and a conductor layer are alternately laminated, and the resin insulating layer and the conductor layer are formed on a plate-like support base material. A first laminating step of alternately laminating to form an intermediate laminate, a metal layer forming step of forming a metal-based layer on the entire surface of the intermediate laminate, the intermediate laminate and the support A separation step of separating the base material, and a first wiring laminated portion in which the resin insulating layer and the conductor layer are alternately laminated on one main surface side with respect to the intermediate laminated body separated from the support base material. And forming a second wiring laminated portion in which the resin insulating layers and the conductor layers are alternately laminated on the other main surface side.

  According to the method for producing a multilayer wiring board of the present invention, an intermediate laminate is formed by alternately laminating a resin insulating layer and a conductor layer on a supporting base material, and metal plating is performed on the entire surface side thereof. A multilayer wiring board can be obtained by forming wiring laminated portions on both sides of the intermediate laminated body separated from the supporting substrate. Therefore, in the first lamination step before the separation step, the laminate is reinforced while being reinforced with a high-rigidity support base in the same manner as in the past, and in the second lamination step after the separation step, the laminated body after separation. Can be further laminated as a pseudo support substrate, and a multilayer wiring board that can be easily multi-layered can be realized by increasing the number of layers as much as possible without being restricted by the weight of the support substrate.

  In addition to the case where the intermediate laminate obtained in the first lamination step is formed on one side of the support substrate, the intermediate laminate may be formed on both sides of the support substrate. In this case, if the support base material is formed on both sides, the two base material bodies can be obtained after the support base material and the intermediate laminate body are separated in the separation step.

  In addition to the resin insulation layer and the conductor layer, the first and second lamination steps further include a via formation step of forming a via conductor that penetrates the resin insulation layer and electrically connects the conductor layers. be able to. Therefore, the multilayer wiring board of the present invention can be electrically connected in the stacking direction by the via conductor without forming a through hole, and is suitable for downsizing.

  In addition to the above steps, a sheet disposing step of disposing the lower layer sheet and the upper layer sheet in a peelable state on at least one main surface side of the support base material may be further provided. In this case, in the separation step, the intermediate laminate and the support substrate are separated by separating the lower layer sheet and the upper layer sheet at a separation interface.

  The lower layer sheet and the upper layer sheet arranged in the sheet arrangement process can be formed with various materials and thicknesses. For example, the lower layer sheet and the upper layer sheet made of copper can be used. For example, the lower layer sheet can be formed thinner than the upper layer sheet, and the lower layer sheet can be brought into close contact with the surface of the support substrate. In this case, in the metal layer forming step, it is desirable to form a metal plating layer on the entire surface of the intermediate laminate by electrolytic plating. Furthermore, at least a part of the metal plating layer is removed by a subtractive method for each of the upper layer sheet and the metal plating layer formed on both sides of the intermediate laminate after the separation step, and the conductor layer May be formed.

  On the other hand, the upper layer sheet can be formed thinner than the lower layer sheet, and the lower layer sheet can be adhered to the surface of the support substrate. In this case, in the metal layer forming step, it is desirable to form a metal plating layer on the entire surface of the intermediate laminate by electroless plating. In this case, all the conductor layers may be formed by a semi-additive method.

  When the multilayer wiring board of the present invention is manufactured, all the resin insulating layers may be formed mainly of the same resin insulating material.

  As described above, according to the present invention, in the first stacking process, an intermediate stacked body is formed in the same manner as a conventional so-called coreless multilayer wiring board, and in the second stacking process after the separation process, the post-separation process is performed. A multilayer wiring board can be obtained by performing further lamination using the laminate as a pseudo support substrate. Therefore, while enjoying the merits of the coreless multilayer wiring board, the difficulty of conveyance and handling due to the weight of the supporting base material can be solved, and multilayering can be easily performed without being restricted by the number of stacked layers. Further, in the second laminating step, the intermediate laminate having the metal plating layers formed on both sides is sequentially laminated, so that both sides can have the same structure and the manufacturing process can be simplified. Furthermore, since it is possible to make an electrical connection by the via conductors of the intermediate laminate and the first and second wiring laminates without forming a through hole in the support base, a small and high-density multilayer A wiring board can be realized.

It is a 1st sectional view explaining the manufacturing method of the multilayer wiring board of a 1st embodiment. It is a 2nd sectional view explaining the manufacturing method of the multilayer wiring board of a 1st embodiment. It is a 3rd sectional view explaining the manufacturing method of the multilayer wiring board of a 1st embodiment. It is a 4th cross-section figure explaining the manufacturing method of the multilayer wiring board of 1st Embodiment. FIG. 10 is a fifth sectional view illustrating the method for manufacturing the multilayer wiring board according to the first embodiment. It is a 6th cross-section figure explaining the manufacturing method of the multilayer wiring board of 1st Embodiment. It is a 7th cross-section figure explaining the manufacturing method of the multilayer wiring board of 1st Embodiment. FIG. 10 is an eighth sectional view explaining the method for manufacturing the multilayer wiring board according to the first embodiment. FIG. 10 is a ninth cross-sectional structure diagram illustrating the method of manufacturing the multilayer wiring board according to the first embodiment. It is a 10th cross-section figure explaining the manufacturing method of the multilayer wiring board of 1st Embodiment. It is a 1st sectional view explaining the manufacturing method of the multilayer wiring board of a 2nd embodiment. It is a 2nd sectional view explaining the manufacturing method of the multilayer wiring board of a 2nd embodiment. It is a 3rd cross-section figure explaining the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is a 4th cross-section figure explaining the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is a 5th section structure figure explaining the manufacturing method of the multilayer wiring board of a 2nd embodiment. It is a 6th cross-section figure explaining the manufacturing method of the multilayer wiring board of 2nd Embodiment.

  Hereinafter, as a preferred embodiment of the present invention, two embodiments will be sequentially described with reference to the drawings. However, the embodiments described below are examples of forms to which the technical idea of the present invention is applied, and the present invention is not limited by the contents of the following embodiments.

[First Embodiment]
The manufacturing method of the multilayer wiring board of 1st Embodiment of this invention is demonstrated with reference to FIGS. First, as shown in FIG. 1, a plate-like support base material 11 having a copper foil 12 attached on both sides is prepared. The support base 11 is made of, for example, a resin containing glass fiber and has high rigidity. In a state where the release sheet 14 is disposed on the surface of each copper foil 12 of the support base 11 with a prepreg 13 made of, for example, a thermosetting resin, for example, pressure bonding is performed by, for example, vacuum hot pressing (sheet arrangement of the present invention) Process). The support base 11 is formed in a rectangular shape having a length of 300 mm and a width of 300 mm, for example. On the other hand, the release sheet 14 has a structure in which two copper foils 14a and 14b having different thicknesses are adhered in a peelable manner. The thickness of the copper foil 14a (the upper layer sheet of the present invention) located on the outer side with respect to the support base 11 is larger than the thickness of the copper foil 14b (the lower layer sheet of the present invention) located on the inner side. As an example, the thickness of the copper foil 14a can be 18 μm, and the thickness of the copper foil 14b can be 3 μm.

  With respect to the support base material 11 integrated with the release sheet 14 by the pressure bonding, the outer edge portion is cut and shaped into a predetermined size. Then, the part of the outer peripheral area | region of the peeling sheet 14 is removed by etching using the photosensitive dry film (not shown) on each surface of the peeling sheet 14 of the both sides of the support base material 11. FIG. That is, the release sheet 14 in the outer peripheral region on both sides of the support base material 11 is removed and the prepreg 13 is exposed on the surface, and the support base material 11 and the release sheet 14 having a cross-sectional structure as shown in FIG. 1 are obtained. It is done. It is desirable to roughen the surface of the release sheet 14 after etching.

  Next, as shown in FIG. 2, a film-like resin material is laminated from the top of the release sheet 14, and the resin material is cured by pressurizing and heating under vacuum to form the resin insulating layer 20. As a result, the surface of the release sheet 14 is covered with the resin insulating layer 20 and the removed portion of the release sheet 14 in the outer peripheral region is filled with the resin insulating layer 20. Thereby, the peeling interface between the copper foil 14a and the copper foil 14b is not exposed, and is difficult to peel off during the process before the separation process described later. Thereafter, laser processing is performed at predetermined positions of the resin insulating layers 20 on both sides to form via holes 40a. At this time, the opening diameter of the via hole 40a increases from the support base material 11 side toward the outside (hereinafter referred to as the opening direction), and the upper and lower via holes 40a sandwiching the support base material 11 are in the opening direction. Is in the opposite orientation.

  Next, as shown in FIG. 3, after applying a desmear process for removing smear in the via hole 40a, a thin copper film is formed by electroless copper plating, and a dry film is pasted on the surface of the copper film. develop. Next, copper is deposited on the portion where the dry film is removed by performing electrolytic copper plating, and the via conductor 40 and the patterned conductor layer 30 are simultaneously formed (via formation step of the present invention). At this time, the upper end of the via conductor 40 and the lower end of the predetermined pattern of the conductor layer 30 are electrically connected. Furthermore, a film-like resin material is laminated so as to cover the conductor layers 30 on both sides, and the resin material is cured by pressurizing and heating under vacuum to form the resin insulating layer 21.

  Next, as shown in FIG. 4, via conductor 41, conductor layer 31, and resin insulation layer 22 are formed as an upper layer by the same method as the above-described via conductor 40, conductor layer 30, and resin insulation layer 21. The via conductor 42, the conductor layer 32, and the resin insulating layer 23 are formed in the upper layer. Then, laser processing is performed on predetermined positions of the resin insulating layers 23 on both sides to form via holes 43a. In this way, upper and lower buildup layers in which the resin insulating layers 20, 21, 22, 23 and the conductor layers 30, 31, 32 are alternately stacked are formed (first stacking step of the present invention), and the middle The basic structure of the laminated body 10a is obtained.

  Next, as shown in FIG. 5, a copper plating layer 33 is formed by performing electrolytic copper plating on the entire surface of the resin insulating layer 23 on both sides of the intermediate laminate 10a. At this time, the inside of the via hole 43 a is filled with copper plating, and the via conductor 43 that is a filled via is formed integrally with the copper plating layer 33. At this time, the via conductors 40 to 43 on one main surface side and the via conductors 40 to 43 on the other main surface side are opposite in opening direction.

  Next, as shown in FIG. 6, the above-described intermediate laminated body 10 a is a cutting line set on the inner peripheral side with respect to the outer shape and slightly on the inner peripheral side with respect to the outer peripheral side surface of the release sheet 14 (FIG. Cut along (indicated by the broken line). As a result, the outer peripheral region of the intermediate laminate 10a is removed, and the end surface including the release interface of the release sheet 14 is exposed on the side surface. In this state, the copper foil 14a and the copper foil 14b that are in close contact with each of the upper and lower release sheets 14 are peeled along the peeling interface. As a result, as shown in FIG. 7, the intermediate laminate 10a and the support base 11 are separated (the separation step of the present invention), and two laminates 10b having the same structure can be obtained. Each laminated body 10b obtained in this way functions as a support substrate (pseudo core) in each subsequent process.

  Next, as shown in FIG. 8, a resist pattern is formed by laminating a photosensitive dry film on both surfaces of the laminate 10 b obtained in the separation step, and then exposing and developing. Then, the copper foil 14 a on the back surface and the surface After etching the copper plating layer 33, the resist pattern is removed. As a result, a conductor layer 60 in which the copper foil 14a is patterned and a conductor layer 61 in which the copper plating layer 33 is patterned are formed. The etched portions of the copper foil 14a and the copper plating layer 33 are in a state where the resin insulating layers 20 and 23 are exposed.

  Next, as shown in FIG. 9, a film-like resin material is laminated so as to cover the conductor layers 60 and 61 on both sides of the laminated body 10b, and the resin material is cured by pressurizing and heating under vacuum to obtain a resin. Insulating layers 50 and 51 are formed. Thereafter, laser processing is performed at predetermined positions of the resin insulating layers 50 and 51 on both sides to form via holes 70a and 71a. Note that the opening directions of the via holes 70a and 71a both face outward and are opposite to each other. That is, only the opening direction of the via hole 70a is opposite to the opening direction of the other via conductors 40 to 43 and the via hole 71a.

  Next, as shown in FIG. 10, after applying a desmear process for removing smear in the via holes 70a and 71a, a thin copper film is formed by electroless copper plating, and a dry film is pasted on the surface of the copper film. Exposure and development. Subsequently, copper is deposited on the portion where the dry film is removed by performing electrolytic copper plating, and the via conductors 70 and 71, the pad 62 on the surface of the resin insulating layer 50, and the pad 63 on the surface of the resin insulating layer 51 are respectively Simultaneously formed (via forming step of the present invention). Next, solder resist layers 52 and 53 are formed by applying and curing a photosensitive epoxy resin on the surfaces of the resin insulating layers 50 and 51 on both sides. Thereafter, the solder resist layers 52 and 53 are patterned to form openings at predetermined positions so that the pads 62 and 63 are exposed to the outside, respectively. The laminated body 10b is completed by the above procedure, whereby the multilayer wiring board of the first embodiment can be obtained.

  In the laminated body 10b shown in FIG. 10, a buildup layer (first wiring laminated portion of the present invention) composed of a resin insulating layer 50, a conductor layer 60, a solder resist layer 52, and a pad 62 on one main surface side, and the other The build-up layer (the second wiring laminated portion of the present invention) composed of the resin insulating layer 51, the conductor layer 61, the solder resist layer 53, and the pad 63 on the main surface side of the main surface can be simultaneously formed (second of the present invention). Laminating step). 10, for example, solder balls used for the BGA package are connected to the pads 62 on the bottom surface, and solder bumps that can be bonded to the terminals of the semiconductor chip are connected to the pads 63 on the top surface. Can do. Although only the steps after the separation step are shown in FIGS. 8 to 10, the present invention is not limited to this, and there are various types of the laminated body 10b shown in FIG. Can be processed. Further, the number of laminated resin insulating layers and conductor layers laminated on both sides of the laminate 10b in FIG. 8 can be further increased as necessary. Furthermore, when assuming a multi-cavity substrate form, the multilayer body 10b obtained in FIG. 10 can be cut to obtain a plurality of multilayer wiring boards.

  As described above, the manufacturing method according to the first embodiment described with reference to FIGS. 1 to 10 is not limited to the above example, but includes various modifications. For example, although the laminated body 10b of FIG. 10 includes the resin insulating layers 20 to 23, 50, and 51 and the solder resist layers 52 and 53, the solder resist layers 52 and 53 may be replaced with resin insulating layers. . In this case, it is preferable to use a laser capable of a large opening diameter in order to form the openings of the pads 62 and 63 in FIG. If the laser is not used, the pads 62 and 63 exposed by polishing and desmearing the resin insulation layers on both sides are exposed to copper and thickened, and then covered with a resin film, and polishing and desmearing are performed on both sides. After the application, the portions of the pads 62 and 63 may be etched. By adopting the above modification, the laminated body 10b can be configured using resin insulating layers made of the same material, and the manufacturing process can be simplified and the cost can be reduced.

  As described above, by forming the multilayer wiring board by the manufacturing method of the first embodiment, while enjoying the merits of the conventional coreless wiring board, the weight of the support base 11 is used in the first lamination process. When the number of stacks is limited, in the second stacking step after the separation step, the number of stacks (for example, 10 layers or more) can be easily increased by using the separated stacked body 10b as a pseudo core. This is because the laminated body 10b after separation is made of a light material as compared with the support base material 11, and thus restrictions on transportation and handling are reduced in the manufacturing process. On the other hand, as a merit of the coreless wiring board, a structure that does not require a through hole is adopted, and electrical connection in the stacking direction using via conductors becomes possible. In addition, after the separation process, a common process can be simultaneously applied to both surfaces of the laminate 10b, and the manufacturing process can be simplified.

[Second Embodiment]
Next, the manufacturing method of the multilayer wiring board of 2nd Embodiment of this invention is demonstrated with reference to FIGS. Since the second embodiment is common to the first embodiment in many respects, differences from the first embodiment will be mainly described below. First, as shown in FIG. 11, a plate-like support base 11 similar to that of FIG. 1 of the first embodiment is prepared. In the structure of FIG. 11, the structure of the release sheet 14 is different from that of FIG. 1. Specifically, in the release sheet 14 of FIG. 11, the thickness of the copper foil 14c located on the outer side (the upper layer sheet of the present invention) is compared with the thickness of the copper foil 14d located on the inner side (the lower layer sheet of the present invention). The relationship is opposite to that shown in FIG. Other structures are the same as those in FIG.

  1 and subsequent steps in the second embodiment are common to the build-up layer structure shown in FIGS. 2 to 4 of the first embodiment. However, while the first embodiment has described the case of stacking using the subtractive method, the second embodiment is premised on the case of stacking using the semi-additive method. Therefore, in the second embodiment, the conductor layers 30, 31, and 32 included in the structures shown in FIGS. 2 to 4 are formed by forming a resist pattern on the surfaces of the resin insulating layers 20, 21, and 22 using a dry film. The surface is formed by electroless copper plating and electrolytic copper plating. At this point, a basic structure similar to that of the intermediate laminate 10a of FIG. 4 is obtained except for the structure of the release sheet 14.

  Next, as shown in FIG. 12, a copper plating layer 33a is formed by performing electroless copper plating on the entire surface of the resin insulating layer 23 on both sides of the intermediate laminate 10a. This copper plating layer 33a is thinner than the copper plating layer 33 of FIG. 5 of the first embodiment, and is not filled in the via hole 43a, and only the surface thereof is covered with the thin copper plating layer 33a. It has become.

  Next, the intermediate laminate 10a of FIG. 12 is cut and then separated from the support base 11 by the same method as in FIGS. 6 and 7 of the first embodiment (separation step of the present invention). As a result, as shown in FIG. 13, two stacked bodies 10b having the same structure can be obtained. Each laminated body 10b obtained in this way functions as a support substrate (pseudo core) in each subsequent process.

  Next, as shown in FIG. 14, the dry film 15 is laminated on each surface of the copper foil 14c and the copper plating layer 33a on both sides of the laminated body 10b obtained in the separation step. In the dry film 15, portions where conductors are to be formed are removed. Subsequently, in a state where the dry film 15 is formed, after electrolytic copper plating is performed on both surfaces of the laminate 10b, the dry film 15 is removed. As a result, as shown in FIG. 15, a conductor layer 80 in which the copper foil 14c is patterned and a conductor layer 81 in which the copper plating layer 33a is patterned are formed.

  Next, as shown in FIG. 16, resin insulating layers 50 and 51 are formed on both sides of the laminate 10b by the same method as in FIG. 9 of the first embodiment. Subsequently, via conductors 70 and 71 are formed by the same method as in FIG. 10 of the first embodiment (via formation step of the present invention), and pads 62 and 63 are formed on the surfaces of the resin insulating layers 50 and 51, respectively. To do. Further, solder resist layers 52 and 53 are formed, and the pads 62 and 63 are exposed to the outside by patterning. The laminated body 10b is completed by the above procedure, whereby the multilayer wiring board of the second embodiment can be obtained.

  Also in the second embodiment, as in the case of the first embodiment, the number of stacked layers 10b can be further increased as necessary, and can be easily adapted to a multi-chip substrate form. is there. The modification described in the first embodiment can also be employed in the second embodiment.

  As described above, by forming the multilayer wiring board by the manufacturing method of the second embodiment, the same effect as that of the first embodiment can be obtained, and all the inner layers can be formed by the semi-additive method. Therefore, a multilayer wiring board suitable for high density can be realized by fine patterning.

  Although the contents of the present invention have been specifically described based on the two embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. it can. For example, in the present embodiment, the release sheet 14 in which the copper foils 14a and 14b are adhered in a peelable manner has been described, but the release sheet 14 may be formed using various metal materials that are in close contact with each other without being limited to copper. Well, its thickness can also be changed. Moreover, although this embodiment demonstrated the case where metal (copper) plating was performed to the whole surface side of the intermediate | middle laminated body 10a by a metal (copper) plating process, it is not restricted to metal plating, For example, intermediate | middle laminated body by sputtering. A layer mainly composed of metal may be formed on the entire surface of the surface 10a. In addition, the resin insulation layer, via conductor, pad, solder resist layer, and other components constituting the multilayer wiring board also have their structures, shapes, and formation methods as long as the effects of the present invention can be obtained. The content disclosed in the embodiment can be changed without being limited.

DESCRIPTION OF SYMBOLS 10a ... Intermediate laminated body 10b ... Laminated body 11 ... Support base material 12 ... Copper foil 13 ... Prepreg 14 ... Release sheet 14a, 14b, 14c, 14d ... Copper foil 15 ... Dry film 20, 21, 22, 23, 50, 51 ... Resin insulation layers 30, 31, 32, 60, 61, 80, 81 ... Conductor layers 33, 33a ... Copper plating layers 40, 41, 42, 43, 70, 71 ... Via conductors 40a, 43a, 70a, 71a ... Via holes 52, 53 ... Solder resist layer 62, 63 ... Pad

Claims (10)

In the method of manufacturing a multilayer wiring board in which resin insulation layers and conductor layers are alternately laminated,
A first laminating step of alternately laminating the resin insulating layers and the conductor layers on a plate-like support base material to form an intermediate laminate;
A metal layer forming step of forming a metal-based layer on the entire surface of the intermediate laminate,
A separation step of separating the intermediate laminate and the support substrate;
A first wiring laminated portion in which the resin insulating layer and the conductor layer are alternately laminated is formed on one main surface side and the other main surface side is formed on the intermediate laminated body separated from the support base material. A second laminating step of forming a second wiring laminating portion in which the resin insulating layers and the conductor layers are alternately laminated;
A method for producing a multilayer wiring board, comprising:   2. The method for manufacturing a multilayer wiring board according to claim 1, wherein in the first lamination step, two intermediate laminates are formed on both sides of the support base material.   The first laminating step and the second laminating step further include a via forming step of forming a via conductor that penetrates each resin insulating layer and electrically connects the conductor layers. Item 3. A method for producing a multilayer wiring board according to Item 1 or 2. A sheet disposing step of disposing the lower layer sheet and the upper layer sheet in a peelable state on at least one main surface side of the support substrate;
4. The multilayer according to claim 1, wherein the separating step separates the intermediate laminate and the support substrate by separating the lower layer sheet and the upper layer sheet at a separation interface. 5. A method for manufacturing a wiring board.   The method for manufacturing a multilayer wiring board according to claim 4, wherein the lower layer sheet and the upper layer sheet are made of copper. The lower layer sheet is formed thinner than the upper layer sheet, and the lower layer sheet is in close contact with the surface of the support substrate,
6. The method for manufacturing a multilayer wiring board according to claim 4, wherein in the metal layer forming step, a metal plating layer is formed by electrolytic plating on the entire surface on the surface side of the intermediate laminate.   For each of the upper layer sheet and the metal plating layer formed on both sides of the intermediate laminate after the separation step, at least a part of the metal plating layer is removed by a subtractive method to form the conductor layer The method for producing a multilayer wiring board according to claim 6, wherein: The upper layer sheet is formed thinner than the lower layer sheet, the surface of the support substrate is in close contact with the lower layer sheet,
6. The method for manufacturing a multilayer wiring board according to claim 4, wherein in the metal layer forming step, a metal plating layer is formed by electroless plating on the entire surface of the intermediate laminate.   The method for manufacturing a multilayer wiring board according to claim 8, wherein all the conductor layers are formed by a semi-additive method. The method for manufacturing a multilayer wiring board according to claim 1, wherein all the resin insulating layers are mainly formed of the same resin insulating material.

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