JP2011159855A - Partially multilayer printed circuit board, and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem with a conventional partially multilayer printed circuit board, wherein the circuit board readily causes many troubles such as generation of contact failures between a mother board and a partially multilayer printed circuit board. <P>SOLUTION: A cavity part 27 is provided in a part of at least a surface layer of the circuit board 21 and a circuit forming material 1 formed under a wiring rule finer than that for the circuit board 21 is laminated in the cavity part 27 to obtain a structure in which an upper part of the circuit forming material 1 does not protrude. Owing to the structure, a solder resist 25 can be formed on the surfaces of the circuit board 21 and the circuit forming material 1 at the same step. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a local multilayer circuit board for mounting a semiconductor device, an electronic component or the like, and a manufacturing method thereof.

  In recent years, miniaturization, high-speed operation, and high functionality of electronic devices have been increasingly advanced, and semiconductor chips for realizing the electronic devices have been highly integrated. It has become a structure. For this reason, a circuit board for mounting a semiconductor chip or a semiconductor package is also used as a multilayer circuit board that requires a larger number of layers in a build-up structure that realizes a high-definition pattern.

  However, a multilayer circuit board is required only in the vicinity where the multi-pin semiconductor package is mounted, and the circuit can be designed without any problems even if the number of layers of the other parts is small. That is, since fine wiring and more multilayers are required in some areas, fine wiring rules and multilayering are adopted for the entire circuit board, resulting in an expensive substrate.

  As means for solving this problem, there is a local multilayer circuit board in which only a portion of the circuit board that requires more layers is multilayered (for example, refer to Patent Document 1).

  FIG. 7 is a cross-sectional view showing a conventional local multilayer circuit board.

  In FIG. 7, reference numeral 321 denotes a multi-layer mother board formed by a normal wiring rule. Reference numeral 322 denotes an insulating base material, and a circuit is configured by electrically connecting the wiring patterns 323 of the respective layers through conductive vias 324. The multilayer substrate 301 is laminated only on necessary portions of the surface layer of the mother substrate 321.

  FIG. 8 is a diagram for explaining a stacking process of the conventional method for manufacturing a local multilayer circuit board shown in FIG.

  The constituent material 302 of the partial multilayer substrate 301 is an insulating resin material, and the fine pattern 303 of each layer is electrically connected by a conductive via 304.

  The via land wiring pattern 323 of the mother substrate and the conductive via 304 are aligned and laminated on a portion of the mother substrate 321 where the solder resist 325 is not formed. Thereafter, the multilayer substrate 301 is attached to the surface of the mother substrate 321 by a hot press, for example, under the conditions of a temperature of 150 ° C. and a pressure of 2 MPa, by the adhesive effect of the insulating resin material 302 in a semi-cured state. The local multilayer circuit board shown in FIG.

JP 2003-298232 A

  However, the conventional local multilayer circuit board has a configuration in which the part of the multilayer board partially laminated on the mother board is easily damaged by physical damage, so that the gap between the mother board and the partially laminated multilayer board is not sufficient. Many problems such as poor contact occurred easily.

  These problems are described below.

  The mother substrate 321 and the partial multi-layer substrate 301 have different required definition, so that the size and material configuration of each wiring pattern and via are different. Also, different material properties are required for the insulating resins 302 and 322 for supporting them. Furthermore, since the heat and pressure conditions when the partial multilayer substrate 301 is hot-pressed after being laminated on the mother substrate 321 are the heat and pressure of uncured insulating resin having a fine pattern formed in a small area, Bonding is performed at a lower temperature and lower pressure than the condition of hot pressing the multilayer circuit board. For this reason, the adhesive force at the interface between the mother substrate 321 and the partial multilayer substrate 301 is weak.

  Since the laminated portion of the partial multilayer board 301 protrudes from the surface of the mother board 321, when the local multilayer circuit board before component mounting is handled and transported in a superimposed manner, the partial multilayer board 301 portion is rubbed and compared. Separation occurs at the interface with the mother substrate 321 having a weak adhesive bond interface, resulting in poor connection between the conductive via 304 and the wiring pattern 323 of the mother substrate 321.

  Also, problems are likely to occur when electronic components are mounted.

  FIG. 9 is a diagram for explaining a cream solder printing process when electronic components are mounted on a conventional local multilayer circuit board.

  As the number of layers of the partial multilayer substrate 301 increases, the level difference from the mother substrate 321 increases. Therefore, when the cream solder 326 is supplied by a printing method, the vicinity of the mother substrate 321 in which the partial multilayer substrate 301 is laminated as shown in FIG. The supply amount of the cream solder 326 is insufficient.

  In addition, if it is heated to a high temperature in the reflow process after component mounting, the insulating resin material and configuration are different. There are issues such as rising.

  In view of the above-described conventional problems, an object of the present invention is to provide a local multilayer circuit board that does not physically damage a multilayer board partially stacked on a mother board, and a manufacturing method thereof.

In order to solve the above-described problem, the first aspect of the present invention provides:
A circuit board having a cavity in at least a part of the surface layer;
A local multilayer circuit board provided with a circuit forming material that is disposed in the cavity portion and is formed with a wiring rule of higher definition than the circuit board.

The second aspect of the present invention
The circuit board has a multilayer structure,
The cavity part has a predetermined distance or less between a plane including a surface of the wiring pattern formed on the surface layer of the circuit board and a plane including the surface of the wiring pattern formed on the surface layer of the circuit forming material. The local multilayer circuit board according to the first aspect of the present invention has a depth.

The third aspect of the present invention
The solder resist formed on the surface of the circuit board and the solder resist formed on the surface of the circuit forming material are formed by the same process, and the local multilayer circuit of the first or second aspect of the present invention. It is a substrate.

The fourth aspect of the present invention is
The local multilayer circuit board according to the third aspect of the present invention, wherein the solder resist is filled in at least a part of a gap between the circuit board and the circuit forming material.

The fifth aspect of the present invention provides
The predetermined distance is the local multilayer circuit board according to the second aspect of the present invention, which is 0.2 mm.

The sixth aspect of the present invention provides
The cavity portion is the local multilayer circuit board according to the second aspect of the present invention, which is configured only by an opening penetrating from the front surface to the back surface of the base material of the surface layer of the circuit board.

The seventh aspect of the present invention
The cavity part has an opening larger than the bottom part, and at least a part of the side wall part has a staircase shape,
The local multilayer circuit board according to the first aspect of the present invention, wherein different circuit forming materials are arranged in the cavity layers of the respective steps.

In addition, the eighth aspect of the present invention
A seventh book in which at least a part of a gap portion between the circuit forming material and the circuit board in the cavity layer closest to the opening is filled with a solder resist among the cavity layers of the steps. It is a local multilayer circuit board of the invention.

The ninth aspect of the present invention provides
A laminating step of disposing a circuit forming material formed with a wiring rule of higher definition than the circuit board in the cavity part of the circuit board having a cavity part in at least a part of the surface layer;
An adhesion step of adhering the circuit board and the circuit forming material by pressure heating;
Production of a local multilayer circuit board comprising a resist forming step of forming a solder resist on the surface of the circuit board, the surface of the circuit forming material, and a gap between the circuit board and the circuit forming material. Is the method.

The tenth aspect of the present invention is
In the resist forming step, the solder resist is formed in the same step on the surface of the circuit board, the surface of the circuit forming material, and the gap portion. It is.

The eleventh aspect of the present invention is
The cavity part has an opening larger than the bottom part, and at least a part of the side wall part has a staircase shape,
Repeating the laminating step and the adhering step so as to arrange and adhere different circuit forming materials for each cavity layer of each step,
Thereafter, in the resist forming step, the surface of the circuit board, the surface of the circuit forming material, and the gap portion between the circuit forming material and the circuit board in the cavity layer closest to the opening. The method for manufacturing a local multilayer circuit board according to the ninth aspect of the present invention, wherein the solder resist is formed in the same step.

  According to the present invention, it is possible to provide a local multilayer circuit board that does not physically damage the multilayer board partially laminated on the mother board, and a manufacturing method thereof.

Sectional drawing of the local multilayer circuit board in Embodiment 1 of this invention (A)-(h) The figure which shows the manufacturing process of the single layer circuit formation material which has a high-definition wiring pattern in Embodiment 1 of this invention. (A)-(c) The figure which shows the manufacturing process of the multilayered circuit formation material which has a high-definition wiring pattern in Embodiment 1 of this invention. (A)-(d) The figure which shows the manufacturing process of the local multilayer circuit board in Embodiment 1 of this invention. Sectional drawing of the local multilayer circuit board in Embodiment 2 of this invention (A)-(d) The figure which shows the manufacturing process of the local multilayer circuit board in Embodiment 2 of this invention. Sectional view of a conventional local multilayer circuit board Cross-sectional view of conventional local multilayer circuit board in the lamination process during manufacturing Sectional view of cream solder printing process when mounting electronic components on a conventional local multilayer circuit board

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a cross-sectional view of a local multilayer circuit board according to Embodiment 1 of the present invention.

  In FIG. 1, reference numeral 21 denotes a four-layer multilayer circuit board having cavities, 22 a, 22 b, and 22 c are insulating resin base materials, and a wiring pattern 23 is formed on each layer. The layers are electrically connected by conductive vias 24 to form a multilayer circuit board.

  Reference numeral 1 denotes a circuit forming material, which is composed of a wiring pattern 3 with higher definition than the multilayer circuit board 21. 2 is an insulating resin, and 4 is a conductive via. The circuit forming material 1 is stuck in the cavity of the multilayer circuit board 21 by the adhesive effect of the insulating resin 2. Further, the conductive via 4 provided in the circuit forming material 1 and the wiring pattern 23 of the multilayer circuit board 21 are electrically connected.

  With this configuration, it is possible to mount a multi-pin narrow-pitch BGA package, a semiconductor bare chip, or the like on the circuit forming material 1 having the fine wiring pattern 3, and to reduce the number of layers of the multilayer circuit board 21 serving as a mother board. Can do.

  The multilayer circuit board 21 corresponds to an example of the circuit board of the present invention. In addition, the circuit forming material 1 in which the wiring pattern 3 with higher definition than the wiring pattern 23 of the multilayer circuit board 21 is formed corresponds to an example of the circuit forming material formed with the wiring rule with higher definition than the circuit board of the present invention. . The “higher-definition wiring rule” of the present invention is a wiring rule in which at least one of the via diameter, land diameter, and L / S is high-definition.

  In the local multilayer circuit board shown in FIG. 1, the depth of the cavity is controlled by changing the thickness of the insulating resin base material 22a (prepreg or green sheet) on the outermost layer of the multilayer circuit board 21, and the circuit forming material 1 The thickness is matched. As a result, the step-out step of the circuit forming material 1 can be eliminated from the surface of the multilayer circuit board 21, so that it is prevented from receiving physical stress on the circuit forming material 1 portion generated when the substrates are stacked and transported. It is possible to protect the adhesive interface between the multilayer circuit board 21 and the circuit forming material 1 which is considered to be the weakest in this structure. That is, the connection quality between the conductive via 4 of the circuit forming material 1 and the wiring pattern 23 of the multilayer circuit board 21 is not damaged.

  The insulating resin base material 22a arranged on the surface side of the multilayer circuit board 21 on which the circuit forming material 1 is laminated corresponds to an example of the surface base material of the present invention.

  Next, a method for manufacturing the local multilayer circuit board according to the first embodiment will be described.

  FIGS. 2A to 2H are explanatory views of a manufacturing process of a single-layer high-definition wiring pattern circuit forming material. All the drawings shown in FIGS. 2A to 2H are cross-sectional views.

  2 to 4, the same reference numerals are used for the same components as those of the local multilayer circuit board of FIG. 1, and descriptions thereof are omitted.

  In FIG. 2 (a), reference numeral 2 denotes an uncured insulating resin material such as an epoxy resin having a thickness of 10 to 100 micrometers, and a protective film 5a and 5b having a thickness of about 10 micrometers attached to both surfaces thereof. It has become.

  As shown in FIG. 2B, via holes 6 having a diameter of 50 micrometers are formed on the sheet by a processing means such as punching or laser.

  Then, as shown in FIG. 2C, the via hole 6 is filled with a conductive resin paste 14 by means such as a screen printing method. As the conductive resin paste 14, a material obtained by kneading an epoxy resin material and silver-coated copper powder is used.

  And as shown in FIG.2 (d), the upper protective film 5a is peeled and the insulating resin sheet 8 in which the conductive via 4 was formed is prepared.

  On the other hand, in FIG.2 (e), 3a is copper foil of thickness 5 micrometers, and is formed in the surface of the base film material 7 through the mold release layer (not shown).

  As shown in FIG. 2 (f), the transfer pattern sheet 9 is prepared by forming the wiring pattern 3 including the via land connected to the conductive via 4 by etching the copper foil 3 a. The via land included in the wiring pattern 3 is formed with a diameter of 150 micrometers, and the wiring pattern is formed with L / S = 30/30 micrometers.

  Then, as shown in FIG. 2 (g), the conductive via 4 of the insulating resin sheet 8 and the via land of the transfer pattern sheet 9 are aligned and laminated, and as shown in FIG. A single-layer circuit forming material 10 provided with fine wiring patterns 3 and conductive vias 4 can be obtained by integrating the two by a heating and pressing means such as vacuum lamination. As the heating and pressing conditions of the vacuum laminate at this time, for example, the temperature is 80 ° C., the pressure is 0.5 MPa, and the pressing time is 30 seconds.

  3A to 3C are explanatory views of a manufacturing process of a multilayered circuit forming material having a high-definition wiring pattern, each showing a cross-sectional view.

  10a, 10b, and 10c are single-layer circuit forming materials manufactured by processing from the circuit forming material 10 manufactured by the manufacturing process of FIG.

  As shown in FIG. 3A, the circuit forming material 10a includes the conductive via 4 and the transfer wiring pattern 3 to be connected to the via land formed on the multilayer circuit board 21, and is an uncured insulating resin. The thickness of 2 is set to 50 micrometers in order to embed the wiring pattern 23 of the multilayer circuit board 21. In the lamination, the base film material 7 is peeled off.

  The circuit forming material 10b has a thickness of the uncured insulating resin 2 set to 10 micrometers, and includes a fine transfer wiring pattern 3 and conductive vias 4 for connecting the layers, a base film material 7 and The protective film 5b is peeled off.

  The circuit forming material 10c has a thickness of the uncured insulating resin 2 set to 10 micrometers, and includes a transfer pattern 3 and a conductive via 4 including a wiring pattern corresponding to a mounted component, a via land, and a conductive film 5b. Has been removed.

  As shown in FIG. 3B, the transfer wiring patterns 3 and the conductive vias 4 of the circuit forming materials 10a, 10b, and 10c are aligned and laminated, and then integrated by a heating and pressing means such as vacuum lamination. Do. As the heating and pressing conditions of the vacuum laminate at this time, for example, the temperature is 80 ° C., the pressure is 0.5 MPa, and the pressing time is 30 seconds.

  And as shown in FIG.3 (c), the multilayer circuit formation material 1 provided with the fine wiring pattern 3 and the conductive via 4 is made by removing the base film material 7 and the protective film 5b.

  Here, in explaining the manufacturing process of the circuit forming material 1, it was explained as a single item, but actually, it was processed in a sheet shape faced with a large number of pieces, and after completion to FIG. Preferably it is done.

  4A to 4D are views showing the manufacturing process of the local multilayer circuit board according to the first embodiment, and each show a cross-sectional view.

  In FIG. 4A, reference numeral 1 denotes a circuit forming material having a fine wiring pattern 3 having a three-layer structure manufactured by the manufacturing method shown in FIGS.

  21 is a multilayer circuit board on which a cavity 27 is formed, and the depth of the cavity 27 is 80 micrometers. In this case, the cavity 27 is configured by an opening penetrating from the front surface to the back surface of the insulating resin base material 22a which is the outermost layer of the multilayer circuit board 21, and the depth thereof is the thickness of the layer of the insulating resin base material 22a. Is the same depth.

  The cavity 27 is formed by, for example, producing a multilayer circuit board in which no cavity is formed and then removing a part of the insulating resin base material 22a on the outermost layer of the multilayer circuit board by cutting. As another method, a multilayer circuit board may be formed by providing an opening in the outermost insulating resin base material 22a and laminating a single-layer circuit forming material.

  The depth of the cavity 27 can be controlled by changing the thickness of the insulating resin base material 22 a constituting the outermost layer cavity 27 of the multilayer circuit board 21.

  The cavity 27 corresponds to an example of the cavity portion of the present invention.

  The conductive vias 4 of the multilayered circuit forming material 1 and the wiring pattern 23 having a thickness of 35 micrometers provided at the bottom of the cavity 27 of the multilayer circuit board 21 are aligned and laminated.

  After that, as shown in FIG. 4B, the insulating resin 2 of the circuit forming material 1 is once softened and bonded to the multilayer circuit board 21 side by heating and pressurizing by means such as hot pressing, and then completely By thermally curing, the conductive via 4 and the wiring pattern 23 are electrically pressed and connected. At this time, the interlayer of the circuit forming material 1 is also cured and completely integrated after the insulating resin 2 is once melted from the temporarily bonded state. As an example of the hot press conditions, the temperature is 150 ° C., the pressure is 1 MPa, and the pressing time is 2 minutes.

  In this way, by laminating the multilayer circuit forming material 1 having a fine pattern in the cavity 27 portion of the multilayer circuit board 21, a local multilayer having no level difference due to the lamination having a partially dense wiring pattern 3. A circuit board can be provided.

  4A corresponds to an example of the lamination process of the present invention, and the process described in FIG. 4B corresponds to an example of the bonding process of the present invention.

  Due to the configuration of the local multilayer circuit board of the first embodiment, when the local multilayer circuit board is stacked and packed or transported, physical stress such as rubbing against the partially laminated multilayer circuit forming material 1 is applied. The connection damage between the conductive via 4 and the wiring pattern 23 due to the addition can be eliminated. In other words, since there is no protruding step in the laminated portion, the laminated portion is not subjected to external stress even when the substrates are stacked and transported, etc., so that the circuit forming material having a multilayer circuit board and a high-definition wiring pattern Conductive via connection damage at the bonding interface can be avoided.

  Further, in the local multilayer circuit board according to the first embodiment, the cavity 27 is configured only by an opening penetrating from the surface of the outermost insulating resin base material 22a of the multilayer circuit board 21 to the back surface. The depth can be easily adjusted by changing the thickness of the base material of the outermost layer of the multilayer circuit board 21.

  FIG. 4C is a cross-sectional view when the solder resist 25 is formed on the entire local multilayer circuit board of Embodiment 1 manufactured in FIG. 4B by the photolithography method, the printing method, or the like.

  As described above, even if the circuit board is locally multi-layered, the solder resist of the multi-layer circuit forming material 1 part having the fine circuit pattern 21 and the multi-layer circuit board 21 part serving as the mother board is eliminated by eliminating the step. 25 can be formed in the same process, which was conventionally formed in a separate process. At this time, the gap 28 formed between the laminated circuit forming material 1 and the multilayer circuit board 21 can also be filled and formed with the solder resist 25, so that the reinforcing component of the circuit forming material 1 can be physically formed. The reinforcing effect can be obtained not only for the stress but also for the thermal stress of 200 ° C. or more applied in the reflow process.

  Furthermore, since the wiring pattern 23 of the multilayer circuit board 21 exposed in the gap portion 28 can be covered with the solder resist 25, the dielectric strength performance between patterns due to the influence of humidity or the like can be ensured.

  As described above, by adopting the configuration of the local multilayer circuit board of the first embodiment, the reinforcing effect of the circuit forming material 1 adhesively bonded to the multilayer circuit board 21 is enhanced, and the wiring pattern 23 of the multilayer circuit board 21 is further enhanced. By eliminating the exposure, the withstand voltage performance can be improved.

  The step of forming the solder resist 25 described in FIG. 4C in the same step corresponds to an example of the resist forming step of the present invention.

  FIG. 4D is a cross-sectional view when cream solder is printed on the local multilayer circuit board according to the first embodiment.

  Since there is no step when printing and supplying the cream solder 26, the cream solder can be supplied evenly to the vicinity of the locally formed circuit forming material 1 and components can be mounted.

  4B, by preventing the plane 29 including the surface of the wiring pattern 3 of the circuit forming material 1 from protruding from the plane 30 including the surface of the wiring pattern 23 of the multilayer circuit board 21, It is possible to prevent external stress from being applied to the laminated portion when the substrates are stacked and transported, and the depth of the cavity 27 is set so that these two planes 29 and 30 are the same plane. By setting, the effect that the solder resist 25 can be formed in the same process and the effect that the cream solder can be supplied evenly to the vicinity of the circuit forming material 1 can be exhibited. In addition, even if these two planes 29 and 30 are not completely the same plane, these effects can be sufficiently exhibited by setting the distance between the two planes 29 and 30 within 0.2 mm. .

  In the first embodiment, the multilayer circuit board 21 including the cavity 27 is a resin substrate, but another material such as a ceramic substrate may be used.

  In addition, although the multilayer circuit forming material 1 to be locally laminated has a three-layer structure, the present invention is not limited to this, and the same effect can be obtained with a single layer or a larger number of layers.

  Further, the uncured insulating resin 2 may not have a single material structure, but may have a three-layer structure in which insulating resins are formed on both surfaces of a core material such as a thin polyimide film. As a result, the resin flow generated when the circuit forming material 1 is laminated and hot-pressed in multiple layers can be suppressed, and the position retention ratio of the wiring pattern 23 and the conductive via 4 can be increased.

  In the local multilayer circuit board according to the first embodiment described with reference to FIGS. 1 to 4, the cavity 27 is configured only by the uppermost insulating resin base material 22 a, but a plurality of insulating resins is used. You may make it comprise a cavity by the opening which penetrated the layer of the base material. For example, in FIG. 4A, an opening that continuously penetrates the insulating resin base material 22a and the insulating resin base material 22b may be formed as the cavity portion of the present invention.

(Embodiment 2)
FIG. 5 is a sectional view of a local multilayer circuit board according to the second embodiment of the present invention. The description of the same components as those in FIGS. 1 to 4 is omitted.

  In FIG. 5, reference numeral 121 denotes a five-layer multilayer circuit board having stepped cavities, and each layer including the stepped portion includes a wiring pattern 123 and a conductive via 124 for connecting the layers of each wiring pattern 123. ing. In the stepped cavity of the multilayer circuit board, there is a multilayered circuit forming material having a reverse staircase shape comprising an insulating resin 102, a fine wiring pattern 103, and a conductive via 104 for connecting the layers. The wiring patterns 123 in the cavity step portion of the multilayer circuit board 121 and the conductive vias 104 in each layer in the reverse step portion of the circuit forming material are electrically bonded.

  With this structure, in addition to the numerous effects obtained by eliminating the stacking step of the local multilayer portion described in the first embodiment, the interlayer of the multilayer circuit board 121 can be changed from the interlayer of the multilayer circuit forming material having fine wiring. Therefore, it is possible to increase the tolerance of the board circuit design, improve the wiring capacity, and reduce the number of layers or the area of the multilayer circuit board.

  6 (a) to 6 (d) are diagrams showing manufacturing steps of the local multilayer circuit board in the second embodiment, and each show a cross-sectional view.

  As shown in FIG. 6A, reference numeral 121 denotes a five-layer multilayer circuit board having a stepped cavity 127. 101A, 101B, and 101C shown in FIGS. 6A to 6C are the same as the single-layer circuit forming material 10 having a fine wiring pattern manufactured by the manufacturing method of FIG. 2 of the first embodiment. .

  The cavity 127 is configured by connecting openings penetrating from the front surface to the back surface of each of the insulating resin base materials 122a, 122b, and 122c of the multilayer circuit board 121. Here, the part of the cavity 127 corresponding to each layer of the insulating resin base materials 122a, 122b, and 122c, which is represented by a dashed line in FIG. 6A, is referred to as a cavity layer.

  The surface of the stepped cavity 127 on which the lowermost wiring pattern 123a is formed is an example of the bottom of the cavity portion of the present invention, and the upper surface portion of the cavity layer corresponding to the uppermost insulating resin base material 122a. This corresponds to an example of the opening of the cavity portion of the present invention.

  First, as shown in FIG. 6A, the wiring pattern 123a provided at the bottom of the stepped cavity 127 of the multilayer circuit board 121 and the conductive via 104a of the single-layer circuit forming material 101a are aligned. Then, the circuit forming material 101a is laminated on the cavity layer corresponding to the insulating resin base material 122c.

  Next, as shown in FIG. 6B, the conductive via 104b of the single-layer circuit forming material 101b, the wiring pattern 123b provided in the second step of the stepped cavity 127, and the circuit forming material 101a already stacked. Position alignment with the wiring pattern 103a is performed, and the circuit forming material 101b is laminated on the portion of the cavity layer corresponding to the insulating resin base material 122b.

  Next, as shown in FIG. 6C, the conductive via 104c of the single-layer circuit forming material 101c, the wiring pattern 123c provided in the third step of the stepped cavity 127, and the circuit forming material 101b already stacked. Position alignment with the wiring pattern 103b is performed, and the circuit forming material 101c is laminated on the cavity layer corresponding to the insulating resin base material 122a.

  Each of the single-layer circuit forming materials 101a, 101b, and 101c has a stepped shape opposite to the stepped cavity 127 provided in the multilayer circuit board 121, and therefore has a different size.

  Then, the circuit forming materials 101a, 101b, 101c laminated in the reverse staircase shape as described above are heated and pressurized by hot pressing from above, so that they are integrated as a multilayer circuit forming material, and the multilayer circuit board 121 is integrated. A local multilayer circuit board that is bonded and has interlayer connections at the staircase shape can be manufactured.

  The local multilayer circuit board according to the second embodiment thus manufactured has a configuration in which the upper surface of the circuit forming material 101a laminated on the uppermost layer is not stepped from the surface of the multilayer circuit board 121. Similarly, as shown in FIG. 6D, a solder resist 125 can be formed on the surface of the circuit forming material 101a and the surface of the multilayer circuit board 121 in the same process, and at that time, the circuit forming material 101a and the multilayer circuit are formed. The solder resist 125 can be filled and formed also in the gap portion 128 formed between the substrate 121 and the substrate 121.

  The local multilayer circuit board according to the second embodiment includes a multilayer circuit board 121 having a stepped cavity 127 and wiring patterns 123a, 123b, and 123c on the stepped portion, and a high-definition wiring pattern 103a stacked on the cavity 127 portion. The circuit forming materials 101a, 101b, and 101c having 103b and 103c are multilayered reverse staircase shapes, and the circuit forming material 101a having the wiring patterns 123a, 123b, and 123c in the staircase portion and the high-definition wiring patterns 103a, 103b, and 103c. , 101b, and 101c are electrically connected to the conductive vias 104a, 104b, and 104c, respectively, so that an interlayer wiring of a circuit forming material having a high-definition wiring pattern and a multilayer circuit board 121 that becomes a mother board are provided. Board circuit layout. That it is possible to greatly improve the wiring capacity to facilitate the design, it is possible to obtain a smaller area or layer number reduction.

  The local multilayer circuit board of the present invention has a high-definition partly multi-layered wiring pattern, so that the entire board is inexpensive mother board specifications, but can be mounted on a narrow pitch semiconductor package or bare chip. It can be applied to applications of electronic devices that require density mounting.

  In the second embodiment, the case where the stepped shape of the cavity 127 formed in the multilayer circuit board 121 has three steps has been described, but any number of steps may be used as long as it has two or more steps.

  In the second embodiment, the staircase shape of the cavity 127 is formed on both opposing side wall surfaces. However, only a part of the side wall surface of the cavity 127 has a staircase shape. There may be. For example, the left side wall has a three-step shape like the left side wall of the cavity 127 in FIG. 6A, and the right side wall has the same shape as the right side wall of the cavity 27 in FIG. It is good also as a cavity which has the shape without a level | step difference.

  The local multilayer circuit board and the method for manufacturing the local multilayer circuit board according to the present invention have the effect of not physically damaging the multilayer board partially stacked on the mother board, and can increase the performance of semiconductor devices and electronic components. It is useful as a local multilayer circuit board for density mounting and a manufacturing method thereof.

DESCRIPTION OF SYMBOLS 1 Multi-layer circuit formation material in which high-definition pattern was formed 2, 102 Insulating resin 3, 103, 103a, 103b, 103c Wiring pattern 3a Copper foil 4, 104 Conductive via 5a, 5b Protective film 6 Via hole 7 Base film Material 8 Insulating resin sheet 9 Transfer pattern sheet 10, 101 Single layer circuit forming material on which high-definition pattern is formed 14 Conductive resin paste 21 Multilayer circuit board 22a, 22b, 22c, 122a, 122b formed with cavities 122c, 122d Insulating resin substrate 23, 123, 123a, 123b, 123c Wiring pattern 24, 124 Conductive via 25, 125 Solder resist 26 Cream solder 27 Cavity 28, 128 Gap 29 Wiring pattern 3 of circuit forming material 1 Plane including the surface of 30 layers A plane including the surface of the wiring pattern 23 of the road board 21 121 A multilayer circuit board in which a step-shaped cavity is formed 127

Claims (11)

A circuit board having a cavity in at least a part of the surface layer;
A local multilayer circuit board, comprising: a circuit forming material that is disposed in the cavity portion and is formed with a wiring rule of higher definition than the circuit board. The circuit board has a multilayer structure,
The cavity part has a predetermined distance or less between a plane including a surface of the wiring pattern formed on the surface layer of the circuit board and a plane including the surface of the wiring pattern formed on the surface layer of the circuit forming material. The local multilayer circuit board according to claim 1, having a depth.   The local multilayer circuit board according to claim 1, wherein the solder resist formed on the surface of the circuit board and the solder resist formed on the surface of the circuit forming material are formed by the same process. .   The local multilayer circuit board according to claim 3, wherein the solder resist is filled in at least a part of a gap between the circuit board and the circuit forming material.   The local multilayer circuit board according to claim 2, wherein the predetermined distance is 0.2 mm.   The local multilayer circuit board according to claim 2, wherein the cavity portion is configured only by an opening penetrating from the front surface to the back surface of the base material of the surface layer of the circuit board. The cavity part has an opening larger than the bottom part, and at least a part of the side wall part has a staircase shape,
The local multilayer circuit board according to claim 1, wherein different circuit forming materials are arranged in the cavity layers of the respective steps.   The solder resist is filled in at least a part of a gap between the circuit forming material and the circuit board in the cavity layer closest to the opening among the cavity layers of the steps. A local multilayer circuit board as described. A laminating step of disposing a circuit forming material formed with a wiring rule of higher definition than the circuit board in the cavity part of the circuit board having a cavity part in at least a part of the surface layer;
An adhesion step of adhering the circuit board and the circuit forming material by pressure heating;
Production of a local multilayer circuit board comprising a resist forming step of forming a solder resist on the surface of the circuit board, the surface of the circuit forming material, and a gap between the circuit board and the circuit forming material. Method.   The method for manufacturing a local multilayer circuit board according to claim 9, wherein the resist forming step forms the solder resist on the surface of the circuit board, the surface of the circuit forming material, and the gap portion in the same step. . The cavity part has an opening larger than the bottom part, and at least a part of the side wall part has a staircase shape,
Repeating the laminating step and the adhering step so as to arrange and adhere different circuit forming materials for each cavity layer of each step,
Thereafter, in the resist forming step, the surface of the circuit board, the surface of the circuit forming material, and the gap portion between the circuit forming material and the circuit board in the cavity layer closest to the opening. The method for manufacturing a local multilayer circuit board according to claim 9, wherein the solder resist is formed in the same step.