JP2013251313A - Multi-layer wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board which includes a protruding electrode formed on a peelable copper foil side surface and protruding from a surface of an insulation resin layer and is extremely thin.SOLUTION: A multilayer wiring board has a multilayer wiring structure formed by alternately laminating multiple interlayer insulation resin layers and multiple wiring patterns. In the multilayer wiring board, an upper bottom of a circular truncated cone shaped via hole is connected with a protruding terminal that is formed protruding from the interlayer insulation resin layer. A land is connected with a lower bottom of the circular truncated cone shaped via hole, and a connection portion between the land and the lower bottom of the via hole is covered by the protruding terminal.

Description

  The present invention relates to a multilayer wiring board having a very thin plate thickness used for a semiconductor element mounting package and a method for manufacturing the same.

  In recent years, electronic devices have been further reduced in size, weight, and functionality, and along with this, higher integration and miniaturization of wiring are rapidly progressing, and miniaturization of wiring is progressing. In addition, there is an increasing demand for a downsized package such as a so-called chip size package (CSP; Chip Size / Scale Package) that is almost the same size as a semiconductor chip. On the other hand, the wiring that can be formed with good yield by the subtractive method of forming the wiring by etching is about conductor width (L) / conductor gap (S) = 50 μm / 50 μm.

  In order to realize a finer conductor width / conductor gap = about 35 μm / 35 μm, in Patent Document 1, the two detachable peelable copper foils are laminated with a prepreg sandwiched between them and cured. A support substrate is prepared. Then, a plating resist is formed on the peelable copper foil, a wiring layer in which a conductor is formed to a necessary thickness by electrolytic metal plating is formed, and after removing the resist, an interlayer insulating resin layer is formed on the wiring layer. The wiring pattern is sequentially built up to form a multilayer structure.

  Then, the multilayer structure formed on both sides of the support substrate is separated by peeling the peelable copper foil, and the thin metal layer of the peelable copper foil remaining on the surface of the multilayer structure is removed by soft etching. A technique for manufacturing a multilayer wiring board having a very thin board thickness is disclosed.

JP 2005-101137 A

  In the technique of Patent Document 1, the peelable copper foil is bonded to the outside of the insulating resin material of the prepreg cured by laminating the peelable copper foil via the prepreg on the outside of the support substrate, and copper plating is performed on the peelable copper foil. Thus, a wiring pattern was formed, a plurality of interlayer insulating resin layers and wiring patterns were laminated thereon, and then the peelable copper foil was peeled off. Since the peelable copper foil layer is removed by etching, the wiring pattern formed on the layer and the surface of the interlayer insulating resin layer are exposed, so that the exposed wiring pattern is formed on the interlayer insulating resin layer. The structure is embedded and does not protrude from the surface.

  In the technique of Patent Document 1, since the multilayer wiring board is manufactured as described above, the wiring pattern on the surface of the peelable copper foil has a structure embedded in the insulating resin layer, and the metal protruding from the insulating resin layer. A convex electrode due to could not be formed. Therefore, on the surface of the multilayer wiring board on the peelable copper foil side, bumps of the IC chip are bonded on the convex electrodes, and an underfill resin is injected between the surface of the IC chip and the interlayer insulating resin layer to form the IC chip. It was difficult to perform flip-chip mounting to fix.

The problem of the present invention is to solve the above problems and to form a convex electrode protruding from the surface of the insulating resin layer, on which the IC chip can be flip-chip mounted on the surface of the peelable copper foil used for its production, It is to obtain a multilayer wiring board having a very thin plate thickness.

  In order to solve the above-mentioned problem, the present invention is a multilayer wiring board having a multilayer wiring structure in which a plurality of interlayer insulating resin layers and a plurality of wiring pattern layers are alternately stacked, and protrudes from the interlayer insulating resin layer. The convex terminal is connected to the upper bottom of the frustoconical via hole, the land is connected to the lower bottom of the frustoconical via hole, the land and the via hole are integrally formed, and the upper bottom of the via hole and the convex The multilayer wiring board is characterized in that a bonding interface exists between the terminals.

  The present invention is also the above multilayer wiring board, wherein the upper base of the frustoconical via hole has a smaller plane projection area than the lower base.

  The present invention is the above multilayer wiring board, wherein a surface of the convex terminal to be joined to the via hole is larger than a planar projection area of the upper bottom of the frustoconical via hole.

The present invention also provides a semi-cured insulating resin sheet stacked on the outer side of a support substrate, the outer surface of the semi-cured insulating resin sheet is smaller in size than the semi-cured insulating resin sheet, and has a plurality of metal layers on both sides. Laminating the metal foil of the multilayer structure formed by laminating such that the carrier copper foil layer is on the outside,
Laminating a first interlayer insulating resin layer on the outside of the multi-layer metal foil;
Forming a via hole pilot hole reaching the carrier copper foil layer of the metal foil of the multilayer structure by a laser beam for drilling from the outside of the interlayer insulating resin layer;
Forming a first via hole filled with the via hole pilot hole by copper plating and a land of the first via hole and a first wiring pattern outside the first interlayer insulating resin layer; and the first interlayer Forming a multilayer wiring structure by alternately laminating next interlayer insulating resin layers and wiring pattern layers outside the insulating resin layer and the first wiring pattern;
Separating the multilayer wiring structure including the carrier copper foil layer from the support substrate by peeling the metal foil of the multilayer structure;
And a step of forming a convex terminal pattern covering the first via hole at the position of the first via hole by etching the carrier copper foil layer.

  According to the method for manufacturing a multilayer wiring board of the present invention, the convex terminal 1 covers the connection portion between the via hole 32 and the via hole land 32b on the lower side (lower bottom side) of the via hole 32, and stress is concentrated on the connection portion. There is an effect to avoid doing. Further, the via hole land 32 b covers the connection boundary portion between the lower surface of the convex terminal 1 and the upper surface of the via hole 32 from below, so that stress concentrates on the connection boundary portion between the lower surface of the convex terminal 1 and the upper surface of the via hole 32. This has the effect of avoiding this. Thereby, there is an effect that the connection reliability between the via hole 32 and the convex terminal 1 can be increased.

It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 1). It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 2). It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 3). It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 4). It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 5). It is a fragmentary sectional view which shows embodiment of the manufacturing method of this invention (the 6). It is a fragmentary sectional view of the laminated substrate structure of the modification 3 of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 to 7 show an embodiment of a method for producing a multilayer wiring board according to the present invention in the order of steps.

Materials and structures used for the structure will be described below by taking an embodiment of the manufacturing method as an example.
(Support substrate)
First, as shown in FIG. 1A, the supporting substrate 10 is a substrate having a thickness of 0.04 mm to 0.4 mm, and has a copper foil 11 having a thickness of 18 μm on both sides, and an organic resin is made of glass, polyimide, liquid crystal, or the like. A copper clad laminate (for example, a size of 610 × 510 mm) made of a material impregnated in a reinforcing fiber is used.

  As the organic resin material constituting the support substrate 10, an organic resin mainly composed of epoxy, acrylic, urethane, epoxy acrylate, phenol epoxy, polyimide, polyamide, cyanate, and liquid crystal is used. it can. Alternatively, a substrate in which a filler made of silica, butyl organic material, calcium carbonate, or the like is included in the organic resin can be used.

(Copper foil roughening process for support substrate)
First, the surface of the copper foil 11 of the support substrate 10 is roughened by a soft etching process using an etchant such as perhydrosulfuric acid. Next, an alignment mark is formed in a pattern obtained by etching the copper foil 11 as an alignment mark for superimposing the metal foil 13 having a multilayer structure such as peelable copper foil on the surface of the support substrate 10.

(Modification 1)
As a first modification, the support substrate 10 is made of glass (blue plate, non-alkali glass, quartz) or metal (mainly stainless steel, iron, copper, titanium, tungsten, magnesium, aluminum, chromium, molybdenum, etc.). Can also be used.

(Lamination process of metal foil with multilayer structure)
Next, as shown in FIG. 1B, the support substrate 10 having a size of, for example, 610 × 510 mm is centered, and outside the support substrate 10, the size of the same size as the support substrate 10 in plan view is 610 × 510 mm. A semi-cured insulating resin sheet 12a made of a prepreg or a resin film is stacked, and a multilayered metal foil 13 having a size smaller than the semi-cured insulating resin sheet 12a and having a size smaller than 600 × 500 mm is stacked on the outside thereof. Then, the release film 20 is stacked on the outer side of the multi-layered metal foil 13, and the multi-layered metal foil 13 is stacked on the outer side of the support substrate 10 via the semi-cured insulating resin sheet 12a by a vacuum laminating press.

  The semi-cured insulating resin sheet 12a outside the support substrate 10 is cured into an insulating resin material 12 by a laminating process that is heated and pressurized by a vacuum laminating press apparatus, and the support substrate made of the support substrate 10 and the insulating resin material 12 is used. A laminated substrate 100 in which a multilayered metal foil 13 is integrated on the outer surface is manufactured.

(Semi-cured insulating resin sheet)
As the semi-cured insulating resin sheet 12a used here, a prepreg having a thickness of 0.04 mm to 0.4 mm (for example, a thickness of 0.07 mm) and impregnated with an organic resin is used as a semi-cured insulating resin. Used as a sheet 12a. The prepreg is preferably adjusted to be resin-rich. If necessary handling properties can be ensured, a semi-cured insulating resin sheet 12a made of a resin film not containing reinforcing fibers may be used.

As the organic resin material of the semi-cured insulating resin sheet 12a, epoxy resin, bismaleimide-triazine resin (hereinafter referred to as BT resin), polyimide resin, PPE resin, phenol resin, PTFE resin, silicon resin, polybutadiene resin, polyester Organic resins such as resins, melamine resins, urea resins, PPS resins, PPO resins, cyanate resins, and cyanate ester resins can be used.

  As the reinforcing fiber, glass fiber, aramid nonwoven fabric, aramid fiber, polyester fiber, polyamide fiber, liquid crystal fiber, or the like can be used. In addition, the organic resin of the semi-cured insulating resin sheet 12a can include a filler made of silica, butyl organic material, calcium carbonate, or the like.

(Multi-layered metal foil in which multiple metal layers are laminated in a peelable manner)
As the metal foil 13 having a multilayer structure in which a plurality of metal layers are detachably laminated, for example, a metal layer of a carrier copper foil layer 13b having a thickness of 10 μm to 35 μm (for example, 18 μm), and a thickness of 1 μm to 8 μm (for example, 5 μm). The peelable metal foil in which the metal layer of the ultrathin copper foil layer 13a is peelably laminated is used. As a means for releasably laminating the metal layers of the carrier copper foil layer 13b and the ultrathin copper foil layer 13a, a method in which the carrier copper foil layer 13b and the ultrathin copper foil layer 13a are releasably bonded with an adhesive or other releasable laminating methods are used.

  The metal foil 13 having this multilayer structure is stacked on the outside of the semi-cured insulating resin sheet 12a with the carrier copper foil layer 13b on the outside and the ultrathin copper foil layer 13a on the inside.

  As shown in FIG. 1B, a multilayer film metal is laminated on the outer side of the support substrate 10 via a semi-cured insulating resin sheet 12a by stacking a release film 20 on the outer side of the multi-layer metal foil 13 and using a vacuum lamination press. The foil 13 is laminated. The conditions of the vacuum lamination press are carried out by adjusting the heating rate, pressure, and pressurization timing according to the material of the semi-cured insulating resin sheet 12a to be applied. In the case of using a material having high fluidity, adjustment may be made to slow the temperature increase rate or pressurization timing.

  Then, after the semi-cured insulating resin sheet 12a is solidified to be the insulating resin material 12, the release film 20 is peeled off, and the outer periphery of the metal foil 13 having a multilayer structure of size 600 × 500 mm as shown in FIG. A thin resin thin film 15 connected to the insulating resin material 12 of the frame portion 14 is formed on the surface of the outer edge portion of the metal foil 13 having a multilayer structure. The laminated substrate 100 that is the supported substrate is manufactured. In this state, the inner surface, side wall, and outer end of the metal foil 13 having a multilayer structure are covered with an integral insulating resin material.

(Modification 3)
As a third modification, a thickness larger than that of the multi-layered metal foil 13 between the two multi-layered metal foils 13 without using the support substrate 10 and sufficient rigidity can be ensured after curing by lamination. And the laminated substrate 100 can also be manufactured by carrying out lamination | stacking processing by the vacuum lamination press on both sides of the semi-hardened insulation resin sheet 12a used as the insulating resin material 12 which has rigidity. The laminated substrate 100 has a structure in which an insulating resin material 12 is formed between two multi-layered metal foils 13 as shown in FIG. 7, and the size of the two multi-layered metal foils 13 is laminated. It is smaller than the size of the substrate 100. And the structure which the resin thin film 15 which is a part of insulating resin material 12 covers the edge part of the outer surface of the metal foil 13 of a multilayer structure is formed. Eventually, also in Modification 3, the inner surface of the multilayer metal foil 13 and the end of the outer surface of the multilayer metal foil 13 are covered with the insulating resin material 12 formed in an integral structure. The laminated substrate 100 can be manufactured.

(Release film)
In the step of FIG. 1 (b), the release film 20 sandwiched between the stainless steel press plate of the vacuum lamination press apparatus in the vacuum lamination press is a resin material such as polyphenylene sulfide or polyimide, stainless steel, brass or the like. A film made of a composite material combined with a metal material is used.

  As the heat shrinkage rate of the release film 20, the release film 20 having a heat shrinkage rate of 0.01 to 0.9% is used at the temperature at which the heat and pressure treatment is performed. Moreover, the release film 20 whose elongation reduction rate after the heat-pressing process of the release film 20 is 30% or less before the heat-pressing process is used.

  The form of the release film 20 is made of a resin material having a thickness of 10 to 200 μm. In particular, the surface of the release film 20 has an average roughness Ra specified in JIS B0601 of 300 nm to 1500 nm. A release film 20 subjected to (mat treatment) is used.

  In the step of FIG. 1 (b), the resin-rich semi-cured insulating resin sheet 12a is overlaid on the outside of the support substrate 10, the multilayered metal foil 13 is overlaid on the outside, and the average roughness Ra is on the outside. Are laminated using a vacuum laminating press apparatus that heats and presses the release film 20 that is roughened to a surface roughness of 300 nm or more and 1500 nm or less, sandwiched between press plates, and heated and pressed by the press plates. Manufacturing.

  At that time, due to the effect of the mat treatment on the surface of the release film 20, the insulating resin material 12 of the frame portion 14 and the surface of the outer edge portion of the metal foil 13 having a multilayer structure as shown in FIG. A thin thin resin film 15 is formed.

  The matting treatment of the surface of the release film 20, the resin rich degree of the semi-cured insulating resin sheet 12a, and the heating / pressurizing conditions of the vacuum lamination press are adjusted so that the resin thin film 15 is appropriately formed. Accordingly, the resin material of the semi-cured insulating resin sheet 12a that has been heated and pressurized appropriately flows out onto the outer edge portion of the multilayer metal foil 13, and onto the outer edge portion of the multilayer metal foil 13. The resin thin film 15 of the insulating resin material 12 has a thickness of 3 μm or less and a width in the range of 0.1 mm to 10 mm.

  As a result, the multilayer substrate 100 is formed such that the size of the metal foil 13 having a multilayer structure is smaller than the overall size of the multilayer substrate 100. Then, as shown in the partial cross-sectional view of FIG. 2 (c), the insulating resin material 12 of the frame portion 14 which is the outer side of the metal foil 13 having the multilayer structure is composed of the inner surface and the outer end portion of the metal foil 13 having the multilayer structure. The outer peripheral portion of the exposed surface of the metal foil 13 having a multilayer structure is integrally covered. Thereby, peeling of the layer of the metal foil 13 in the substrate manufacturing process using the laminated substrate can be effectively prevented.

  The resin thin film 15 of the multilayer substrate 100 is connected to the insulating resin material 12 of the frame portion 14, and the boundary line of the peeling interface between the ultrathin copper foil layer 13a and the carrier copper foil layer 13b of the metal foil 13 having a multilayer structure is formed. The insulating resin material 12 has an effect of being embedded and protected. Thereby, it is possible to prevent peeling of the boundary surface between the ultrathin copper foil layer 13a and the carrier copper foil layer 13b of the multi-layered metal foil 13 due to stress in the subsequent manufacturing process, and manufacture by peeling of the interface. This has the effect of preventing defects.

  In particular, by setting the width of the resin thin film 15 to 0.1 mm or more, there is an effect that the boundary line of the peeling interface of the metal foil having the multilayer structure is sufficiently protected, and thereby the multilayer in the subsequent manufacturing process of the substrate. There is an effect that it is possible to prevent a problem that the structured metal foil 13 is unexpectedly peeled off. On the other hand, if the width of the resin thin film 15 is larger than 10 mm, the area of the effective region in which the multi-layered metal foil 13 is not covered with the resin thin film 15 is narrowed and the product cost is increased. Preferably, the manufacturing conditions are adjusted so that the resin thin film 15 covers the multilayer metal foil 13 with a width of 0.5 μm or more and 5 mm or less.

On the surfaces of the resin thin film 15 and the insulating resin material 12 of the frame portion 14, the roughness of the matte release film 20 having an average roughness Ra of 300 nm to 1500 nm is transferred. Thereby, there is an effect that the adhesion force between the metal plating layer to be formed later and the surface of the resin thin film 15 and the surface of the insulating resin material 12 of the frame portion 14 can be increased. When Ra is smaller than 300 nm, the adhesive force expressed is weak, and the metal plating layer provided on the surface of the insulating resin material 12 peels during the process. Moreover, when Ra becomes larger than 1500 nm, the insulating resin material 12 which becomes a convex portion is easily detached, and this detached substance causes a decrease in yield during the process.

  Here, when the support substrate 10 having the copper foil 11 on both sides and the semi-cured insulating resin sheet 12a are laminated on the outer sides of the both sides, the laminate is laminated by sandwiching them between the metal foils 13 having a multilayer structure. When the substrate 100 is manufactured, the laminated substrate 100 has an effect of being reinforced with the copper foil 11. Also, the copper foil 11 matches the thermal expansion coefficient of the surface of the multilayer substrate 100 to the thermal expansion coefficient of copper, and later builds up the outer surface of the multilayer substrate 100 to form the copper wiring pattern 33 and the surface of the multilayer substrate 100. There is an effect that the difference in thermal expansion coefficient between the two is reduced, and the thermal stress generated at the interface between the multilayer substrate 100 and the wiring pattern 33 due to the heat treatment in the manufacturing process can be reduced.

(Interlayer insulating resin layer formation process)
Next, as a pretreatment for forming the interlayer insulating resin layer 31, the surface of the multilayered metal foil 13 is roughened by an etching process of intergranular corrosion, a blackening process by an oxidation-reduction process, or Roughening is performed by perhydrosulfuric acid based soft etching.

  Next, as shown in FIG. 2 (d), the interlayer insulating resin layer 31 is thermocompression-bonded on the multi-layered metal foil 13 by roll lamination or lamination press. For example, an epoxy resin having a thickness of 45 μm is roll laminated. When glass epoxy resin is used, copper foil of any thickness is stacked and thermocompression bonded with a lamination press.

  As a resin material of the interlayer insulating resin layer 31, epoxy resin, bismaleimide-triazine resin (hereinafter referred to as BT resin), polyimide resin, PPE resin, phenol resin, PTFE resin, silicon resin, polybutadiene resin, polyester resin, melamine resin Organic resins such as urea resin, PPS resin, PPO resin, cyanate resin, and cyanate ester resin can be used. In addition, these resins can be used alone, or a combination of resins such as mixing a plurality of resins or preparing a compound can be used. Furthermore, an interlayer insulating resin layer 31 in which a glass fiber reinforcing material is mixed into these materials can be used. As the reinforcing material, an aramid nonwoven fabric, an aramid fiber, or a polyester fiber can be used.

(Via hole and wiring pattern formation process)
Next, as shown in FIG. 3E, a via hole prepared hole 32a for interlayer connection is formed by a laser beam for drilling. When copper foil is used for thermocompression bonding of the interlayer insulating resin layer 31, as a pretreatment for forming the via hole prepared hole 32a, the entire copper foil is etched, or an opening for the via hole prepared hole 32a is formed in the copper foil. By performing the etching process to be formed or the surface treatment of the copper foil, the laser absorption of the copper foil in the via hole pilot hole 32a is improved, and the via hole pilot hole 32a is formed by a laser beam. The via hole prepared hole 32a is formed in a conical shape.

  Next, as shown in FIG. 3 (f), the wall surface of the via hole prepared hole 32a and the surface of the interlayer insulating resin layer 31 are subjected to electroless plating, and an electrolytic copper plating layer is formed on the outer side and filled with copper plating. A via hole 32 is formed. The via hole 32 is formed in a truncated cone shape when the support substrate side is on the upper side and the outer side of the substrate is on the lower side.

Next, a photosensitive plating resist film is formed on the surface of the electrolytic copper plating layer, exposed and developed to form an etching resist pattern, which is protected by the etching resist and etched into the electrolytic copper plating pattern. Next, the pattern of the etching resist is peeled to form via hole lands 32 b and wiring patterns 33 on the interlayer insulating resin layer 31 as shown in FIG.

  Then, the formation process of the interlayer insulation resin layer 34 by the same build-up method and the formation process of the via hole 35 and the wiring pattern are repeated on the wiring pattern 33 and the interlayer insulation resin layer 31 as shown in FIG. Then, a multilayer wiring structure 30 is formed on the multilayer substrate 100 by building up a plurality of interlayer insulating resin layers 31 and 34, via holes 32 and 35, and wiring patterns.

  Next, the surface of the multilayer wiring structure 30 is roughened with a microetching agent, and then a thick coating of an azole compound is formed to improve the solder resist adhesion. Next, a film of a photosensitive solder resist 36 is formed, exposed and developed, the pad portion is opened, and heat cured. When the adhesion between the multilayer wiring structure 30 and the solder resist 36 can be secured after the roughening treatment, the treatment with the azole compound may not be performed.

  Next, an etching resist of a desired size is pasted on the surface of the multilayer wiring structure 30, and the frame portion 14 is cut off by cutting the multilayer wiring structure 30 and the laminated substrate 100 along the cutting line 16 in FIG. A boundary line for peeling the multilayer metal foil 13 is exposed on the cut surface. Then, as shown in FIG. 5 (j), the carrier copper foil layer 13b is peeled from the ultrathin copper foil layer 13a of the metal foil 13 having a multilayer structure from the exposed peeling boundary line. The multilayer wiring structure 30 is separated from the multilayer substrate 100.

  Next, with respect to the multilayer wiring structure 30 thus separated, an etching resist pattern is formed on the surface of the carrier copper foil layer 13b of the multilayer wiring structure 30, and the carrier copper foil layer 13b is etched, whereby FIG. As shown in k), the multilayer wiring structure 30 formed by protruding the protruding terminals 1 from the interlayer insulating resin layer 31 is obtained. In addition, in order to match the required height of the convex terminals 1, panel plating may be performed before etching or half etching may be performed.

  As shown in FIG. 6, the shape of the convex terminal 1 is such that the height of the upper surface (upper bottom) of the frustoconical via hole 32, the height of the upper surface of the interlayer insulating resin layer 31, and the height of the lower surface of the convex terminal 1. The connection interface between the via hole 32 and the convex terminal 1 exists in a substantially coincident shape. On the other hand, on the lower side (lower side) of the via terminal 32, the inner side of the via hole 32 and the land 32 b of the via hole are integrally provided with a metal typified by copper, and the connection interface is located below the via hole 32. Has a configuration in which no connection interface exists.

  When the convex terminal 1 is in close contact with the lower surface of the interlayer insulating resin layer 31, the interlayer insulating resin layer 31 in the vicinity of the convex terminal 1 can be constrained by the convex terminal 1 and not deformed. Further, deformation around the connection interface existing on the upper surface of the via hole 32 in the region of the interlayer insulating resin layer 31 can be effectively reduced.

In particular, in a situation where stress that mainly generates a difference in thermal expansion coefficient is applied when components such as LSI are connected, deformation of the interlayer insulating resin layer 31 by the convex terminals 1 is suppressed above the via holes 32, and resin is suppressed below the via holes 32. A higher stress is concentrated on the upper side of the via hole 32 than in the constricted structure in the region where deformation is likely to occur. That is, if a connection interface exists below the via hole 32, the probability of causing breakage at the connection portion increases. In particular, the terminal connecting the LSI is smaller than the BGA or LGA terminal provided on the opposite surface, so that stress tends to concentrate, and the position of the via connection interface is important.

(Land plating)
Next, 3 μm or more of electroless Ni plating is formed on the opening portion of the solder resist 36 and the protruding terminal 1, and 0.03 μm or more of electroless Au plating is formed thereon. The electroless Au plating may be formed with a thickness of 1 μm or more. Furthermore, it is also possible to pre-coat solder thereon. Alternatively, electrolytic Ni plating may be formed at 3 μm or more in the solder resist opening, and electrolytic Au plating may be formed thereon at 0.5 μm or more. Furthermore, an organic rust preventive film may be formed in the solder resist opening in addition to the metal plating.
(Outline processing)
Next, the outer shape of the multilayer wiring structure 30 is processed with a dicer or the like and separated into individual multilayer wiring boards.

DESCRIPTION OF SYMBOLS 1 ... Convex terminal 10 ... Support substrate 11 ... Copper foil 12 ... Insulating resin material 12a ... Semi-hardened insulating resin sheet 13 ... Multi-layer metal foil 13a ... Ultra-thin copper Foil layer 13b ... carrier copper foil layer 14 ... frame 15 ... resin thin film 16 ... cutting line 20 ... release film 30 ... multilayer wiring structure 31, 34 ... interlayer insulation Resin layers 32, 35 ... via hole 32a ... via hole pilot hole 32b ... via hole land 33 ... wiring pattern 36 ... solder resist 100 ... laminated substrate

Claims (4)

  A multilayer wiring board having a multilayer wiring structure in which a plurality of interlayer insulating resin layers and a plurality of wiring pattern layers are alternately laminated, wherein a convex terminal protruding from the interlayer insulating resin layer has an upper base of a truncated cone-shaped via hole Is connected, and a land is connected to the lower bottom of the frustoconical via hole, the land and the via hole are integrally formed, and there is a bonding interface between the upper bottom of the via hole and the convex terminal. A multilayer wiring board characterized by comprising:   2. The multilayer wiring board according to claim 1, wherein, in the frustoconical via hole, an upper base has a smaller plane projection area than a lower base.   3. The multilayer wiring board according to claim 1, wherein a surface of the convex terminal to be joined to the via hole is larger than a planar projection area of an upper bottom of the frustoconical via hole. A semi-cured insulating resin sheet is stacked on the outside of the support substrate, and the outer surface of the semi-cured insulating resin sheet is smaller in size than the semi-cured insulating resin sheet, and a plurality of metal layers are laminated on both sides in a peelable manner. A step of laminating and laminating a multilayer metal foil with the carrier copper foil layer facing outside,
Laminating a first interlayer insulating resin layer on the outside of the multi-layer metal foil;
Forming a via hole pilot hole reaching the carrier copper foil layer of the metal foil of the multilayer structure by a laser beam for drilling from the outside of the interlayer insulating resin layer;
Forming a first via hole filled with the via hole pilot hole by copper plating and a land of the first via hole and a first wiring pattern outside the first interlayer insulating resin layer; and the first interlayer Forming a multilayer wiring structure by alternately laminating next interlayer insulating resin layers and wiring pattern layers outside the insulating resin layer and the first wiring pattern;
Separating the multilayer wiring structure including the carrier copper foil layer from the support substrate by peeling the metal foil of the multilayer structure;
Forming a pattern of convex terminals covering the first via hole at the position of the first via hole by etching the carrier copper foil layer.

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