JP5526746B2 - Multilayer substrate manufacturing method and supporting substrate - Google Patents

Description

  The present invention relates to a method for manufacturing a multilayer substrate having a very thin plate thickness for use in a semiconductor element mounting package.

  In recent years, electronic devices have been further reduced in size, weight, and functionality, and along with this, higher integration and miniaturization of wiring are rapidly progressing, and miniaturization of wiring is progressing. In addition, there is an increasing demand for a downsized package such as a so-called chip size package (CSP; Chip Size / Scale Package) that is almost the same size as a semiconductor chip. On the other hand, the wiring that can be formed with good yield by the subtractive method of forming the wiring by etching is about conductor width (L) / conductor gap (S) = 50 μm / 50 μm. When the wiring becomes finer conductor width / conductor gap = about 35 μm / 35 μm, a relatively thin electroless metal plating layer is formed on the surface of the substrate, and a plating resist is formed thereon. A semi-additive method is required in which the conductor is formed to a required thickness, and then the thin metal plating layer is removed by soft etching after the resist is peeled off. As a technology for that purpose, in Patent Document 1, two peelable peelable copper foils are faced to each other and laminated with a prepreg to create a support substrate, and an interlayer insulating resin layer and a wiring pattern are formed on both sides of the support substrate. Are sequentially built up to form a multilayer structure. And the technique which manufactures a multilayer board | substrate which has fine wiring and is very thin by peeling the peelable copper foil and isolate | separating the multilayer structure formed in both surfaces of the support substrate is disclosed.

JP 2005-101137 A

  However, in the technique of Patent Document 1, the peelable copper foil bonded to both surfaces of the support substrate is exposed at the end surface of the support substrate because the peeling line of the peelable copper foil is exposed on the end surface of the support substrate. There was a problem that the peeling interface peeled off during the production, resulting in a production failure. An object of the present invention is to prevent peeling of the peelable copper foil during the manufacturing due to stress in the manufacturing process of the multilayer substrate, and to improve the manufacturing yield of the multilayer substrate.

In order to solve the above problems, the present invention
A method for manufacturing a multilayer substrate, comprising at least the following steps a to e . a. On the surface of a copper clad laminate having copper foil on both sides, a peelable copper foil in which two layers of copper layers are in close contact and integrated with each other with an adhesive resin layer being smaller than the copper clad laminate. The process of forming the frame part of the said adhesive resin layer around the said peelable copper foil, and forming the support substrate which embedded the edge part of the said peelable copper foil in the said frame part by laminating | stacking.
b. Forming a plating base conductive layer on the entire surface of the support substrate including the surface of the peelable copper foil by electroless copper plating on both surfaces of the support substrate;
c. Forming a plating resist pattern on the support substrate, then pattern plating the first wiring pattern, and then peeling the plating resist pattern.
d. Forming a multilayer structure in which an interlayer insulating resin layer, a via hole, and a second wiring pattern are built up on the support substrate;
e. The peelable copper foil is peeled off and the multilayer structure is separated from the support substrate by cutting an edge of the peelable copper foil of the substrate formed by forming the multilayer structure on the support substrate and separating the frame portion. Process.
Further, the present invention is the above-described method for manufacturing a multilayer substrate, wherein the step c includes a step of forming an alignment mark on a frame portion of the adhesive resin layer of the support substrate, and the alignment on the support substrate. Manufacturing a multilayer substrate comprising the steps of forming a plating resist pattern in alignment with the mark, then pattern plating the first wiring pattern, and then stripping the plating resist pattern Is the method.

Further, the present invention is a support substrate having a multilayer structure on both sides,
The support substrate is on the surface of a copper clad laminate having copper foil on both sides,
An adhesive resin layer is provided on both sides of the copper-clad laminate,
Provided in a state embedded in the adhesive resin layer, having a peelable copper foil in which two layers of copper layers are in close contact and integrated,
The peelable copper foil is smaller in size than the copper-clad laminate and the adhesive resin layer, and a frame portion made of the adhesive resin layer is formed on the outer periphery of the peelable copper foil,
A plating base conductive layer formed by electroless copper plating on the entire surface including the frame portion made of the adhesive resin layer on the copper-clad laminate and the surface of the peelable copper foil
This is a support substrate.
In addition, the present invention is the support substrate according to the above-described instruction substrate, wherein an alignment mark is provided on a frame portion made of the adhesive resin layer.

  According to the method for manufacturing a multilayer substrate of the present invention, the boundary line of peelable copper foil is surrounded by an adhesive resin layer having a dimension larger than that of the peelable copper foil and embedded, so that the boundary line of peelable copper foil is adhesive. There is an effect that can be protected by the resin layer 12, and there is an effect that it is possible to prevent a manufacturing defect in which the peeling interface peels off during the manufacturing.

It is sectional drawing which shows embodiment of the manufacturing method of this invention. It is sectional drawing which shows embodiment of the manufacturing method of this invention. It is sectional drawing which shows embodiment of the manufacturing method of this invention. It is sectional drawing which shows embodiment of the manufacturing method of this invention. It is sectional drawing which shows embodiment of the manufacturing method of this invention. It is sectional drawing which shows embodiment of the manufacturing method of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 to 6 are cross-sectional views showing an embodiment of the method for manufacturing a multilayer wiring board according to the present invention in the order of steps.
(Copper foil roughening process for support substrate)
First, as shown in FIG. 1A, a glass epoxy copper-clad laminate having a thickness of 0.4 mm and a size of 610 × 510 mm having a copper foil 11 having a thickness of 18 μm on both sides is prepared as a support substrate 10. The surface of the foil 11 is roughened. The roughening treatment may be a sand blast treatment with an abrasive or a blackening treatment by oxidation-reduction treatment or a perhydrosulfuric acid based soft etching treatment.

(Peelable copper foil lamination process)
Next, as shown in FIG. 1B, a commercially available peelable copper foil 13 having a size smaller than the support substrate 10 (for example, 600 × 500 mm) (for example, an ultrathin copper foil 13b having a thickness of 3 μm or 5 μm and a thickness of 18 μm). Two-layer peelable copper foil MT18SD-H5 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) in which the carrier copper foil 13a is vacuum-adhered is supported via the adhesive resin layer 12 with the carrier copper foil inside. A support substrate 10 'as shown in FIG. 1C is formed on the substrate 10 by thermo-compression on both sides or one side by roll laminating or laminating press. For example, as the adhesive resin layer 12, an adhesive resin layer 12 prepared by adjusting a resin-rich prepreg having a size of 610 × 510 mm and a thickness of 70 μm, and a peelable copper foil 13 having a size of 600 × 500 mm are stacked thereon. The outer peripheral portion of the peelable copper foil 13 of size 600 × 500 mm on the support substrate 10 of size 610 × 510 mm is bonded to the outer periphery of the size 610 × 510 mm by thermocompression bonding with a vacuum laminating press with a reduced temperature rise rate. A support substrate 10 ′ surrounded and protected by the frame portion 14 is formed.

  Here, by using the adhesive resin layer 12 adjusted to be resin-rich, the difference between the height of the surface of the frame portion 14 of the support substrate 10 ′ and the height of the surface of the peelable copper foil 13 is adjusted within 1 μm. The surface matched to the same height can be formed, thereby exposing the boundary of the peelable copper foil 13a and the ultrathin copper foil 13b to the adhesive resin while exposing the surface of the peelable copper foil 13. The frame 12 of the layer 12 can be enclosed and embedded for protection. Thereby, it is possible to prevent peeling of the boundary surface of the peelable copper foil 13 between the carrier copper foil 13a and the ultrathin copper foil 13b due to stress in the subsequent manufacturing process, and it is possible to prevent manufacturing defects due to peeling of the interface. effective. Further, since the support substrate 10 ′ is formed on the support substrate 10 ′ in which the peelable copper foil 13 is bonded with the adhesive resin layer 12 on the support substrate 10 having the copper foil 11 on both sides, the effect of being reinforced with the copper foil 11 is achieved. There is. The copper foil 11 matches the thermal expansion coefficient of the surface of the support substrate 10 ′ with the thermal expansion coefficient of copper, and the copper wiring pattern 4 formed on the surface of the support substrate 10 ′ and the heat of the surface of the support substrate 10 ′. The difference in the expansion coefficient is reduced, and there is an effect that the thermal stress generated at the interface between the support substrate 10 ′ and the wiring pattern 4 due to the heat treatment in the manufacturing process can be reduced.

  As the resin material of the adhesive resin layer 12, epoxy resin, bismaleimide-triazine resin (hereinafter referred to as BT resin), polyimide resin, PPE resin, phenol resin, PTFE resin, silicon resin containing glass fiber reinforcing material, Organic resins such as polybutadiene resin, polyester resin, melamine resin, urea resin, PPS resin, and PPO resin can be used. Moreover, an aramid nonwoven fabric, an aramid fiber, and a polyester fiber can also be used for a reinforcing material besides glass fiber.

(Plating foundation conductive layer formation process)
Next, as shown in FIG. 2 (d), the surface of the ultrathin copper foil 13b of the peelable copper foil 13 and the adhesive resin layer exposed around the surface of the peelable copper foil 13 by electroless copper plating on both surfaces of the support substrate 10 '. The plating base conductive layer 1 having a thickness of 0.5 μm to 3 μm is formed on the entire surface of the frame portion 14 having a width of 12 mm. In this electroless copper plating process, a conductive layer is formed as a base of the electrolytic copper plating that forms the wiring pattern 4 next. However, the electroless copper plating process is omitted and the electroless copper plating 13 is directly applied to the peelable copper foil 13. The wiring pattern 4 may be formed by bringing an electrode for electrolytic copper plating into contact and electrolytic copper plating directly on the peelable copper foil 13.

(Wiring pattern formation process)
Next, as shown in FIG. 2E, the alignment mark 2 is formed by drilling the frame portion 14 of the adhesive resin layer 12 around the peelable copper foil 13 of the support substrate 10 ′. When forming the alignment mark 2, the hole of the alignment mark 2 is formed in the frame portion 14 of the adhesive resin layer 12 that is out of the area of the peelable copper foil 13. There is an effect that can be prevented from joining. Therefore, the formation of the alignment mark 2 has an effect of preventing the trouble that the peelable copper foil 13 is peeled off from the peeling boundary surface.

  Next, as shown in FIG. 2 (f), a photosensitive resist, for example, a dry film plating resist is attached to both surfaces of the support substrate 10 ′ by roll lamination, and the alignment mark 2 formed on the frame portion 14 of the substrate is patterned. The pattern of the exposure film is aligned, exposed and developed to form a pattern 3 of a reverse plating resist pattern of the wiring pattern 4 on both surfaces of the support substrate 10 '. That is, the plating resist pattern 3 is formed into a pattern having an opening in which the plating base conductive layer 1 is exposed at the wiring pattern 4 portion. Next, as shown in FIG. 2 (g), copper plating is applied to the surface of the plating base conductive layer 1 exposed at the wiring pattern portion by electroplating from the peelable copper foil 13 side to have a thickness of 15 μm. The wiring pattern 4 is formed by performing pattern plating for thickening. Next, as shown in FIG. 3H, the plating resist is peeled off and the wiring pattern 4 is formed on the peelable copper foil 13 of the support substrate 10 '.

(Interlayer insulating resin layer formation process)
Next, as a pretreatment for forming the interlayer insulating resin layer 5, the surface of the wiring pattern 4 is roughened as follows. That is, it is roughened with a microetching agent containing 2 mol or more of alkanolamine per mol of fatty acid carboxylic acid and containing a copper ion source and a halogen ion source, and then an azole compound and an organic acid are formed on the surface of the wiring pattern 4. A process for improving the adhesiveness of the resin at the time of forming an insulating resin layer, which will be described later, is carried out by bringing an aqueous solution containing the above into contact with each other to form a thick film of an azole compound on the surface of the wiring pattern 4. Since the microetching agent in this process has low corrosivity, it can be roughened without damaging the wiring pattern 4. Alternatively, as the surface roughening treatment of the copper wiring pattern 4, a blackening treatment by oxidation-reduction treatment or a perhydrosulfuric acid based soft etching treatment can be performed.

  Next, as shown in FIG. 3I, the interlayer insulating resin layer 5 is thermocompression-bonded on the support substrate 10 'and the wiring pattern 4 by roll lamination or lamination press. For example, an epoxy resin having a thickness of 45 μm is roll laminated. When glass epoxy resin is used, copper foil of any thickness is stacked and thermocompression bonded with a lamination press.

  As a resin material of the interlayer insulating resin layer 5, epoxy resin, bismaleimide-triazine resin (hereinafter referred to as BT resin), polyimide resin, PPE resin, phenol resin, PTFE resin, silicon resin, polybutadiene resin, polyester resin, melamine resin Organic resins such as urea resin, PPS resin, and PPO resin can be used. In addition, these resins can be used alone, or a combination of resins such as mixing a plurality of resins or preparing a compound can be used. Further, an interlayer insulating resin layer 5 in which a glass fiber reinforcing material is mixed with these materials can be used. As the reinforcing material, an aramid nonwoven fabric, an aramid fiber, or a polyester fiber can be used.

(Via hole and wiring pattern formation process)
When copper foil is used for thermocompression bonding of the interlayer insulating resin layer 5, as a pretreatment for forming the via hole prepared hole 6 by a laser method or photoetching method, the copper foil is etched on the entire surface, or the via hole forming portion is etched. Then, an opening is formed in the copper foil, or surface treatment of the copper foil is performed to improve the laser absorbability of the copper foil for removing the copper foil with a laser.

Next, as shown in FIG. 3J, via hole prepared holes 6 for interlayer connection are formed by a laser method or a photo etching method.
(Photo Etching Method 1)
When the interlayer insulating resin layer 5 is made of a photo-curing type photosensitive resin, a mask film having a pattern for shielding a predetermined via hole pilot hole 6 part is brought into close contact with the interlayer insulating resin layer 5 and exposed to ultraviolet rays. The exposed portion is developed and removed.
(Photo etching method 2)
When the interlayer insulating resin layer 5 is made of a photodegradable photosensitive resin, a mask film on which a pattern for shielding light other than the predetermined via hole pilot hole 6 part is closely attached to the interlayer insulating resin layer 5 and exposed with ultraviolet rays, A via hole prepared hole 6 is formed by a photoetching method for developing and removing the exposed portion.
(Laser method)
When the interlayer insulating resin layer 5 is made of a thermosetting resin, the via hole prepared hole 6 is formed by laser light. As the laser light, an ultraviolet laser such as a harmonic YAG laser or an excimer laser, or an infrared laser such as a carbon dioxide gas laser can be used. Thus, the infrared light region to the ultraviolet light region are used as the laser wavelength region. When the via hole pilot hole 6 is formed by laser light, a thin resin film may remain on the bottom of the via hole pilot hole 6, and in this case, desmear processing is performed. In the desmear treatment, the resin is swollen with a strong alkali, and then the resin is decomposed and removed using an oxidizing agent such as chromic acid or a permanganate aqueous solution. Alternatively, it may be removed by sandblasting or plasma treatment with an abrasive.

  After the via hole pilot hole 6 is formed in the interlayer insulating resin layer 5, the surface of the interlayer insulating resin layer 5 is roughened as necessary. In general, when a thermosetting resin or thermoplastic resin is used, wet processes such as surface roughening with an oxidizing agent such as an aqueous solution of chromic acid or permanganate, or dry processes such as plasma treatment or ashing treatment are performed. The process is valid.

Next, electroless plating is performed on the wall surface of the via hole prepared hole 6 and the surface of the interlayer insulating resin layer 5.
Next, a photosensitive resist, for example, a photosensitive plating resist film such as a dry film is attached to the surface of the interlayer insulating resin layer 5 whose surface has been electrolessly plated by roll lamination. By exposing and developing the photosensitive plating resist film, a pattern of a second plating resist having an opening in the via hole prepared hole 6 and the second wiring pattern 19 is formed. Next, the copper plating is thickened by performing electrolytic copper plating with a thickness of 15 μm on the opening of the second plating resist pattern. Next, the second plating resist is peeled off, and the electroless plating remaining on the interlayer insulating layer is removed by perhydrosulfuric acid-based flash etching or the like, as shown in FIG. A filled via hole 7 and a second wiring pattern are formed. A multilayer structure in which a plurality of interlayer insulating resin layers 5, via holes 7 and second wiring patterns are built up on the support substrate by repeating the interlayer insulating resin layer forming step and the via hole and wiring pattern forming step. 20 is formed.

  Next, as a pretreatment for forming the solder resist 8, the surface of the multilayer structure 20 is roughened as follows. That is, it is roughened with a microetching agent containing 2 moles or more of alkanolamine per mole of fatty acid carboxylic acid and containing a copper ion source and a halogen ion source, and then, on the surface of the multilayer structure 20, an azole compound and organic A treatment for improving the adhesiveness of the solder resist is performed by forming a thick film of an azole compound by contacting an aqueous solution containing an acid. Next, the photosensitive liquid solder resist 8 is applied to a thickness of about 20 μm by spray coating, roll coating, curtain coating, or screen method and dried, or the photosensitive dry film / solder resist 8 is applied by roll lamination. The solder resist 8 is exposed and developed to open the pad portion, and is cured by heating.

  Next, an etching resist having a desired size is pasted on the surface of the multilayer structure 20, and the frame portion 14 is separated by cutting the multilayer structure 20 and the support substrate 10 ′ along the cutting line 15 in FIG. The boundary line of the peelable copper foil 13 is exposed on the surface. Then, as shown in FIG. 5 (m), by peeling the ultrathin copper foil 13b from the carrier foil 13a of the peelable copper foil 13 from the exposed peeling boundary line, from the support substrate 10 ′ having a thickness of 0.4 mm. The multilayer structure 20 is separated.

  Next, the ultrathin copper foil 13b and the plating base conductive layer 1 are removed by using sulfuric acid-hydrogen peroxide soft etching to embed the wiring pattern embedded in the interlayer insulating resin layer 5 as shown in FIG. A multilayer substrate with 4 exposed is obtained.

(Land plating)
Next, as shown in FIG. 6 (o), a solder resist 9 having a pattern having an opening in the land portion of the wiring pattern 4 is printed on the exposed wiring pattern 4. Next, 3 μm or more of electroless Ni plating is formed on the land portions of the openings of the solder resists 9 and 8, and 0.03 μm or more of electroless Au plating is formed thereon. The electroless Au plating may be formed with a thickness of 1 μm or more. Furthermore, it is also possible to pre-coat solder thereon. Alternatively, electrolytic Ni plating may be formed at 3 μm or more in the solder resist opening, and electrolytic Au plating may be formed thereon at 0.5 μm or more. Furthermore, an organic rust preventive film may be formed in the solder resist opening in addition to the metal plating.
(Outline processing)
Next, the outer shape of the multilayer substrate is processed with a dicer or the like and separated into individual pieces.

DESCRIPTION OF SYMBOLS 1 ... Plating foundation conductive layer 2 ... Alignment mark 3 ... Plating resist pattern 4 ... Wiring pattern 5 ... Interlayer insulation resin layer 6 ... Via hole pilot hole 7 ... Via hole 8, DESCRIPTION OF SYMBOLS 9 ... Solder resist 10, 10 '... Support substrate 11 ... Copper foil 12 ... Adhesive resin layer 13 ... Peelable copper foil 13a ... Carrier foil 13b ... Ultra-thin copper foil 14 ... Frame part 15 ... Cutting line 20 ... Multi-layer structure

Claims (4)

A method for producing a multilayer substrate, comprising at least the following steps a to e .
a. On the surface of a copper clad laminate having copper foil on both sides, a peelable copper foil in which two layers of copper layers are in close contact and integrated with each other with an adhesive resin layer being smaller than the copper clad laminate. The process of forming the frame part of the said adhesive resin layer around the said peelable copper foil, and forming the support substrate which embedded the edge part of the said peelable copper foil in the said frame part by laminating | stacking.
b. Forming a plating base conductive layer on the entire surface of the support substrate including the surface of the peelable copper foil by electroless copper plating on both surfaces of the support substrate;
c. Forming a plating resist pattern on the support substrate, then pattern plating the first wiring pattern, and then peeling the plating resist pattern.
d. Forming a multilayer structure in which an interlayer insulating resin layer, a via hole, and a second wiring pattern are built up on the support substrate;
e. The peelable copper foil is peeled off and the multilayer structure is separated from the support substrate by cutting an edge of the peelable copper foil of the substrate formed by forming the multilayer structure on the support substrate and separating the frame portion. Process. 2. The method for manufacturing a multilayer substrate according to claim 1, wherein the step c includes a step of forming an alignment mark on a frame portion of the adhesive resin layer of the support substrate, and a step of forming the alignment mark on the support substrate. A method of manufacturing a multilayer substrate comprising the steps of: forming a plating resist pattern by aligning positions; then pattern plating a first wiring pattern; and then peeling the plating resist pattern. A support substrate having a multilayer structure on both sides,
The support substrate is on the surface of a copper clad laminate having copper foil on both sides,
An adhesive resin layer is provided on both sides of the copper-clad laminate,
Provided in a state embedded in the adhesive resin layer, having a peelable copper foil in which two layers of copper layers are in close contact and integrated,
The peelable copper foil is smaller in size than the copper-clad laminate and the adhesive resin layer, and a frame portion made of the adhesive resin layer is formed on the outer periphery of the peelable copper foil,
A plating base conductive layer formed by electroless copper plating on the entire surface including the frame portion made of the adhesive resin layer on the copper-clad laminate and the surface of the peelable copper foil
A support substrate. The support substrate according to claim 3, wherein an alignment mark is provided on a frame portion made of the adhesive resin layer.

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