JP2013030603A - Method of manufacturing wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring board capable of suppressing occurrence of unevenness of copper foil which becomes an external layer of the wiring board when manufacturing the wiring board by a coreless method using a support board.SOLUTION: A method of manufacturing a wiring board includes: a process in which a metal foil plated laminated plate, adhesion layers and multilayer metal foil to be a support board are constituted in this order, insulation layers and metal foil to be a part of a laminate are constituted on the multilayer metal foil in this order and they are heated and pressed in a lump to form the laminate laminated on the support board; a process in which the metal foil and other metal foil of the multilayer metal foil are physically peeled to separate the laminate with one metal foil of the multilayer metal foil from the support substrate; and a process in which an external layer circuit is formed by etching the one metal foil of the separated laminate.

Description

  The present invention relates to a method for manufacturing a wiring board on which electronic component elements are mounted.

  In recent years, electronic devices have been further reduced in size, weight, and functionality, and the wiring boards used for these have been required to have thinner wiring boards as well as multilayers and wiring miniaturization. Along with this, in the manufacturing process of the wiring board, it is necessary to handle a thinner wiring board. That is, conventionally, a wiring board for mounting a general electronic component element has been manufactured by a so-called build-up method, which is composed of an insulating resin layer and a wiring pattern on both sides of a thin wiring board serving as a core board. This is because it is a manufacturing method in which wiring layers are stacked to manufacture a wiring board, and therefore, in a stage where the number of wiring layers is small, it is necessary to proceed with the manufacturing process with a thin wiring board having a thickness of 0.1 mm or less, for example. Thin wiring boards are difficult to handle because they are prone to warpage due to dimensional fluctuations, breakage, breakage, etc. due to catching in the manufacturing apparatus during the manufacturing process. As a method for facilitating the handling of such a thin wiring board, a method of attaching a jig or a supporting board for the purpose of giving mechanical strength to each of the wiring boards can be considered. However, this method has a problem that the number of man-hours is greatly increased and the cost is increased.

  As a method for avoiding such a problem, as shown in FIGS. 8A and 8B, a support substrate 17 having a peelable copper foil 9 (an ultrathin copper foil with a carrier copper foil) on both sides is prepared. And after forming a wiring board (not shown) on the peelable copper foil 9 of both surfaces of this support substrate 17, the wiring board and the support substrate 17 are separated using the peeling action of the peelable copper foil 9 ( Patent Document 1) is disclosed. Further, as shown in FIGS. 9A and 9B, a metal-clad laminate 12 having copper foils 13 on both surfaces of the insulating layer 14 is prepared as a support substrate 17, and the copper foils 13 on both surfaces of the support substrate 17 are prepared. A small copper foil A19 is placed directly on top of each other, and an insulating layer 3 metal foil 20 is stacked on the copper foil A19 to form an interlayer connection and a conductor circuit to form a wiring board (not shown). After that, the method of separating the wiring substrate and the support substrate 17 by cutting the cut portion 24 by utilizing the fact that the region where the copper foil 13 and the copper foil A19 of the support substrate 17 are directly overlapped is not adhered ( Patent documents 2, 3) and the like are disclosed. Unlike the conventional build-up method, these manufacturing methods do not require a core substrate serving as a support substrate in the configuration of the manufactured wiring substrate itself. For this reason, such a manufacturing method is hereinafter referred to as a coreless construction method in the present invention.

  According to these coreless construction methods, in addition to the mechanical strength of the support substrate, the thickness of the wiring substrate is two, so even in the state of a thin wiring substrate with a small number of layers, the support substrate and the wiring Since the entire thickness including the substrate is increased and the rigidity is increased, it is possible to suppress breakage, breakage, and the like due to catching in the manufacturing facility. In addition, since the wiring substrate is formed in a symmetric configuration on both sides of the support substrate, even if warpage due to dimensional variation occurs in the manufacturing process, the stress due to the warpage is almost balanced on both sides of the support substrate. As a whole including the wiring board, warpage can be suppressed. Further, in the coreless construction methods of Patent Documents 2 and 3, the wiring layers are stacked only on one side of the copper foil A, instead of stacking the wiring layers on both sides of the core substrate that is the inner layer as in the conventional build-up method. . For this reason, since one conductor layer of the outermost layer of a wiring board can be comprised only with the copper foil A, it becomes advantageous for formation of a fine wiring pattern. In addition, if the wiring boards formed on both sides of the support board are viewed individually, the wiring layers are not stacked simultaneously in one laminating process on both sides of the core board as the inner layer as in the conventional build-up method. The wiring layers are stacked only on one side, but since two sheets are stacked in one stacking process, productivity equivalent to that of the conventional build-up method can be maintained.

Japanese Patent No. 4273895 JP 2009-252827 A JP 2010-080595 A

  On the other hand, as a wiring board for mounting electronic component elements, there is a use as a wiring board constituting a SAW (Surface Acoustic Wave) device. The vibration space formed in the gap between the active surface (vibration portion of the surface acoustic wave) of the SAW piezoelectric element flip-chip connected to the first layer wiring pattern on the surface of the wiring board becomes narrower (for example, about 10 μm). Tend to be designed to be For this reason, if the height difference of the surface of the first layer wiring pattern on the surface of the wiring board is large, there is a possibility that the wiring pattern and the active surface of the SAW piezoelectric element may come into contact with each other, and there is a problem that the function as a filter cannot be secured.

  In Patent Document 1, when preparing a support substrate having a peelable copper foil (ultra-thin copper foil with a carrier copper foil) on both sides, the peelable copper foil is configured on both sides of the prepreg and laminated by heating and pressurization. In order to secure the rigidity as the support substrate, it is necessary to use a prepreg having glass fibers, and thus the glass fibers tend to cause undulations in the peelable copper foil. After forming the wiring board on the peelable copper foil with this undulation by the build-up method, the wiring board and the supporting board are separated between the carrier copper foil and the ultra-thin copper foil of the peelable copper foil, In order to transfer the ultra-thin copper foil of the copper foil to the wiring board side, this ultra-thin copper foil has undulations. In a wiring board on which a SAW piezoelectric element is mounted, a method (copper foil etching method) in which an outer layer circuit is formed by directly etching a copper foil that has not been exposed to plating or the like is desirable in order to eliminate the cause of unevenness due to plating or the like. However, if an outer layer circuit is formed using ultrathin copper foil with undulations, the outer layer circuit on which the SAW piezoelectric element is mounted has a difference in height due to undulations, which affects the characteristics of the SAW filter. is there.

  In Patent Documents 2 and 3, as in Patent Document 1, in addition to the undulation of the copper foil caused by the glass fibers of the support substrate, there are the following problems. That is, in Patent Documents 2 and 3, as shown in FIGS. 9 (1) and 9 (2), a small copper foil A 19 is placed directly on the copper foil 13 on both sides of the support substrate 17. The outer periphery of the foil A19 has a level difference corresponding to the thickness of the copper foil A19. For this reason, if the thickness of the insulating layer 3 arranged on the copper foil A19 is thin, the gap 23 may be generated at this stepped portion. Therefore, it is conceivable to dispose a cushion material on the copper foil 20 so as to follow the insulating layer 3 even if there is a step. However, since the cushion material is soft, the copper foil is moved by the movement of the cushion material during lamination. A19 may cause a positional shift. For this reason, it is necessary to fill the step of the copper foil A by increasing the thickness of the insulating layer 3 disposed on the copper foil A19. In this case, however, the insulating layer 3 becomes thicker, so The glass fiber also causes undulation in the copper foil A19. Therefore, when the outer layer circuit is formed by etching the copper foil A, the height difference due to the undulation is generated in the outer layer circuit on which the SAW piezoelectric element is mounted, and there is a problem that affects the characteristics as the SAW filter.

  The present invention has been made in view of the above problems, and in the case of manufacturing a wiring board by a coreless method using a support substrate, a method of manufacturing a wiring board capable of suppressing a height difference due to undulation of an outer layer circuit of the wiring board. The purpose is to provide.

The present invention relates to the following.
(1) A metal foil-clad laminate, an adhesive layer, and a multilayer metal foil to be a support substrate are configured in this order, and an insulating layer and a metal foil that are part of the laminate are formed on the multilayer metal foil. After configuring in this order, the step of forming a laminate laminated on a support substrate by collectively heating and pressing, and by physically peeling the metal foils of the multilayer metal foil, A wiring board having a step of separating the laminate from the support substrate together with one metal foil of the multilayer metal foil, and a step of forming an outer layer circuit by etching one metal foil of the separated laminate. Manufacturing method.
(2) In the item (1), the multilayer metal foil is formed by laminating a plurality of metal foils via a release layer, and in the step of separating the laminate from the support substrate, A method of manufacturing a wiring board in which physical separation is performed between the remaining metal foil and the release layer.
(3) The method for manufacturing a wiring board according to item (1) or (2), wherein in the step of separating the laminate from the support substrate, the thickness of one metal foil remaining on the laminate side is 9 to 35 μm.
(4) The wiring board according to any one of items (1) to (3), wherein the thickness of one metal foil remaining on the laminate side is greater than the thickness of the other metal foil remaining on the support board side Manufacturing method.
(5) In any one of items (1) to (4), after the step of forming the laminated body bonded on the support substrate, before the step of separating the laminated body from the support substrate, The manufacturing method of the wiring board which has the process of providing the insulating layer of a desired number of layers, a conductor circuit, and interlayer connection.

  ADVANTAGE OF THE INVENTION According to this invention, when producing a wiring board by the coreless construction method using a support substrate, the manufacturing method of the wiring board which can suppress the height difference by the wave | undulation of the outer layer circuit of a wiring board can be provided.

It is sectional drawing of the multilayer metal foil used for this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the wiring board of this invention. It is a flowchart showing a part of manufacturing method of the conventional wiring board. It is a flowchart showing a part of manufacturing method of the other conventional wiring board.

  An example of a method for manufacturing a wiring board according to the present invention will be described below with reference to FIGS.

  First, as shown in FIG. 1, a multilayer metal foil 9 is prepared. The multi-layer metal foil 9 is a multi-layer metal foil 9 having two or more metal foils (for example, the first metal foil 10 and the second metal foil 11), and is between at least one place (for example, the first metal foil 10). A material that is physically peelable between the metal foil 10 and the second metal foil 11 is used. Between the 1st metal foil 10 and the 2nd metal foil 11, the peeling layer 16 for making both physically peelable and stabilizing the peeling strength may be formed. As such a composite metal foil 9, a commercially available ultra-thin copper foil with a carrier copper foil in which a metal foil that is thinner and physically peelable is formed on a relatively thick metal foil that becomes a carrier is used. However, in the present invention, as conventionally used, the thick carrier copper foil is necessarily the second metal foil 11 (support substrate 17 side), and the thin ultrathin copper foil is the first metal foil 10 (wiring substrate 1). On the contrary, the thick carrier copper foil is used as the first metal foil 10 (wiring board 1 side), and the thin ultra-thin copper foil is used as the second metal foil 11 (supporting board 17 side). Also good. That is, among the ultra-thin copper foils with carrier copper foil, the copper foil having the necessary thickness as the outer layer circuit 2 of the wiring board 1 may be used for the first metal foil 10 (wiring board 1 side).

  The first metal foil 10 serves as the outer layer circuit 2 of the wiring substrate 1 formed on the support substrate 17. There is no particular limitation as long as the circuit can be processed by etching and functions as a conductor circuit of the wiring board 1, but in terms of versatility and handleability, the material is preferably copper foil or aluminum foil. From the point of fine circuit formation by 1 to 70 μm can be used as the thickness. From the balance of strength as the outer layer circuit 2 and fine circuit formability, 9 to 35 μm is particularly preferable. Moreover, between the 1st metal foil 10 and the 2nd metal foil 11, the peeling layer 16 for making both physically peelable and stabilizing the peeling strength is provided. As the release layer 16, it is preferable that the peel strength is stabilized even when the heating and pressurization at the time of lamination with the insulating layer 3 are performed a plurality of times. As such a release layer 16, a metal oxide layer and an organic agent layer disclosed in JP-A-2003-181970 are formed, or Cu-Ni-Mo disclosed in JP-A-2003-094553. The thing which consists of alloys is mentioned. In addition, when this peeling layer 16 peels physically between the 1st metal foil 10 and the 2nd metal foil 11, it peels in the state adhering to the 2nd metal foil 11 side (support substrate 17 side). However, it is desirable that the surface does not remain on the surface of the first metal foil 10 side (wiring substrate 1 side).

  The second metal foil 11 is positioned on the side laminated with the insulating layer 14 when the multilayer metal foil 9 is laminated with the insulating layer 14 to form the support substrate 17. It can be physically peeled between. When laminated with the adhesive layer 15 of the support substrate 17, the material and the thickness are not particularly limited as long as they have adhesiveness with the adhesive layer 15. However, in terms of versatility and handleability, the material is copper foil. Or aluminum foil is preferable, and a thickness of 1 to 70 μm can be used. In addition, in order to stabilize the peel strength between the first metal foil 10, it is preferable to provide the release layer 16 as described above.

  Next, as shown in FIGS. 2 (1) and 2 (2), a metal foil-clad laminate 12, an adhesive layer 15 and a multilayer metal foil 9 to be a support substrate 17 are configured in this order, and the multilayer metal After the insulating layer 3 and the metal foil 20 that are part of the laminate 22 are configured in this order on the foil 9, the laminate 22 laminated on the support substrate 17 is collectively heated and pressed. Form. As the metal foil-clad laminate 12, those prepared in advance may be used, or the insulating layer 14 and the metal foil 13 for forming the metal foil-clad laminate 12 are formed, and the adhesive layer 15 described above is formed thereon. Other members may be configured and heated and pressed together with these other members. In the laminate 22 laminated on the support substrate 17 formed in this way, since the support substrate 17 has the metal foil-clad laminate 12, the insulating layer 14 and the metal foil 13 of the metal foil-clad laminate 12 are formed. Both can ensure rigidity. Moreover, since the composite metal foil 9 constituting a part of the laminate 22 is not directly disposed on the metal foil 13 of the metal foil-clad laminate 12, but is bonded through the adhesive layer 15. Even if the metal foil 13 of the metal foil-clad laminate 12 has a swell due to the glass fiber of the insulating layer 14, the adhesive layer 15 absorbs this swell, so that the transfer of the swell to the composite metal foil 9 is suppressed. can do.

  The support substrate 17 serves as a support when the wiring substrate 1 is manufactured using the multilayer metal foil 9. By ensuring rigidity, workability is improved and damage during handling is prevented. Its main role is to prevent and improve yield. For this reason, the insulating layer 14 preferably has a reinforcing material such as glass fiber. For example, a prepreg such as glass epoxy or glass polyimide is overlapped with the metal foil 13 and heated and pressurized using a hot press or the like. Can be formed by stacking and integrating.

  The adhesive layer 15 is for bonding the metal foil-clad laminate 12 and the multilayer metal foil 9 and swells due to reinforcing fibers or the like in the insulating layer 14 raised on the surface of the metal foil 13 of the metal foil-clad laminate 12. It has the effect | action which absorbs. As the adhesive layer 15, those used as the insulating layer of the wiring substrate 1 can be used, but those having no reinforcing fiber are desirable in terms of swell cushioning performance.

  Next, as shown in FIGS. 3 (3) and 3 (4), an interlayer connection hole 21 is formed, and an interlayer connection 5 and an inner layer circuit 6 are formed. The interlayer connection 5 can be formed, for example, by forming the interlayer connection hole 21 by using a so-called conformal method and then plating the interlayer connection hole 21. In this plating, electroless copper plating, electrolytic copper plating, filled via plating, or the like can be used as the thick plating after thin electroless copper plating is performed as the base plating. In order to reduce the thickness of the conductor layer to be etched and facilitate the formation of a fine circuit, after performing thin base plating on the metal foil 20 and the interlayer connection hole 21, a plating resist is formed, It is desirable to perform thick pattern plating (not shown) by filled via plating. The inner layer circuit 6 can be formed, for example, by plating the interlayer connection hole 21 and then removing an unnecessary portion of the conductor layer by etching.

  Next, as shown in FIGS. 4 (5), (6) and FIGS. 5 (7), (8), the insulating layer 3 and the metal foil 20 are further formed on the inner layer circuit 6 and the interlayer connection 5, In the same manner as in FIGS. 3 (3) and 3 (4), the inner layer circuit 6, the interlayer connection 5, and the pattern plating 18 serving as the outer layer circuit are formed so as to have a desired number of layers.

  Next, as shown in FIG. 6 (9), the first metal foil is physically peeled between the first metal foil 10 and the second metal foil 11 of the multilayer metal foil to thereby form the first metal foil. 10, the laminate 22 is separated from the support substrate 17.

  Next, as shown in FIGS. 7 (10) and (11), an etching resist is formed on the first metal foil 10 of the separated laminate 22, and the outer layer circuit is formed by circuit processing by copper foil etching. 2 is formed. By etching the entire surface of the laminated body 22 on which the pattern plating 18 is performed, the conductive layer disappears in the thin portion and the insulating layer 3 is exposed, and only the portion on which the pattern plating 18 is performed is the outer layer circuit. 7 7 (10) to (12) show only the lower part of the stacked body 22 separated as shown in FIG. 6 (9). As a result, in the outer layer circuit 2 formed by etching the metal foil 10, the height difference due to the undulation is suppressed, and the influence of the undulation on the characteristics of the SAW piezoelectric element can be reduced.

  Next, as shown in FIG. 7 (12), a solder resist 4 and a protective plating 8 may be formed as necessary. As the protective plating 8, nickel plating and gold plating used as the protective plating 8 for the connection terminals of the wiring board 1 are desirable.

  Examples of the present invention will be described below, but the present invention is not limited to the examples.

  First, as shown in FIG. 1, a peelable copper foil FD-P9 / 18 (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) is prepared as a multilayer metal foil 9 having a first metal foil 10 and a second metal foil 11. did. The first metal foil 10 is a 18 μm copper foil, and the second metal foil 11 is a 9 μm ultrathin copper foil. Physical separation is possible between the first metal foil 10 and the second metal foil 11.

  Next, as shown in FIGS. 2 (1) and 2 (2), a metal foil-clad laminate 12, an adhesive layer 15 and a multilayer metal foil 9 to be a support substrate 17 are configured in this order, and the multilayer metal After the insulating layer 3 and the metal foil 20 that are part of the laminate 22 are configured in this order on the foil 9, the laminate 22 laminated on the support substrate 17 is collectively heated and pressed. Formed. In addition, as the metal foil-clad laminate 12, MCL-E-679 (manufactured by Hitachi Chemical Co., Ltd., trade name), plate thickness of 0.2 mm, copper foil thickness of 18 μm, 500 mm × 600 mm, and adhesive layer are used. No. 15, AS-2600 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an epoxy adhesive sheet having no glass fiber, and a thickness of 25 μm were used.

  Next, as shown in FIGS. 3 (3) and (4), an interlayer connection 5 and an inner layer circuit 6 were formed. The interlayer connection 5 was formed by forming the interlayer connection hole 21 using a conformal method and then plating the interior of the interlayer connection hole 21. In this plating, thin electroless copper plating was performed as a base plating, a photosensitive plating resist was formed, and thick pattern plating was performed by copper sulfate electroplating. Thereafter, the inner layer circuit 6 was formed by removing the unnecessary copper foil 20 by etching.

  Next, as shown in FIGS. 4 (5), (6) and FIGS. 5 (7), (8), the insulating layer 3 and the copper foil 20 are further formed on the inner layer circuit 6 and the interlayer connection 5, The inner layer circuit 6, the interlayer connection 5, and the pattern plating 18 to be the outer layer circuit were formed to form a laminate 22 having four conductive layers.

  Next, as shown in FIG. 6 (9), between the first metal foil 10 and the second metal foil 11 of the multilayer metal foil 9, the laminated body 22 is physically separated from the support substrate 17 together with the first metal foil 10. Peeled off and separated.

  Next, as shown in FIGS. 7 (10) and (11), the first metal foil 10 of the separated laminate 22 was processed by copper foil etching to form the outer layer circuit 2. At the same time, the outer layer circuit 7 was formed leaving the pattern plating 18 portion.

  Next, as shown in FIG. 7 (12), a photosensitive solder resist 4 was formed, and then, as the protective plating 8, electroless nickel plating and electroless gold plating were performed to form the wiring board 1.

(Comparative Example 1)
As shown in FIGS. 8A and 8B, when the support substrate 17 is formed, the multilayer metal foil 9 is directly arranged on the insulating layer 14, and the laminate is formed on the multilayer metal foil 9. After the insulating layer 3 and the metal foil 20 that are a part of the structure 22 were configured in this order, the laminated body 22 laminated on the support substrate 17 was formed by heating and pressing all at once. As the insulating layer 3, two pieces of GEN-679N (trade name, manufactured by Hitachi Chemical Co., Ltd.) and a nominal thickness of 60 μm were used. That is, the support substrate 17 is formed by disposing the multilayer metal foil 9 directly on the insulating layer 14 and without using a metal foil-clad laminate or an adhesive layer. It is the same.

(Comparative Example 2)
As shown in FIGS. 9A and 9B, a metal-clad laminate 12 having copper foils 13 on both sides of the insulating layer 14 is prepared as a support substrate 17, and the copper foils 13 on both sides of the support substrate 17 are formed on the support substrate 17. A small copper foil A19 is directly stacked, and the insulating layer 3 and the metal foil 20 are stacked on the copper foil A19. A laminated body 22 was formed. In addition, as the metal foil-clad laminate 12, MCL-E-679 (manufactured by Hitachi Chemical Co., Ltd., trade name), a plate thickness of 0.4 mm and a copper foil thickness of 18 μm was used, and as the copper foil A19, EC- M3-VLP-23 (Furukawa Circuit Foil, product name) was used. As the insulating layer 3, GEN-679N (manufactured by Hitachi Chemical Co., Ltd., trade name) having a nominal thickness of 60 μm was used.

  In Table 1, after separating the laminated body produced by the method of Example, Comparative Example 1 and Comparative Example 2 from the support substrate, the outer layer circuit surface when the outer layer circuit is formed by copper foil etching to form a wiring substrate ( The results of measuring the height difference of the first metal foil in Example and Comparative Example 1 and the copper foil A19) in Comparative Example 2 are shown. The outer layer circuit is formed by forming several tens of flip chip terminals for flip chip connection of SAW piezoelectric elements per piece (10 mm × 10 mm), and a laminate having a size of 500 mm × 600 mm. In total, about 2000 pieces are arranged. Select one piece for each area that is divided into 9 parts by dividing the whole laminate into 3 parts vertically and horizontally, and select 6 flip chip terminals for each piece, and measure the height based on the insulating layer. did. The height of the reference insulating layer was the surface of the insulating layer in the vicinity of the flip chip terminal whose height is to be measured. In addition, the height difference is evaluated by calculating the height difference between the highest and lowest for each piece, and determining the maximum, minimum, and average values for the entire laminate of the height difference for each piece. It was. The height difference was measured using a laser focus displacement meter LT-8010 (manufactured by KEYENCE, trade name) at the center of the flip chip terminal.

  As shown in Table 1, in the example, the swell (height difference) of the flip chip terminal which is the outer layer circuit is 1.94 μm on the average, while Comparative Example 1 has the average of 5.79 μm, and Comparative Example 2 has 6 It was 0.81 μm, and it was confirmed that the swell could be suppressed in the example as compared with Comparative Examples 1 and 2.

1: Wiring board 2: Outer layer circuit 3: Insulating layer 4: Solder resist 5: Interlayer connection 6: Inner layer circuit or conductor circuit 7: Outer layer circuit or conductor circuit 8: Protective plating 9: Multi-layer metal foil or peelable copper foil or carrier Ultrathin copper foil with copper foil 10: first metal foil or one metal foil 11: second metal foil or the other metal foil 12: metal foil-clad laminate 13: metal foil or copper (of metal foil-clad laminate) Foil 14: Insulating layer 15 (of metal foil-clad laminate) 15: Adhesive layer 16: Release layer 17: Support substrate or support substrate material 18: Pattern plating 19: Copper foil A
20: Metal foil (copper) or copper foil 21: Interlayer connection hole 22: Laminate or laminate material 23: Air gap 24: Cut location

Claims (5)

A metal foil-clad laminate, a bonding layer, and a multilayer metal foil that serve as a support substrate are configured in this order, and an insulating layer and a metal foil that are part of the laminate are formed in this order on the multilayer metal foil. After forming, a step of forming a laminated body laminated on the support substrate by collectively heating and pressing; and
Step of separating the laminate from the support substrate together with one metal foil of the multilayer metal foil by physically peeling the metal foils of the multilayer metal foil,
Etching one metal foil of the separated laminate to form an outer layer circuit;
A method of manufacturing a wiring board having In claim 1,
The multilayer metal foil is formed by laminating a plurality of metal foils via a release layer, and in the step of separating the laminate from the support substrate, one metal foil and the release layer remaining on the laminate side A method of manufacturing a wiring board that physically peels between. In claim 1 or 2,
In the step of separating the laminate from the support substrate, a method of manufacturing a wiring substrate in which the thickness of one metal foil remaining on the laminate is 9 to 35 μm. In any one of Claim 1 to 3,
A method of manufacturing a wiring board in which the thickness of one metal foil in which the multilayer metal foil remains on the laminate side is thicker than the thickness of the other metal foil on the support substrate side. In any one of Claims 1-4,
After the step of forming the laminated body bonded on the support substrate, and before the step of separating the laminate from the support substrate, the laminate includes the desired number of insulating layers and conductor circuits, and interlayer connections. A method for manufacturing a wiring board, comprising the step of providing

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