JP2011124272A - 半導体装置及びその製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 239000012535 impurity Substances 0.000 claims abstract description 55
- 238000009792 diffusion process Methods 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims description 30
- 230000005669 field effect Effects 0.000 claims description 18
- 238000005468 ion implantation Methods 0.000 claims description 14
- 238000002955 isolation Methods 0.000 claims description 13
- 238000009751 slip forming Methods 0.000 claims 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 239000000243 solution Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
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Abstract
【解決手段】この製造方法は、アクティブ領域11を横断しゲート電極10Aよりも長さが短いゲート電極10Bを形成する工程と、ゲート電極10A,10Bをマスクとして、アクティブ領域11に不純物を斜めイオン注入することにより、ゲート電極10Aのゲート長方向両側の領域に互いに連続しない不純物拡散領域20a,20bを形成するとともに、ゲート電極10Bのゲート長方向両側の一方の領域から他方の領域に亘って連続する不純物拡散領域20g,20hを形成する斜めイオン注入工程とを含む。
【選択図】図4
Description
Claims (6)
- エンハンスメント型電界効果トランジスタとディプレッション型電界効果トランジスタとが半導体基板上に集積された半導体装置の製造方法であって、
前記半導体基板において素子分離領域に囲まれたアクティブ領域を形成する工程と、
前記アクティブ領域を当該アクティブ領域の幅方向に横断する第1のゲート電極を前記半導体基板の主面上に形成するとともに、前記アクティブ領域を前記幅方向に横断し且つ前記第1のゲート電極よりも前記幅方向の長さが短い第2のゲート電極を前記主面上に形成する工程と、
前記第1及び第2のゲート電極をマスクとして、前記半導体基板の主面の法線に対して斜め方向から前記アクティブ領域に不純物をイオン注入することにより、前記第1のゲート電極のゲート長方向両側の領域に互いに連続しない第1及び第2の不純物拡散領域を形成するとともに、前記第2のゲート電極のゲート長方向両側の一方の領域から他方の領域に亘って連続する第3の不純物拡散領域を形成する斜めイオン注入工程と、
前記アクティブ領域における前記第1のゲート電極のゲート長方向両側に第1ソース領域及び第1ドレイン領域を形成するとともに、前記アクティブ領域における前記第2のゲート電極のゲート長方向両側に第2ソース領域及び第2ドレイン領域を形成する工程と
を含むことを特徴とする半導体装置の製造方法。 - 請求項1に記載の半導体装置の製造方法であって、
前記斜めイオン注入工程は、
前記アクティブ領域における前記第1のゲート電極のゲート長方向両側の領域に前記ゲート長方向から斜めに前記不純物をイオン注入して前記第1及び第2の不純物拡散領域を形成する工程と、
前記アクティブ領域における前記第2のゲート電極の直下の領域に前記幅方向から斜めに前記不純物をイオン注入して前記アクティブ領域の前記幅方向の側面近傍に局在する不純物拡散領域を前記第3の不純物拡散領域として形成する工程と
を含むことを特徴とする半導体装置の製造方法。 - 請求項1または2に記載の半導体装置の製造方法であって、
前記第1のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、前記第2のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さよりも短く、
前記第1のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、0.3μm以上であり、
前記第2のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、0.2μm以下であり、
前記斜めイオン注入工程では、前記不純物は、前記法線に対して30°から60°の範囲内の角度でイオン注入される
ことを特徴とする半導体装置の製造方法。 - 半導体基板において素子分離領域に囲まれたアクティブ領域と、
前記アクティブ領域に形成されたエンハンスメント型電界効果トランジスタと、
前記アクティブ領域に形成されたディプレッション型電界効果トランジスタと
を備え、
前記エンハンスメント型電界効果トランジスタは、
前記アクティブ領域を当該アクティブ領域の幅方向に横断するように前記半導体基板の主面上に形成された第1のゲート電極と、
前記第1のゲート電極の直下にあり、且つ前記アクティブ領域における前記第1のゲート電極のゲート長方向両側の領域にそれぞれ形成された互いに連続しない第1及び第2の不純物拡散領域と、
前記アクティブ領域における前記第1のゲート電極のゲート長方向両側にそれぞれ形成された第1ソース領域及び第1ドレイン領域とを含み、
前記ディプレッション型電界効果トランジスタは、
前記アクティブ領域を前記幅方向に横断するように前記主面上に形成され、前記第1のゲート電極よりも前記幅方向の長さが短い第2のゲート電極と、
前記第2のゲート電極の直下にあり、前記アクティブ領域における前記第2のゲート電極のゲート長方向両側の一方の領域から他方の領域に亘って連続的に形成された第3の不純物拡散領域と、
前記アクティブ領域における前記第2のゲート電極のゲート長方向両側に形成された第2ソース領域及び第2ドレイン領域とを含む
ことを特徴とする半導体装置。 - 請求項4に記載の半導体装置であって、前記第3の不純物拡散領域は、前記アクティブ領域の前記幅方向の側面近傍に局在していることを特徴とする半導体装置。
- 請求項4または5に記載の半導体装置であって、
前記第1のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、前記第2のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さよりも短く、
前記第1のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、0.3μm以上であり、
前記第2のゲート電極の前記アクティブ領域の端から前記幅方向に突出する長さは、0.2μm以下である
ことを特徴とする半導体装置。
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JP2009278559A JP5525249B2 (ja) | 2009-12-08 | 2009-12-08 | 半導体装置及びその製造方法 |
US12/915,084 US20110133291A1 (en) | 2009-12-08 | 2010-10-29 | Semiconductor device and method of fabricating same |
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03236274A (ja) * | 1990-02-14 | 1991-10-22 | Toshiba Corp | 半導体集積回路装置 |
JPH08306796A (ja) * | 1995-04-28 | 1996-11-22 | Nippon Steel Corp | 半導体装置 |
JPH10336014A (ja) * | 1997-06-04 | 1998-12-18 | Murata Mfg Co Ltd | 論理回路 |
JP2000260886A (ja) * | 1999-03-11 | 2000-09-22 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
JP2003152099A (ja) * | 2001-11-19 | 2003-05-23 | Fuji Electric Co Ltd | 半導体集積回路装置 |
JP2007335756A (ja) * | 2006-06-16 | 2007-12-27 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
WO2008114341A1 (ja) * | 2007-03-16 | 2008-09-25 | Fujitsu Microelectronics Limited | 半導体装置およびその製造方法 |
-
2009
- 2009-12-08 JP JP2009278559A patent/JP5525249B2/ja not_active Expired - Fee Related
-
2010
- 2010-10-29 US US12/915,084 patent/US20110133291A1/en not_active Abandoned
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03236274A (ja) * | 1990-02-14 | 1991-10-22 | Toshiba Corp | 半導体集積回路装置 |
JPH08306796A (ja) * | 1995-04-28 | 1996-11-22 | Nippon Steel Corp | 半導体装置 |
JPH10336014A (ja) * | 1997-06-04 | 1998-12-18 | Murata Mfg Co Ltd | 論理回路 |
JP2000260886A (ja) * | 1999-03-11 | 2000-09-22 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
JP2003152099A (ja) * | 2001-11-19 | 2003-05-23 | Fuji Electric Co Ltd | 半導体集積回路装置 |
JP2007335756A (ja) * | 2006-06-16 | 2007-12-27 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
WO2008114341A1 (ja) * | 2007-03-16 | 2008-09-25 | Fujitsu Microelectronics Limited | 半導体装置およびその製造方法 |
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