JP2011071171A - 半導体装置 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 73
- 239000010410 layer Substances 0.000 claims description 49
- 239000012535 impurity Substances 0.000 claims description 35
- 230000015556 catabolic process Effects 0.000 claims description 24
- 239000002344 surface layer Substances 0.000 claims description 4
- 230000005669 field effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 238000009751 slip forming Methods 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
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Abstract
【解決手段】本発明の半導体装置は、第2導電型の第1のソースコンタクト領域21と第1導電型のバックゲートコンタクト領域22とを有する第1のソース部S1と、第2導電型の第2のソースコンタクト領域24を有する第2のソース部S2と、第2導電型のドレインコンタクト領域15と、第1のソースコンタクト領域21側に形成された第2導電型の第1のドリフト領域16と、第2のソースコンタクト領域24側に形成された第2導電型の第2のドリフト領域17とを有するドレイン部Dと、を備え、第2のドリフト領域17の方が第1のドリフト領域16よりもチャネル長方向の長さが長い。
【選択図】図1
Description
図1は、本発明の第1実施形態に係る半導体装置における主要要素の平面レイアウトを示す模式図である。図2は、図1におけるA−A’断面に対応する模式断面図である。本実施形態に係る半導体装置は、ゲートオン時、基板表面に形成されたドレイン領域とソース領域との間を結ぶ横方向に主電流が流れる横型半導体装置である。
図3は、本発明の第2実施形態に係る半導体装置における主要要素の平面レイアウトを示す模式図である。図4は、図3におけるB−B’断面に対応する模式断面図である。なお、前述した第1実施形態と同じ要素には同じ符号を付している。
図5は、本発明の第3実施形態に係る半導体装置における主要要素の平面レイアウトを示す模式図である。図6は、図5におけるC−C’断面に対応する模式断面図である。図7は、図5におけるD−D’断面に対応する模式断面図である。なお、前述した実施形態と同じ要素には同じ符号を付している。
図8は、本発明の第4実施形態に係る半導体装置の模式断面図である。なお、前述した実施形態と同じ要素には同じ符号を付している。
Claims (8)
- 第1導電型の半導体層と、
前記半導体層の表面に形成された第2導電型の第1のソースコンタクト領域と、前記第1のソースコンタクト領域に隣接して前記半導体層の表面に形成された第1導電型のバックゲートコンタクト領域とを有する第1のソース部と、
前記第1のソース部に対して離間して前記半導体層の表面に形成された第2導電型の第2のソースコンタクト領域を有する第2のソース部と、
前記第1のソース部及び前記第2のソース部に対して離間して前記半導体層の表面に形成された第2導電型のドレインコンタクト領域と、前記ドレインコンタクト領域と前記第1のソースコンタクト領域との間の前記半導体層の表面に前記ドレインコンタクト領域に隣接して形成され、前記ドレインコンタクト領域よりも第2導電型不純物濃度が低い第2導電型の第1のドリフト領域と、前記ドレインコンタクト領域と前記第2のソースコンタクト領域との間の前記半導体層の表面に前記ドレインコンタクト領域に隣接して形成され、前記ドレインコンタクト領域よりも第2導電型不純物濃度が低い第2導電型の第2のドリフト領域とを有するドレイン部と、
前記ドレインコンタクト領域と電気的に接続された第1の主電極と、
前記第1のソースコンタクト領域、前記バックゲートコンタクト領域および前記第2のソースコンタクト領域と電気的に接続された第2の主電極と、
前記第1のソースコンタクト領域と前記第1のドリフト領域との間の前記半導体層の表面上、および前記第2のソースコンタクト領域と前記第2のドリフト領域との間の前記半導体層の表面上に設けられたゲート絶縁膜と、
前記ゲート絶縁膜上に設けられたゲート電極と、
を備え、
前記半導体層と前記ドレイン部との間のpn接合にかかるバイアスが逆方向になるように前記第1の主電極と前記第2の主電極との間に電圧が印加された状態で、前記第2のドリフト領域近傍よりも前記第1のドリフト領域近傍においてアバランシェブレークダウンし得ることを特徴とする半導体装置。 - 前記第2のドリフト領域の方が前記第1のドリフト領域よりも、チャネル長方向の長さが長いことを特徴とする請求項1記載の半導体装置。
- 前記第1のドリフト領域の方が前記第2のドリフト領域よりも、第2導電型不純物濃度が高いことを特徴とする請求項1または2に記載の半導体装置。
- 前記半導体層の表層部に形成され、前記半導体層よりも第1導電型不純物濃度が高い第1導電型のウェルをさらに備え、
前記ウェルの表面に、前記第1のソースコンタクト領域、前記バックゲートコンタクト領域および前記第1のドリフト領域が形成されたことを特徴とする請求項1〜3のいずれか1つに記載の半導体装置。 - 複数の前記第1のソース部と複数の前記第2のソース部とが、各々の前記第1のソース部と各々の前記第2のソース部との間に前記ドレイン部を挟んで、チャネル長方向に交互にレイアウトされていることを特徴とする請求項1〜4のいずれか1つに記載の半導体装置。
- 前記第1のソースコンタクト領域及び前記バックゲートコンタクト領域はストライプ状の平面パターンで形成され、一対の前記第1のソースコンタクト領域の間に前記バックゲートコンタクト領域が挟まれていることを特徴とする請求項1〜5のいずれか1つに記載の半導体装置。
- 前記第1のソースコンタクト領域と前記バックゲートコンタクト領域とが、チャネル幅方向に交互に形成されていることを特徴とする請求項1〜5のいずれか1つに記載の半導体装置。
- 前記第2のソース部と前記ドレイン部と前記ゲート電極とから形成されるMOSFET(Metal-Oxide-Semiconductor Field Effect Transistor)は、前記第1のソース部と前記ドレイン部と前記ゲート電極とから形成されるMOSFETよりも、単位面積あたりのオン抵抗が低いことを特徴とする請求項1〜7のいずれか1つに記載の半導体装置。
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US12/878,948 US20110068406A1 (en) | 2009-09-24 | 2010-09-09 | Semiconductor device |
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JP5150675B2 (ja) | 2010-03-25 | 2013-02-20 | 株式会社東芝 | 半導体装置 |
JP6018376B2 (ja) | 2011-12-05 | 2016-11-02 | キヤノン株式会社 | 固体撮像装置およびカメラ |
JP6383325B2 (ja) | 2014-06-27 | 2018-08-29 | 株式会社東芝 | 半導体装置 |
CN104241376B (zh) * | 2014-09-01 | 2017-12-05 | 矽力杰半导体技术(杭州)有限公司 | 超结结构及其制备方法和半导体器件 |
DE102015109538B3 (de) * | 2015-06-15 | 2016-12-08 | Infineon Technologies Ag | Transistor mit verbessertem Lawinendurchbruchsverhalten und Verfahren zur Herstellung |
US20240014210A1 (en) * | 2022-07-08 | 2024-01-11 | Samsung Electronics Co., Ltd. | Power management integrated circuit and semiconductor package including the same |
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JPH1084046A (ja) * | 1997-07-22 | 1998-03-31 | Seiko Epson Corp | 半導体集積回路 |
JP2005243772A (ja) * | 2004-02-25 | 2005-09-08 | Victor Co Of Japan Ltd | 半導体集積回路 |
JP2005259940A (ja) * | 2004-03-11 | 2005-09-22 | Victor Co Of Japan Ltd | 半導体集積回路 |
JP2007129089A (ja) * | 2005-11-04 | 2007-05-24 | Toshiba Corp | 半導体装置 |
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US5585657A (en) * | 1992-04-16 | 1996-12-17 | Texas Instruments Incorporated | Windowed and segmented linear geometry source cell for power DMOS processes |
JP3120389B2 (ja) * | 1998-04-16 | 2000-12-25 | 日本電気株式会社 | 半導体装置 |
JP2001094094A (ja) * | 1999-09-21 | 2001-04-06 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP4970185B2 (ja) * | 2007-07-30 | 2012-07-04 | 株式会社東芝 | 半導体装置及びその製造方法 |
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JPH1084046A (ja) * | 1997-07-22 | 1998-03-31 | Seiko Epson Corp | 半導体集積回路 |
JP2005243772A (ja) * | 2004-02-25 | 2005-09-08 | Victor Co Of Japan Ltd | 半導体集積回路 |
JP2005259940A (ja) * | 2004-03-11 | 2005-09-22 | Victor Co Of Japan Ltd | 半導体集積回路 |
JP2007129089A (ja) * | 2005-11-04 | 2007-05-24 | Toshiba Corp | 半導体装置 |
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