JP2010514175A - 基板上に電気抵抗を製造する方法 - Google Patents
基板上に電気抵抗を製造する方法 Download PDFInfo
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- JP2010514175A JP2010514175A JP2009541936A JP2009541936A JP2010514175A JP 2010514175 A JP2010514175 A JP 2010514175A JP 2009541936 A JP2009541936 A JP 2009541936A JP 2009541936 A JP2009541936 A JP 2009541936A JP 2010514175 A JP2010514175 A JP 2010514175A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
- H01C17/06506—Precursor compositions therefor, e.g. pastes, inks, glass frits
- H01C17/06513—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component
- H01C17/06526—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component composed of metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49099—Coating resistive material on a base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12861—Group VIII or IB metal-base component
- Y10T428/12944—Ni-base component
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
電気抵抗たとえば電流センサ抵抗を基板上に取り付けることは知られている。これはたとえば厚膜技術およびLTCC技術(LTCC = Iow temperature cofire ceramic)により行われる。この目的で銀パラジウムペーストがスクリーン印刷法により基板上に印刷される。殊に導体路抵抗として形成されたとえば100mΩの典型的な抵抗値とたとえば100ppm/kの温度係数値をもつ抵抗を集積するためには煩雑なプロセスが必要とされ、たとえばこの抵抗と銀含有度の高い低抵抗の導体路との接続などを行わなければならず、これと同時に中間合金(中間生成物intermediate)の取り付けも必要とされ、このことから余分な印刷ステップと熱処理ステップが必要となる。このような余分なステップは、製造ラインの設計に起因してまったく不可能であることも多い。まえもって混合された抵抗であるスクリーン印刷された銀パラジウムペーストは、抵抗を製造するために焼成処理され、つまり熱処理される。
基板上に抵抗未加工品が取り付けられ、次にこの抵抗未加工品が熱処理されて抵抗が形成される形式の、本発明による電気抵抗たとえば電流センサ抵抗を基板上に製造する方法によれば、抵抗未加工品を形成するため、基板上にパラジウム層が取り付けられ、次にこのパラジウム層の上に銀層が取り付けられる。択一的に、基板上に銀層が取り付けられ、この銀層の上にパラジウム層が取り付けられる。その後、熱処理が行われ、これによってパラジウム層のパラジウムと銀層の銀とが完全に合金化される。このようにして得られた合金は、望ましい抵抗たとえば電流センサ抵抗を成すものである。
図1には電気的に絶縁性の材料から成る基板1が示されており、基板1の表面2に電気抵抗3たとえば電流測定抵抗4が配置されている。この図面では抵抗3が抵抗未加工品5としても示されており、これはあとで述べる処理ステップによって抵抗3に変えられる。ここで用語「電流センサ抵抗」ないしは「電流検知抵抗」とは、この抵抗により電流が捕捉されることを意味するものであり、そのようにして電流の流れに関する情報を取得することができる。
Claims (16)
- 抵抗未加工品が基板上に取り付けられ、次に該抵抗未加工品が熱処理されて抵抗が形成される形式の、基板上に電気抵抗たとえば電流センサ抵抗を製造する方法において、
抵抗未加工品を形成するために、基板上にパラジウム層が取り付けられ、該パラジウム層の上に銀層が取り付けられ、または基板上に銀層が取り付けられ、該銀層の上にパラジウム層が取り付けられ、
次に熱処理によって、パラジウム層のパラジウムと銀層の銀とが完全に合金化されることを特徴とする、
電気抵抗を製造する方法。 - 前記パラジウム層および/または前記銀層の取り付けは印刷法により行われる、請求項1記載の方法。
- 前記印刷法はスクリーン印刷法として実施される、請求項1または2項記載の方法。
- 前記印刷法はインクジェット印刷法として実施される、請求項1または2項記載の方法。
- 前記銀層は電気接続ゾーン形成のためパラジウム層の側方で突出している、請求項1から4のいずれか1項記載の方法。
- 前記抵抗未加工品上にカバーガラス層が取り付けられる、請求項1から5いずれか1項記載の方法。
- 前記カバーガラス層は印刷される、請求項1から6のいずれか1項記載の方法。
- 前記カバーガラス層は熱処理前に取り付けられる、請求項1から7のいずれか1項記載の方法。
- 前記パラジウム層は接着剤を介在させて基板上に取り付けられる、請求項1から8いずれか1項記載の方法。
- 前記接着剤は印刷法により取り付けられる、請求項1から9のいずれか1項記載の方法。
- 前記層は導体路層として取り付けられる、請求項1から10のいずれか1項記載の方法。
- 厚膜技術により製造が行われる、請求項1から11のいずれか1項記載の方法。
- 前記基板としてセラミック基板が用いられる、請求項1から12のいずれか1項記載の方法。
- 前記セラミック基板はセラミックシートにより形成される、請求項1から13のいずれか1項記載の方法。
- 前記電気接続ゾーンはスルーホールたとえば銀スルーホールとして形成される、請求項1から14のいずれか1項記載の方法。
- 請求項1から15のいずれか1項記載の方法に従い製造された電気抵抗たとえば電流センサ抵抗を備えた基板。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102006060634A DE102006060634A1 (de) | 2006-12-21 | 2006-12-21 | Verfahren zur Herstellung eines elektrischen Widerstands auf einem Substrat |
DE102006060634.5 | 2006-12-21 | ||
PCT/EP2007/061831 WO2008077671A1 (de) | 2006-12-21 | 2007-11-02 | Verfahren zur herstellung eines elektrischen widerstands auf einem substrat |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010514175A true JP2010514175A (ja) | 2010-04-30 |
JP4763833B2 JP4763833B2 (ja) | 2011-08-31 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009541936A Expired - Fee Related JP4763833B2 (ja) | 2006-12-21 | 2007-11-02 | 基板上に電気抵抗を製造する方法および電流センサ抵抗を備えた基板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8115589B2 (ja) |
EP (1) | EP2127505B1 (ja) |
JP (1) | JP4763833B2 (ja) |
AT (1) | ATE485705T1 (ja) |
DE (2) | DE102006060634A1 (ja) |
WO (1) | WO2008077671A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102017114891A1 (de) * | 2017-07-04 | 2019-01-10 | Rogers Germany Gmbh | Verfahren zur Herstellung einer Durchkontaktierung in einer aus einer Keramik gefertigten Trägerschicht und Trägerschicht mit Durchkontaktierung |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02224298A (ja) * | 1989-02-25 | 1990-09-06 | Taiyo Yuden Co Ltd | 低温焼成型セラミック多層配線基板 |
JPH07320534A (ja) * | 1994-05-26 | 1995-12-08 | Mitsubishi Materials Corp | 厚膜導体およびその形成方法ならびにその使用方法 |
JPH08153945A (ja) * | 1994-09-28 | 1996-06-11 | Sumitomo Kinzoku Ceramics:Kk | セラミック回路基板 |
JPH1117343A (ja) * | 1997-06-24 | 1999-01-22 | Tdk Corp | セラミック基体の製造方法 |
Family Cites Families (14)
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US3413240A (en) * | 1965-03-25 | 1968-11-26 | Du Pont | Compositions |
JPS5852900A (ja) * | 1981-09-24 | 1983-03-29 | 株式会社日立製作所 | セラミツク多層配線板の製造方法 |
DE3915106A1 (de) | 1989-05-09 | 1990-11-15 | Haendler Metall & Masch | Geraet zum ausstossen eines koerpers, insbesondere einer warenpackung |
JPH0376201A (ja) * | 1989-08-07 | 1991-04-02 | Ford Motor Co | 層状厚膜抵抗器及びその製造方法 |
GB8920745D0 (en) * | 1989-09-13 | 1989-10-25 | Ici Plc | Thick film resistor/integrated circuit substrate and method of manufacture |
US5221644A (en) * | 1991-12-13 | 1993-06-22 | Delco Electronics Corporation | Thick film sense resistor composition and method of using the same |
US5345212A (en) * | 1993-07-07 | 1994-09-06 | National Starch And Chemical Investment Holding Corporation | Power surge resistor with palladium and silver composition |
JP2896996B2 (ja) * | 1996-08-27 | 1999-05-31 | 釜屋電機株式会社 | 低抵抗チップ抵抗器及びその製造方法 |
EP0884934B1 (en) * | 1997-06-10 | 2005-02-16 | Canon Kabushiki Kaisha | Substrate and method for producing it |
US5889445A (en) * | 1997-07-22 | 1999-03-30 | Avx Corporation | Multilayer ceramic RC device |
JPH11195505A (ja) | 1997-12-26 | 1999-07-21 | E I Du Pont De Nemours & Co | 厚膜抵抗体及びその製造方法 |
DE19953594A1 (de) * | 1998-11-20 | 2000-05-25 | Matsushita Electric Ind Co Ltd | Oberflächenmontierte elektronische Komponente |
DE10144364A1 (de) * | 2001-09-10 | 2003-04-03 | Epcos Ag | Elektrisches Vielschichtbauelement |
US7127809B2 (en) | 2004-03-18 | 2006-10-31 | Northrop Grumman Corporation | Method of forming one or more base structures on an LTCC cofired module |
-
2006
- 2006-12-21 DE DE102006060634A patent/DE102006060634A1/de not_active Withdrawn
-
2007
- 2007-11-02 JP JP2009541936A patent/JP4763833B2/ja not_active Expired - Fee Related
- 2007-11-02 EP EP07847108A patent/EP2127505B1/de not_active Not-in-force
- 2007-11-02 DE DE502007005443T patent/DE502007005443D1/de active Active
- 2007-11-02 WO PCT/EP2007/061831 patent/WO2008077671A1/de active Application Filing
- 2007-11-02 US US12/304,295 patent/US8115589B2/en not_active Expired - Fee Related
- 2007-11-02 AT AT07847108T patent/ATE485705T1/de active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02224298A (ja) * | 1989-02-25 | 1990-09-06 | Taiyo Yuden Co Ltd | 低温焼成型セラミック多層配線基板 |
JPH07320534A (ja) * | 1994-05-26 | 1995-12-08 | Mitsubishi Materials Corp | 厚膜導体およびその形成方法ならびにその使用方法 |
JPH08153945A (ja) * | 1994-09-28 | 1996-06-11 | Sumitomo Kinzoku Ceramics:Kk | セラミック回路基板 |
JPH1117343A (ja) * | 1997-06-24 | 1999-01-22 | Tdk Corp | セラミック基体の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
EP2127505A1 (de) | 2009-12-02 |
US20100039213A1 (en) | 2010-02-18 |
WO2008077671A1 (de) | 2008-07-03 |
US8115589B2 (en) | 2012-02-14 |
DE102006060634A1 (de) | 2008-06-26 |
EP2127505B1 (de) | 2010-10-20 |
JP4763833B2 (ja) | 2011-08-31 |
ATE485705T1 (de) | 2010-11-15 |
DE502007005443D1 (de) | 2010-12-02 |
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