JP2010512668A - シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成 - Google Patents

シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成 Download PDF

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JP2010512668A
JP2010512668A JP2009541506A JP2009541506A JP2010512668A JP 2010512668 A JP2010512668 A JP 2010512668A JP 2009541506 A JP2009541506 A JP 2009541506A JP 2009541506 A JP2009541506 A JP 2009541506A JP 2010512668 A JP2010512668 A JP 2010512668A
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substrate
source
carbon
epitaxial
process chamber
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Japanese (ja)
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JP2010512668A5 (enExample
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イーワン キム,
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Applied Materials Inc
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Applied Materials Inc
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Publication of JP2010512668A publication Critical patent/JP2010512668A/ja
Publication of JP2010512668A5 publication Critical patent/JP2010512668A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02529Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2009541506A 2006-12-12 2007-12-10 シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成 Pending JP2010512668A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/609,826 US8394196B2 (en) 2006-12-12 2006-12-12 Formation of in-situ phosphorus doped epitaxial layer containing silicon and carbon
PCT/US2007/086984 WO2008073894A1 (en) 2006-12-12 2007-12-10 Formation of in-situ phosphorus doped epitaxial layer containing silicon and carbon

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012207133A Division JP5551745B2 (ja) 2006-12-12 2012-09-20 シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成

Publications (2)

Publication Number Publication Date
JP2010512668A true JP2010512668A (ja) 2010-04-22
JP2010512668A5 JP2010512668A5 (enExample) 2010-12-02

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Family Applications (2)

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JP2009541506A Pending JP2010512668A (ja) 2006-12-12 2007-12-10 シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成
JP2012207133A Active JP5551745B2 (ja) 2006-12-12 2012-09-20 シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成

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JP2012207133A Active JP5551745B2 (ja) 2006-12-12 2012-09-20 シリコンと炭素を含有するインサイチュリンドープエピタキシャル層の形成

Country Status (4)

Country Link
US (1) US8394196B2 (enExample)
JP (2) JP2010512668A (enExample)
TW (1) TWI414006B (enExample)
WO (1) WO2008073894A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101821707B1 (ko) 2011-02-08 2018-01-24 어플라이드 머티어리얼스, 인코포레이티드 인장 변형 적용들을 위한 고인장 실리콘 합금의 에피택시

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5200371B2 (ja) * 2006-12-01 2013-06-05 東京エレクトロン株式会社 成膜方法、半導体装置及び記憶媒体
US8367548B2 (en) * 2007-03-16 2013-02-05 Asm America, Inc. Stable silicide films and methods for making the same
DE102008030854B4 (de) * 2008-06-30 2014-03-20 Advanced Micro Devices, Inc. MOS-Transistoren mit abgesenkten Drain- und Source-Bereichen und nicht-konformen Metallsilizidgebieten und Verfahren zum Herstellen der Transistoren
US7994015B2 (en) 2009-04-21 2011-08-09 Applied Materials, Inc. NMOS transistor devices and methods for fabricating same
US8999798B2 (en) * 2009-12-17 2015-04-07 Applied Materials, Inc. Methods for forming NMOS EPI layers
US8598003B2 (en) 2009-12-21 2013-12-03 Intel Corporation Semiconductor device having doped epitaxial region and its methods of fabrication
WO2012102755A1 (en) * 2011-01-28 2012-08-02 Applied Materials, Inc. Carbon addition for low resistivity in situ doped silicon epitaxy
KR102534730B1 (ko) 2015-04-10 2023-05-26 어플라이드 머티어리얼스, 인코포레이티드 선택적 에피택셜 성장을 위한 성장률을 증강시키기 위한 방법
KR102742581B1 (ko) 2019-09-24 2024-12-13 삼성전자주식회사 반도체 소자 및 이의 제조 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006060543A2 (en) * 2004-12-01 2006-06-08 Applied Materials, Inc. Use of cl2 and/or hcl during silicon epitaxial film formation
WO2006083821A1 (en) * 2005-02-04 2006-08-10 Asm America, Inc. Selective deposition of silicon-containing films

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5177677A (en) * 1989-03-08 1993-01-05 Hitachi, Ltd. Power conversion system
US5186718A (en) 1989-05-19 1993-02-16 Applied Materials, Inc. Staged-vacuum wafer processing system and method
US5108792A (en) 1990-03-09 1992-04-28 Applied Materials, Inc. Double-dome reactor for semiconductor processing
US5179677A (en) 1990-08-16 1993-01-12 Applied Materials, Inc. Apparatus and method for substrate heating utilizing various infrared means to achieve uniform intensity
KR100815009B1 (ko) * 2000-09-28 2008-03-18 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 산화물, 규산염 및 인산염의 증기를 이용한 석출
US6426265B1 (en) * 2001-01-30 2002-07-30 International Business Machines Corporation Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology
AU2002306436A1 (en) * 2001-02-12 2002-10-15 Asm America, Inc. Improved process for deposition of semiconductor films
KR100713904B1 (ko) 2001-06-29 2007-05-07 주식회사 하이닉스반도체 반도체소자의 제조방법
US6916398B2 (en) 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
KR100473476B1 (ko) 2002-07-04 2005-03-10 삼성전자주식회사 반도체 장치 및 그 제조방법
US6897131B2 (en) 2002-09-20 2005-05-24 Applied Materials, Inc. Advances in spike anneal processes for ultra shallow junctions
US6803297B2 (en) 2002-09-20 2004-10-12 Applied Materials, Inc. Optimal spike anneal ambient
US7540920B2 (en) * 2002-10-18 2009-06-02 Applied Materials, Inc. Silicon-containing layer deposition with silicon compounds
US6998305B2 (en) * 2003-01-24 2006-02-14 Asm America, Inc. Enhanced selectivity for epitaxial deposition
US6998153B2 (en) 2003-01-27 2006-02-14 Applied Materials, Inc. Suppression of NiSi2 formation in a nickel salicide process using a pre-silicide nitrogen plasma
JP4139306B2 (ja) * 2003-10-02 2008-08-27 東洋炭素株式会社 縦型ホットウォールCVDエピタキシャル装置及びSiCエピタキシャル成長方法
US7132338B2 (en) * 2003-10-10 2006-11-07 Applied Materials, Inc. Methods to fabricate MOSFET devices using selective deposition process
US7166528B2 (en) 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
WO2005116304A2 (en) 2004-04-23 2005-12-08 Asm America, Inc. In situ doped epitaxial films
US20050241671A1 (en) * 2004-04-29 2005-11-03 Dong Chun C Method for removing a substance from a substrate using electron attachment
US7196005B2 (en) * 2004-09-03 2007-03-27 Taiwan Semiconductor Manufacturing Company, Ltd. Dual damascene process with dummy features
US7560352B2 (en) * 2004-12-01 2009-07-14 Applied Materials, Inc. Selective deposition
US7312128B2 (en) * 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US7195985B2 (en) * 2005-01-04 2007-03-27 Intel Corporation CMOS transistor junction regions formed by a CVD etching and deposition sequence
JP2006253617A (ja) * 2005-02-14 2006-09-21 Toshiba Ceramics Co Ltd SiC半導体およびその製造方法
KR101193453B1 (ko) * 2006-07-31 2012-10-24 비쉐이-실리코닉스 실리콘 카바이드 쇼트키 다이오드를 위한 몰리브덴 장벽 금속 및 제조방법
US8124473B2 (en) * 2007-04-12 2012-02-28 Advanced Micro Devices, Inc. Strain enhanced semiconductor devices and methods for their fabrication
US20080283926A1 (en) * 2007-05-18 2008-11-20 Texas Instruments Incorporated Method for integrating silicon germanium and carbon doped silicon within a strained cmos flow

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006060543A2 (en) * 2004-12-01 2006-06-08 Applied Materials, Inc. Use of cl2 and/or hcl during silicon epitaxial film formation
WO2006083821A1 (en) * 2005-02-04 2006-08-10 Asm America, Inc. Selective deposition of silicon-containing films

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101821707B1 (ko) 2011-02-08 2018-01-24 어플라이드 머티어리얼스, 인코포레이티드 인장 변형 적용들을 위한 고인장 실리콘 합금의 에피택시

Also Published As

Publication number Publication date
JP5551745B2 (ja) 2014-07-16
US20080138939A1 (en) 2008-06-12
TWI414006B (zh) 2013-11-01
US8394196B2 (en) 2013-03-12
TW200832529A (en) 2008-08-01
JP2013070055A (ja) 2013-04-18
WO2008073894A1 (en) 2008-06-19

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