JP2010283816A - クロックを並列データに整列させるための回路 - Google Patents

クロックを並列データに整列させるための回路 Download PDF

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Publication number
JP2010283816A
JP2010283816A JP2010122836A JP2010122836A JP2010283816A JP 2010283816 A JP2010283816 A JP 2010283816A JP 2010122836 A JP2010122836 A JP 2010122836A JP 2010122836 A JP2010122836 A JP 2010122836A JP 2010283816 A JP2010283816 A JP 2010283816A
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Japan
Prior art keywords
clock signal
output
input
dff
incoming
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Japanese (ja)
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JP2010283816A5 (enExample
Inventor
James Douglas Seefeldt
ジェームズ・ダグラス・シーフェルト
Weston Roper
ウェストン・ロパー
James Hansen
ジェームズ・ハンセン
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Honeywell International Inc
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Honeywell International Inc
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Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Publication of JP2010283816A publication Critical patent/JP2010283816A/ja
Publication of JP2010283816A5 publication Critical patent/JP2010283816A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP2010122836A 2009-05-29 2010-05-28 クロックを並列データに整列させるための回路 Pending JP2010283816A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/475,414 US8355478B1 (en) 2009-05-29 2009-05-29 Circuit for aligning clock to parallel data

Publications (2)

Publication Number Publication Date
JP2010283816A true JP2010283816A (ja) 2010-12-16
JP2010283816A5 JP2010283816A5 (enExample) 2013-05-23

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ID=42543456

Family Applications (1)

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JP2010122836A Pending JP2010283816A (ja) 2009-05-29 2010-05-28 クロックを並列データに整列させるための回路

Country Status (4)

Country Link
US (1) US8355478B1 (enExample)
EP (1) EP2256932A1 (enExample)
JP (1) JP2010283816A (enExample)
TW (1) TWI477130B (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102248279B1 (ko) * 2014-06-13 2021-05-07 삼성전자주식회사 불휘발성 메모리 및 메모리 컨트롤러를 포함하는 스토리지 장치, 그리고 불휘발성 메모리 및 메모리 컨트롤러 사이의 통신을 중개하는 리타이밍 회로의 동작 방법
US9825632B1 (en) * 2016-08-04 2017-11-21 Xilinx, Inc. Circuit for and method of preventing multi-bit upsets induced by single event transients
US10432209B1 (en) * 2018-10-10 2019-10-01 Globalfoundries Inc. Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods

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JPH02128520A (ja) * 1988-01-28 1990-05-16 Siemens Ag 電子的パルスカウンタ
JPH0422221A (ja) * 1990-05-16 1992-01-27 Matsushita Electric Ind Co Ltd デジタル位相同期装置
JP2001148692A (ja) * 1999-09-09 2001-05-29 Matsushita Electric Ind Co Ltd クロック抽出装置
JP2001298358A (ja) * 2000-04-14 2001-10-26 Citizen Watch Co Ltd 分周回路
JP2003174329A (ja) * 2001-12-04 2003-06-20 Nec Electronics Corp 直交ミキサ回路
JP2004525548A (ja) * 2000-12-29 2004-08-19 ハネウェル・インターナショナル・インコーポレーテッド 精密位相生成装置
JP2006262165A (ja) * 2005-03-17 2006-09-28 Ricoh Co Ltd データリカバリ方法、データリカバリ回路、データ送受信装置及び情報処理装置
JP2007124363A (ja) * 2005-10-28 2007-05-17 Nec Electronics Corp 遅延ロックループ回路
JP2007295172A (ja) * 2006-04-24 2007-11-08 Thine Electronics Inc 信号受信装置
JP2008066865A (ja) * 2006-09-05 2008-03-21 Mitsubishi Electric Corp 差動信号補償回路及び無線受信機

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GB8924202D0 (en) 1989-10-27 1989-12-13 Ncr Co Digital phase lock loop decoder
US5105108A (en) 1990-11-14 1992-04-14 Zenith Electronics Corporation Delay circuit with phase locked loop control
US5126690A (en) 1991-08-08 1992-06-30 International Business Machines Corporation Phase locked loop lock detector including loss of lock and gain of lock detectors
US5596606A (en) 1994-04-05 1997-01-21 Scientific-Atlanta, Inc. Synchronous detector and methods for synchronous detection
US5991308A (en) 1995-08-25 1999-11-23 Terayon Communication Systems, Inc. Lower overhead method for data transmission using ATM and SCDMA over hybrid fiber coax cable plant
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US6311050B1 (en) 1998-05-29 2001-10-30 Silicon Laboratories, Inc. Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same
US6577691B2 (en) 1998-09-03 2003-06-10 Time Domain Corporation Precision timing generator apparatus and associated methods
US6147561A (en) * 1999-07-29 2000-11-14 Conexant Systems, Inc. Phase/frequency detector with time-delayed inputs in a charge pump based phase locked loop and a method for enhancing the phase locked loop gain
DE10010947A1 (de) 2000-03-06 2001-09-27 Siemens Ag Takt- und Datenregenerator für unterschiedliche Datenraten
WO2001071921A1 (fr) 2000-03-21 2001-09-27 Nippon Telegraph And Telephone Corporation Boucle a phase asservie
WO2002039585A2 (en) 2000-11-13 2002-05-16 Primarion, Inc. High bandwidth multi-phase clock selector with continuous phase output
US6704383B2 (en) * 2001-03-20 2004-03-09 Gct Semiconductor, Inc. Sample and hold type fractional-N frequency synthesizer
US6426662B1 (en) 2001-11-12 2002-07-30 Pericom Semiconductor Corp. Twisted-ring oscillator and delay line generating multiple phases using differential dividers and comparators to match delays
US7167686B2 (en) 2002-01-25 2007-01-23 Qualcomm Incorporated Wireless communications transceiver: transmitter using a harmonic rejection mixer and an RF output offset phase-locked loop in a two-step up-conversion architecture and receiver using direct conversion architecture
US6759881B2 (en) * 2002-03-22 2004-07-06 Rambus Inc. System with phase jumping locked loop circuit
US7003686B2 (en) 2002-05-20 2006-02-21 Hitachi Ltd. Interface circuit
US7069458B1 (en) 2002-08-16 2006-06-27 Cypress Semiconductor Corp. Parallel data interface and method for high-speed timing adjustment
EP1537669A1 (en) 2002-08-30 2005-06-08 Koninklijke Philips Electronics N.V. Phase locked loop
US6853252B2 (en) 2002-10-04 2005-02-08 Intersil Corporation Phase-lock loop having programmable bandwidth
US7495516B2 (en) 2003-04-02 2009-02-24 Christopher Julian Travis Method of establishing an oscillator clock signal
KR100493174B1 (ko) * 2003-06-16 2005-06-02 삼성전자주식회사 주파수 분주기용 기준 전압 발생기 및 그 방법
US6909329B2 (en) 2003-09-02 2005-06-21 Agere Systems Inc. Adaptive loop bandwidth circuit for a PLL
JP4480536B2 (ja) * 2003-12-05 2010-06-16 株式会社リコー データリカバリ方法およびデータリカバリ回路
DE102006028966B4 (de) 2005-06-21 2016-03-24 Samsung Electronics Co., Ltd. Phasenregelkreisschaltung, Verfahren zum Verriegeln der Phase, Speicherbauelement und Speichersystem
KR100689832B1 (ko) * 2005-06-21 2007-03-08 삼성전자주식회사 위상 동기 루프 및 방법
US7403073B2 (en) * 2005-09-30 2008-07-22 International Business Machines Corporation Phase locked loop and method for adjusting the frequency and phase in the phase locked loop
US7323946B2 (en) 2005-10-20 2008-01-29 Honeywell International Inc. Lock detect circuit for a phase locked loop

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02128520A (ja) * 1988-01-28 1990-05-16 Siemens Ag 電子的パルスカウンタ
JPH0422221A (ja) * 1990-05-16 1992-01-27 Matsushita Electric Ind Co Ltd デジタル位相同期装置
JP2001148692A (ja) * 1999-09-09 2001-05-29 Matsushita Electric Ind Co Ltd クロック抽出装置
JP2001298358A (ja) * 2000-04-14 2001-10-26 Citizen Watch Co Ltd 分周回路
JP2004525548A (ja) * 2000-12-29 2004-08-19 ハネウェル・インターナショナル・インコーポレーテッド 精密位相生成装置
JP2003174329A (ja) * 2001-12-04 2003-06-20 Nec Electronics Corp 直交ミキサ回路
JP2006262165A (ja) * 2005-03-17 2006-09-28 Ricoh Co Ltd データリカバリ方法、データリカバリ回路、データ送受信装置及び情報処理装置
JP2007124363A (ja) * 2005-10-28 2007-05-17 Nec Electronics Corp 遅延ロックループ回路
JP2007295172A (ja) * 2006-04-24 2007-11-08 Thine Electronics Inc 信号受信装置
JP2008066865A (ja) * 2006-09-05 2008-03-21 Mitsubishi Electric Corp 差動信号補償回路及び無線受信機

Also Published As

Publication number Publication date
TWI477130B (zh) 2015-03-11
EP2256932A1 (en) 2010-12-01
TW201110650A (en) 2011-03-16
US8355478B1 (en) 2013-01-15

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