JP2010205817A - Electronic component holder - Google Patents

Electronic component holder Download PDF

Info

Publication number
JP2010205817A
JP2010205817A JP2009047830A JP2009047830A JP2010205817A JP 2010205817 A JP2010205817 A JP 2010205817A JP 2009047830 A JP2009047830 A JP 2009047830A JP 2009047830 A JP2009047830 A JP 2009047830A JP 2010205817 A JP2010205817 A JP 2010205817A
Authority
JP
Japan
Prior art keywords
holding plate
electronic component
semiconductor wafer
frame body
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009047830A
Other languages
Japanese (ja)
Other versions
JP5328422B2 (en
Inventor
Noriyoshi Hosono
則義 細野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Polymer Co Ltd, Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Polymer Co Ltd
Priority to JP2009047830A priority Critical patent/JP5328422B2/en
Publication of JP2010205817A publication Critical patent/JP2010205817A/en
Application granted granted Critical
Publication of JP5328422B2 publication Critical patent/JP5328422B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component holder for easily detaching a held electronic component and suppressing the breakage and falling of the electronic component by the large deformation of the whole. <P>SOLUTION: The electronic component holder includes a frame body 1, a holding plate 6 for freely detachably holding a semiconductor wafer 4 which is loosely fitted inside the frame body 1 and thinned, and a buffer connection layer 8 for connecting the frame body 1 and the holding plate 6, and flexibility is imparted to the frame body 1, the holding plate 6 and the buffer connection layer 8 respectively. On the surface of the holding plate 6, an adhesive layer 7 for the semiconductor wafer 4 is laminated and stuck. Even when vibrations are generated and act on the frame body 1 during work or conveyance, since the buffer connection layer 8 absorbs the vibrations, lowers a generation acceleration and suppresses and prevents the transmission of the vibrations to the holding plate 6, both of the frame body 1 and the holding plate 6 are not largely deformed. Thus, the semiconductor wafer 4 is effectively prevented from being damaged or falling from the holding plate 6 accompanying the vibrations or the like. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体ウェーハに代表される電子部品を着脱自在に保持する電子部品保持具に関するものである。   The present invention relates to an electronic component holder that detachably holds an electronic component typified by a semiconductor wafer.

近年、携帯電話に代表される電子機器の小型化や軽量化が図られ、この小型化や軽量化の実現のため、電子機器のデバイスやディスプレイ等に薄化が要望されているが、この要望を満たすためには、半導体ウェーハや液晶用のガラス基板を可能な限り薄化する必要がある。   In recent years, electronic devices typified by mobile phones have been reduced in size and weight, and in order to achieve this reduction in size and weight, there has been a demand for thinning electronic devices and displays. In order to satisfy the requirements, it is necessary to make the semiconductor wafer and the glass substrate for liquid crystal as thin as possible.

しかしながら、半導体ウェーハやガラス基板を薄化すると、脆く割れ易くなるので、製造時の取り扱いや搬送に支障を来たすおそれがある。この点に鑑み、従来においては、金属、セラミック、プラスチック等の材料を使用して平坦で硬質の支持基板を形成し、この支持基板上に薄化された半導体ウェーハやガラス基板を重ねて貼り合わせ、剛性を確保した状態で作業したり、搬送するようにしている(特許文献1参照)。   However, if a semiconductor wafer or glass substrate is thinned, it becomes brittle and easily broken, which may hinder handling and transport during manufacturing. In view of this point, conventionally, a flat, hard support substrate is formed using a material such as metal, ceramic, plastic, etc., and a thinned semiconductor wafer or glass substrate is laminated and bonded to the support substrate. The work is performed or transported in a state where rigidity is ensured (see Patent Document 1).

特開2005−333100号公報JP-A-2005-333100

従来における電子部品保持具は、以上のように構成され、硬質の支持基板上に薄化された半導体ウェーハやガラス基板が単に重ねて貼着されるので、剛性を確保することができるものの、取り外しが困難になるという問題がある。このような問題を解消する手法としては、支持基板を変形させて半導体ウェーハやガラス基板を取り外す方法が検討されているが、この方法の場合には、搬送時の振動等に伴い、支持基板全体が大きく変形し、その結果、半導体ウェーハやガラス基板が破損したり、支持基板から脱落するという問題が新たに生じることとなる。   The conventional electronic component holder is configured as described above, and the thinned semiconductor wafer or glass substrate is simply stacked and pasted on a hard support substrate, so that rigidity can be ensured, but removal There is a problem that becomes difficult. As a method for solving such a problem, a method of removing the semiconductor wafer or the glass substrate by deforming the support substrate has been studied. In this method, the entire support substrate is accompanied by vibration during transportation. As a result, there is a new problem that the semiconductor wafer or the glass substrate is broken or dropped from the support substrate.

本発明は上記に鑑みなされたもので、保持した電子部品を容易に取り外すことができ、しかも、全体の大きな変形により電子部品の破損や脱落を抑制することのできる電子部品保持具を提供することを目的としている。   The present invention has been made in view of the above, and it is an object of the present invention to provide an electronic component holder capable of easily removing a held electronic component and suppressing damage and dropout of the electronic component due to the overall large deformation. It is an object.

本発明においては上記課題を解決するため、電子部品を着脱自在に保持するものであって、
枠体と、この枠体内に隙間を介して嵌め入れられ、電子部品を着脱自在に保持する保持板と、これら枠体と保持板とを連結する緩衝連結層とを含み、
枠体、保持板、及び緩衝連結層に可撓性をそれぞれ付与し、保持板の表面に電子部品用の粘着層を設けたことを特徴としている。
In the present invention, in order to solve the above problems, the electronic component is detachably held,
Including a frame, a holding plate that is fitted into the frame via a gap and detachably holds an electronic component, and a buffer connection layer that connects the frame and the holding plate,
Flexibility is imparted to the frame, the holding plate, and the buffer connection layer, respectively, and an adhesive layer for electronic components is provided on the surface of the holding plate.

なお、保持板を中空に形成して電子部品の表裏面を露出させるようにし、枠体の裏面と保持板の裏面との間に緩衝連結層を架設することができる。
また、保持板の表面に、光線の照射により粘着性が低下する光硬化性の粘着層を積層することもできる。
Note that the holding plate can be formed hollow so that the front and back surfaces of the electronic component are exposed, and a buffer connection layer can be provided between the back surface of the frame and the back surface of the holding plate.
Moreover, the photocurable adhesive layer which adhesiveness falls by irradiation of a light beam can also be laminated | stacked on the surface of a holding plate.

ここで、特許請求の範囲における電子部品には、少なくとも単数複数の半導体ウェーハ(シリコンウェーハ等)、ガラス基板、半導体チップ、回路素子等が含まれる。この電子部品は、薄く脆い部品が主ではあるが、厚い部品を特に排除するものではない。枠体は、リング形、中空の矩形や多角形等を特に問うものではない。さらに、保持板や緩衝連結層は、円形、楕円形、矩形、多角形、リング形、枠形等に形成することができる。   Here, the electronic components in the claims include at least one semiconductor wafer (such as a silicon wafer), a glass substrate, a semiconductor chip, and a circuit element. This electronic component is mainly a thin and fragile component, but does not specifically exclude a thick component. The frame is not particularly limited to a ring shape, a hollow rectangle, a polygon or the like. Further, the holding plate and the buffer connection layer can be formed in a circular shape, an elliptical shape, a rectangular shape, a polygonal shape, a ring shape, a frame shape, or the like.

本発明によれば、各種作業や搬送等の際、振動が生じて電子部品保持具の枠体に作用しても、緩衝連結層が振動を吸収して保持板に振動が伝達されるのを抑制するので、別体の枠体と保持板とが共に大きく変形することが少ない。   According to the present invention, even when vibration occurs and acts on the frame of the electronic component holder during various operations or transportation, the buffer connection layer absorbs the vibration and the vibration is transmitted to the holding plate. Therefore, both the separate frame and the holding plate are hardly deformed.

本発明によれば、保持した電子部品を容易に取り外すことができるという効果がある。また、電子部品保持具全体の大きな変形により、電子部品の破損や脱落を有効に抑制することができる。
また、保持板を中空に形成して電子部品の表裏面を露出させるようにし、枠体の裏面と保持板の裏面との間に緩衝連結層を架設すれば、基板の両面をそれぞれ露出させることができるので、表裏両面に回路が形成された基板の導通検査等が可能になる。
According to the present invention, there is an effect that the held electronic component can be easily removed. In addition, the electronic component holder can be effectively prevented from being damaged or dropped due to a large deformation of the entire electronic component holder.
Moreover, if the holding plate is formed hollow so that the front and back surfaces of the electronic component are exposed, and a buffer connection layer is provided between the back surface of the frame body and the back surface of the holding plate, both sides of the substrate are exposed. Therefore, it is possible to conduct a continuity test or the like of a substrate on which circuits are formed on both sides.

本発明に係る電子部品保持具の実施形態を模式的に示す平面説明図である。It is plane explanatory drawing which shows typically embodiment of the electronic component holder which concerns on this invention. 本発明に係る電子部品保持具の実施形態を模式的に示す断面説明図である。It is a section explanatory view showing typically an embodiment of an electronic component holder concerning the present invention. 本発明に係る電子部品保持具の第2の実施形態を模式的に示す断面説明図である。It is a section explanatory view showing typically a 2nd embodiment of the electronic parts holder concerning the present invention.

以下、図面を参照して本発明に係る電子部品保持具の好ましい実施形態を説明すると、本実施形態における電子部品保持具は、図1や図2に示すように、作業者に握持操作される中空の枠体1と、この枠体1内に遊嵌されて薄化された半導体ウェーハ4を保持する保持板6と、これら枠体1と保持板6とを緊張して連結する緩衝連結層8とを備え、薄化された半導体ウェーハ4の剛性を確保した状態で各種作業や搬送に供される。   Hereinafter, a preferred embodiment of an electronic component holder according to the present invention will be described with reference to the drawings. The electronic component holder in this embodiment is gripped by an operator as shown in FIGS. 1 and 2. A hollow frame 1, a holding plate 6 that holds the thinned semiconductor wafer 4 loosely fitted in the frame 1, and a buffer connection that tensions and connects the frame 1 and the holding plate 6. The thinned semiconductor wafer 4 is provided with the layer 8 and used for various operations and conveyances while ensuring the rigidity of the thinned semiconductor wafer 4.

枠体1と保持板6は、共に所定の材料を使用して形成され、変形可能な可撓性がそれぞれ付与される。これらの材料としては、半導体ウェーハ4の変形や損傷を防止可能な剛性と可撓性とが確保されるのであれば、特に限定されるものではないが、例えばポリカーボネート、ポリプロピレン、ポリエチレン、アクリル樹脂、ガラス繊維混練の材料等があげられる。   Both the frame body 1 and the holding plate 6 are formed using a predetermined material, and are provided with deformable flexibility. These materials are not particularly limited as long as rigidity and flexibility capable of preventing deformation and damage of the semiconductor wafer 4 are ensured. For example, polycarbonate, polypropylene, polyethylene, acrylic resin, Examples thereof include glass fiber kneading materials.

枠体1は、図1に示すように、基本的には半導体ウェーハ4や保持板6よりも拡径の平面略リング形の平板に形成され、保持板6を隙間2を介して外側から包囲しており、外周部の一部3が直線的に切り欠かれて方向性の識別や位置決めに使用される。   As shown in FIG. 1, the frame body 1 is basically formed in a substantially ring-shaped flat plate having a diameter larger than that of the semiconductor wafer 4 and the holding plate 6, and surrounds the holding plate 6 from the outside via the gap 2. In addition, a part 3 of the outer peripheral portion is notched linearly and used for direction identification and positioning.

半導体ウェーハ4は、図1や図2に示すように、基本的には平面円形にスライスされて100μm以下の厚さにバックグラインドされ、表裏面のうち、少なくとも表面に回路パターンが形成されており、外周部の一部が直線的に切り欠かれて方向性の識別や位置決め用のオリフラ5とされる。   As shown in FIGS. 1 and 2, the semiconductor wafer 4 is basically sliced into a plane circle and back-ground to a thickness of 100 μm or less, and a circuit pattern is formed on at least the front and back surfaces. A part of the outer peripheral portion is cut out linearly to obtain an orientation flat 5 for direction identification and positioning.

保持板6は、図1や図2に示すように、半導体ウェーハ4と同程度の大きさを有する平面円形の平板に形成され、表面に半導体ウェーハ4用の粘着層7が積層して粘着されており、この粘着層7の表面に半導体ウェーハ4が着脱自在に粘着保持される。粘着層7は、例えば所定の光線(紫外線等)の照射により粘着剤が硬化し、粘着性が低下する光硬化性の材料を使用して平面円形に形成される。   As shown in FIG. 1 and FIG. 2, the holding plate 6 is formed in a planar circular flat plate having the same size as that of the semiconductor wafer 4, and the adhesive layer 7 for the semiconductor wafer 4 is laminated and adhered to the surface. The semiconductor wafer 4 is detachably adhered to the surface of the adhesive layer 7. The pressure-sensitive adhesive layer 7 is formed into a flat circular shape using a photo-curing material in which the pressure-sensitive adhesive is cured by irradiation with a predetermined light beam (ultraviolet light or the like), for example.

緩衝連結層8は、同図に示すように、所定の材料を使用して可撓性を有する平面円形に形成され、枠体1と保持板6の裏面にそれぞれ接着されており、半導体ウェーハ4に対する衝撃を緩衝するよう機能する。この緩衝連結層8は、光や熱に対して安定で引張り伸び率の小さいポリエチレンテレフタレートやポリカーボネート等からなる薄い樹脂フィルム、シリコーン系、ウレタン系、オレフィン系、フッ素系のエラストマーを使用して弾性変形可能な薄膜に成形される。   As shown in the figure, the buffer coupling layer 8 is formed into a planar circular shape having flexibility using a predetermined material, and is bonded to the back surface of the frame 1 and the holding plate 6. It functions to buffer the impact against This buffer connection layer 8 is elastically deformed by using a thin resin film made of polyethylene terephthalate or polycarbonate which is stable to light and heat and has a small tensile elongation rate, and a silicone, urethane, olefin or fluorine elastomer. Molded into a possible thin film.

上記構成において、電子部品保持具の保持板6に薄化された半導体ウェーハ4を保持させる場合には、保持板6の粘着層7に半導体ウェーハ4を重ねてローラ等で押圧すれば、保持板6に半導体ウェーハ4を保持させ、剛性を確保することができる。このような剛性の確保された状態で、半導体ウェーハ4は各種作業や搬送に供される。   In the above configuration, when the thinned semiconductor wafer 4 is held on the holding plate 6 of the electronic component holder, the holding plate can be obtained by placing the semiconductor wafer 4 on the adhesive layer 7 of the holding plate 6 and pressing it with a roller or the like. 6 can hold the semiconductor wafer 4 and ensure rigidity. In a state where such rigidity is ensured, the semiconductor wafer 4 is used for various operations and conveyance.

係る作業や搬送の際、振動が生じて枠体1に作用することがあるが、緩衝連結層8が撓んで振動を吸収し、発生加速度を低くして保持板6に振動が伝達されるのを抑制防止するので、枠体1と保持板6とが共に大きく変形することがない。したがって、作業や搬送時の振動等に伴い、半導体ウェーハ4が破損したり、保持板6の粘着層7から脱落するのを有効に防ぐことができる。   During such work or transport, vibration may occur and act on the frame 1, but the buffer coupling layer 8 bends and absorbs vibration, and the generated acceleration is lowered and transmitted to the holding plate 6. Therefore, neither the frame body 1 nor the holding plate 6 is greatly deformed. Therefore, it is possible to effectively prevent the semiconductor wafer 4 from being damaged or falling off from the adhesive layer 7 of the holding plate 6 due to vibration during operation or conveyance.

次に、電子部品保持具の保持板6から半導体ウェーハ4を取り外す場合には、電子部品保持具を上下逆に反転して半導体ウェーハ4を下方に向け、この半導体ウェーハ4を図示しない吸着プレート等に水平に真空吸着させ、その後、保持板6の粘着層7に所定の光線を照射しながら枠体1を上方に曲げれば良い。   Next, when removing the semiconductor wafer 4 from the holding plate 6 of the electronic component holder, the electronic component holder is turned upside down so that the semiconductor wafer 4 is directed downward, and the semiconductor wafer 4 is not shown in the drawing. Then, the frame body 1 may be bent upward while irradiating the adhesive layer 7 of the holding plate 6 with a predetermined light beam.

すると、枠体1を変形させる外力が緩衝連結層8に作用して引っ張るので、保持板6が弓なりに変形して半導体ウェーハ4から剥離し、この剥離により、半導体ウェーハ4を円滑かつ確実に取り外すことができる。   Then, since the external force that deforms the frame 1 acts on the buffer connection layer 8 and pulls, the holding plate 6 deforms like a bow and peels from the semiconductor wafer 4, and the semiconductor wafer 4 is removed smoothly and reliably by this peeling. be able to.

次に、図3は本発明の第2の実施形態を示すもので、この場合には、保持板6を中空のリング形に区画形成して半導体ウェーハ4の表裏両面をそれぞれ露出させるようにし、枠体1の裏面と保持板6の裏面との間に、中空のリング形に区画形成した緩衝連結層8を架設して接着するようにしている。   Next, FIG. 3 shows a second embodiment of the present invention. In this case, the holding plate 6 is partitioned into a hollow ring shape so that both the front and back surfaces of the semiconductor wafer 4 are exposed, Between the back surface of the frame 1 and the back surface of the holding plate 6, a buffer connection layer 8 partitioned and formed in a hollow ring shape is constructed and bonded.

保持板6は、半導体ウェーハ4よりもやや拡径のリング形に区画形成され、表面に平面リング形の粘着層7が積層粘着されており、この粘着層7の表面に半導体ウェーハ4の回路パターンが形成されない周縁部が着脱自在に粘着保持される。その他の部分については、上記実施形態と略同様であるので説明を省略する。   The holding plate 6 is partitioned and formed in a ring shape having a diameter slightly larger than that of the semiconductor wafer 4, and a flat ring-shaped adhesive layer 7 is laminated and adhered to the surface, and the circuit pattern of the semiconductor wafer 4 is adhered to the surface of the adhesive layer 7. The peripheral edge where no is formed is detachably adhered. The other parts are substantially the same as those in the above embodiment, and thus description thereof is omitted.

本実施形態においても上記実施形態と同様の作用効果が期待でき、しかも、半導体ウェーハ4の表裏両面をそれぞれ露出させることができるので、表裏両面に回路パターンが形成された半導体ウェーハ4の厚さ方向の導通検査が可能になるのは明らかである。さらに、保持板6の粘着層7と半導体ウェーハ4との接触面積が減少するので、半導体ウェーハ4の汚染防止が期待できる。   In this embodiment, the same effect as that of the above embodiment can be expected, and both the front and back surfaces of the semiconductor wafer 4 can be exposed. Therefore, the thickness direction of the semiconductor wafer 4 in which the circuit pattern is formed on both the front and back surfaces. It is clear that the continuity test can be performed. Furthermore, since the contact area between the adhesive layer 7 of the holding plate 6 and the semiconductor wafer 4 is reduced, the contamination of the semiconductor wafer 4 can be expected to be prevented.

なお、上記実施形態では枠体1の外周部の一部3を直線的に切り欠いたが、何らこれに限定されるものではない。例えば、外周部の一部3に半円形の切り欠きを形成して方向性の識別や位置決めに使用しても良い。また、保持板6を自己粘着性の材料を使用して形成し、保持板6と粘着層7とを一体化しても良い。   In addition, in the said embodiment, although the part 3 of the outer peripheral part of the frame 1 was notched linearly, it is not limited to this at all. For example, a semicircular cutout may be formed in a part 3 of the outer peripheral portion and used for direction identification and positioning. Alternatively, the holding plate 6 may be formed using a self-adhesive material, and the holding plate 6 and the adhesive layer 7 may be integrated.

1 枠体
2 隙間
4 半導体ウェーハ(電子部品)
6 保持板
7 粘着層
8 緩衝連結層
1 Frame 2 Gap 4 Semiconductor wafer (electronic component)
6 Holding plate 7 Adhesive layer 8 Buffer connection layer

Claims (3)

電子部品を着脱自在に保持する電子部品保持具であって、枠体と、この枠体内に隙間を介して嵌め入れられ、電子部品を着脱自在に保持する保持板と、これら枠体と保持板とを連結する緩衝連結層とを含み、
枠体、保持板、及び緩衝連結層に可撓性をそれぞれ付与し、保持板の表面に電子部品用の粘着層を設けたことを特徴とする電子部品保持具。
An electronic component holder that detachably holds an electronic component, a frame, a holding plate that is fitted into the frame via a gap and holds the electronic component detachably, and the frame and the holding plate A buffer connection layer for connecting
An electronic component holder comprising a frame, a holding plate, and a buffer connection layer, each having flexibility, and an adhesive layer for an electronic component provided on the surface of the holding plate.
保持板を中空に形成して電子部品の表裏面を露出させるようにし、枠体の裏面と保持板の裏面との間に緩衝連結層を架設した請求項1記載の電子部品保持具。   The electronic component holder according to claim 1, wherein the holding plate is formed to be hollow so that the front and back surfaces of the electronic component are exposed, and a buffer connection layer is provided between the back surface of the frame body and the back surface of the holding plate. 保持板の表面に、光線の照射により粘着性が低下する光硬化性の粘着層を積層した請求項1又は2記載の電子部品保持具。   The electronic component holder according to claim 1 or 2, wherein a photocurable adhesive layer whose adhesiveness is reduced by irradiation of light is laminated on the surface of the holding plate.
JP2009047830A 2009-03-02 2009-03-02 Electronic component holder Expired - Fee Related JP5328422B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009047830A JP5328422B2 (en) 2009-03-02 2009-03-02 Electronic component holder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009047830A JP5328422B2 (en) 2009-03-02 2009-03-02 Electronic component holder

Publications (2)

Publication Number Publication Date
JP2010205817A true JP2010205817A (en) 2010-09-16
JP5328422B2 JP5328422B2 (en) 2013-10-30

Family

ID=42967058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009047830A Expired - Fee Related JP5328422B2 (en) 2009-03-02 2009-03-02 Electronic component holder

Country Status (1)

Country Link
JP (1) JP5328422B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011023546A (en) * 2009-07-16 2011-02-03 Shin Etsu Polymer Co Ltd Electronic component holder and method for using the same
JP2013175628A (en) * 2012-02-27 2013-09-05 Shin Etsu Polymer Co Ltd Peeling device of jig for semiconductor wafer and handling method of semiconductor wafer
JP2013179111A (en) * 2012-02-28 2013-09-09 Shin Etsu Polymer Co Ltd Jig for semiconductor wafer, and method for handling semiconductor wafer
JP2013179112A (en) * 2012-02-28 2013-09-09 Shin Etsu Polymer Co Ltd Jig for semiconductor wafer, and method for handling semiconductor wafer
JP2020053473A (en) * 2018-09-25 2020-04-02 パナソニックIpマネジメント株式会社 Method for manufacturing element chip

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110265345A (en) * 2019-05-24 2019-09-20 信利光电股份有限公司 A kind of drying method and equipment of underlay substrate

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0231788Y2 (en) * 1986-01-28 1990-08-28
JPH042146A (en) * 1990-04-18 1992-01-07 Mitsubishi Electric Corp Wafer holder
JP2000124162A (en) * 1998-10-14 2000-04-28 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device
JP2003332267A (en) * 2002-05-09 2003-11-21 Lintec Corp Method for working semiconductor wafer
JP2005333101A (en) * 2004-04-23 2005-12-02 Sekisui Chem Co Ltd Support plate
JP2007048885A (en) * 2005-08-09 2007-02-22 Shin Etsu Polymer Co Ltd Frame for dicing of semiconductor wafer
JP2009016479A (en) * 2007-07-03 2009-01-22 Konica Minolta Holdings Inc Flexible substrate retainer, method for manufacturing organic electroluminescence panel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0231788Y2 (en) * 1986-01-28 1990-08-28
JPH042146A (en) * 1990-04-18 1992-01-07 Mitsubishi Electric Corp Wafer holder
JP2000124162A (en) * 1998-10-14 2000-04-28 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device
JP2003332267A (en) * 2002-05-09 2003-11-21 Lintec Corp Method for working semiconductor wafer
JP2005333101A (en) * 2004-04-23 2005-12-02 Sekisui Chem Co Ltd Support plate
JP2007048885A (en) * 2005-08-09 2007-02-22 Shin Etsu Polymer Co Ltd Frame for dicing of semiconductor wafer
JP2009016479A (en) * 2007-07-03 2009-01-22 Konica Minolta Holdings Inc Flexible substrate retainer, method for manufacturing organic electroluminescence panel

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011023546A (en) * 2009-07-16 2011-02-03 Shin Etsu Polymer Co Ltd Electronic component holder and method for using the same
JP2013175628A (en) * 2012-02-27 2013-09-05 Shin Etsu Polymer Co Ltd Peeling device of jig for semiconductor wafer and handling method of semiconductor wafer
JP2013179111A (en) * 2012-02-28 2013-09-09 Shin Etsu Polymer Co Ltd Jig for semiconductor wafer, and method for handling semiconductor wafer
JP2013179112A (en) * 2012-02-28 2013-09-09 Shin Etsu Polymer Co Ltd Jig for semiconductor wafer, and method for handling semiconductor wafer
JP2020053473A (en) * 2018-09-25 2020-04-02 パナソニックIpマネジメント株式会社 Method for manufacturing element chip
JP7209247B2 (en) 2018-09-25 2023-01-20 パナソニックIpマネジメント株式会社 Element chip manufacturing method

Also Published As

Publication number Publication date
JP5328422B2 (en) 2013-10-30

Similar Documents

Publication Publication Date Title
JP2008103494A (en) Fixed jig, and method and apparatus for picking up chip
KR101143036B1 (en) Chip pickup method and chip pickup apparatus
JP5328422B2 (en) Electronic component holder
CN111211251B (en) Method of peeling mother protective film and method of manufacturing organic light emitting display device using the same
KR102061369B1 (en) Method for the temporary connection of a product substrate to a carrier substrate
TW200805546A (en) Support plate, transfer apparatus, peeling apparatus and peeling method
WO2006087894A1 (en) Fixation carrier, production method of fixation carrier, use method of fixation carrier, and substrate reception container
JP5234644B2 (en) Adhesive holding tray
JP2005327758A (en) Part holder
JP2012114265A (en) Semiconductor wafer holder and semiconductor wafer handling method
JP6301565B1 (en) Method and apparatus for separating a microchip from a wafer and mounting the microchip on a substrate
JP2006032488A (en) Electronic component holder and its using method
JP4566626B2 (en) Semiconductor substrate cutting method and semiconductor chip selective transfer method
JP5995636B2 (en) Support jig for semiconductor wafer plating
US20100151211A1 (en) Thin film device, method of manufacturing thin film device, and electronic apparatus
JP2008305951A (en) Component fixing jig
JP2003338478A (en) Separating method of brittle material and hard plate as well as separating device employing the same
JP2010153409A (en) Holding tool
JP2009054628A (en) Substrate holder
JP2005209829A (en) Method and apparatus of fixing semiconductor wafer, and structure to fix semiconductor wafer
JP2014007290A (en) Carrier jig for crystal wafer
JP2005353859A (en) Exfoliation method of semiconductor wafer
JP2009023725A (en) Component holder
JP2007227726A (en) Aggregate substrate processing method
JP2011151229A (en) Supporting medium for adhesive sheet and support frame

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120208

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130221

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130226

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130419

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130723

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130723

R150 Certificate of patent or registration of utility model

Ref document number: 5328422

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees