JP2010141098A - 電子部品内蔵基板及びその製造方法 - Google Patents

電子部品内蔵基板及びその製造方法 Download PDF

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Publication number
JP2010141098A
JP2010141098A JP2008315513A JP2008315513A JP2010141098A JP 2010141098 A JP2010141098 A JP 2010141098A JP 2008315513 A JP2008315513 A JP 2008315513A JP 2008315513 A JP2008315513 A JP 2008315513A JP 2010141098 A JP2010141098 A JP 2010141098A
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JP
Japan
Prior art keywords
electronic component
wiring board
wiring
substrate
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008315513A
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English (en)
Japanese (ja)
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JP2010141098A5 (enExample
Inventor
Eiji Takaike
英次 高池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008315513A priority Critical patent/JP2010141098A/ja
Priority to US12/635,066 priority patent/US8559184B2/en
Publication of JP2010141098A publication Critical patent/JP2010141098A/ja
Publication of JP2010141098A5 publication Critical patent/JP2010141098A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H05K1/186—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10515—Stacked components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/041—Solder preforms in the shape of solder balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2008315513A 2008-12-11 2008-12-11 電子部品内蔵基板及びその製造方法 Pending JP2010141098A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008315513A JP2010141098A (ja) 2008-12-11 2008-12-11 電子部品内蔵基板及びその製造方法
US12/635,066 US8559184B2 (en) 2008-12-11 2009-12-10 Electronic component built-in substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008315513A JP2010141098A (ja) 2008-12-11 2008-12-11 電子部品内蔵基板及びその製造方法

Publications (2)

Publication Number Publication Date
JP2010141098A true JP2010141098A (ja) 2010-06-24
JP2010141098A5 JP2010141098A5 (enExample) 2012-01-12

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JP2008315513A Pending JP2010141098A (ja) 2008-12-11 2008-12-11 電子部品内蔵基板及びその製造方法

Country Status (2)

Country Link
US (1) US8559184B2 (enExample)
JP (1) JP2010141098A (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187681A (ja) * 2010-03-09 2011-09-22 Toshiba Corp 半導体装置の製造方法および半導体装置
EP2592915B1 (en) * 2010-07-06 2022-01-26 Fujikura, Ltd. Manufacturing method for laminated wiring board
US8472207B2 (en) * 2011-01-14 2013-06-25 Harris Corporation Electronic device having liquid crystal polymer solder mask and outer sealing layers, and associated methods
US8649183B2 (en) 2011-02-10 2014-02-11 Mulpin Research Laboratories, Ltd. Electronic assembly
US8966747B2 (en) 2011-05-11 2015-03-03 Vlt, Inc. Method of forming an electrical contact
TWI425886B (zh) * 2011-06-07 2014-02-01 欣興電子股份有限公司 嵌埋有電子元件之封裝結構及其製法
KR20130097481A (ko) * 2012-02-24 2013-09-03 삼성전자주식회사 인쇄회로기판(pcb) 및 그 pcb를 포함한 메모리 모듈
JP5285819B1 (ja) * 2012-11-07 2013-09-11 太陽誘電株式会社 電子回路モジュール
KR101420526B1 (ko) * 2012-11-29 2014-07-17 삼성전기주식회사 전자부품 내장기판 및 그 제조방법
US10264664B1 (en) * 2015-06-04 2019-04-16 Vlt, Inc. Method of electrically interconnecting circuit assemblies
US10785871B1 (en) * 2018-12-12 2020-09-22 Vlt, Inc. Panel molded electronic assemblies with integral terminals
US11336167B1 (en) 2016-04-05 2022-05-17 Vicor Corporation Delivering power to semiconductor loads
DE102017209249A1 (de) * 2017-05-31 2018-12-06 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur herstellung eines packages und package
KR20190012485A (ko) * 2017-07-27 2019-02-11 삼성전기주식회사 인쇄회로기판 및 그 제조 방법
JP6835971B2 (ja) * 2017-08-04 2021-02-24 株式会社フジクラ 多層プリント配線板の製造方法及び多層プリント配線板
US10553563B2 (en) * 2018-05-30 2020-02-04 Epistar Corporation Electronic device
US10790232B2 (en) * 2018-09-15 2020-09-29 International Business Machines Corporation Controlling warp in semiconductor laminated substrates with conductive material layout and orientation
KR102854182B1 (ko) * 2020-07-06 2025-09-03 삼성전기주식회사 전자부품 내장기판
KR20220106561A (ko) * 2021-01-22 2022-07-29 삼성전자주식회사 양면 배치형 전자 부품 모듈 및 그를 포함하는 전자장치
CN115954330A (zh) * 2023-02-03 2023-04-11 长鑫存储技术有限公司 封装结构及其制备方法
CN119896045A (zh) * 2023-02-09 2025-04-25 微芯片技术卡尔迪科特有限公司 具有嵌入式部件封装和烧结过孔的pcb堆叠
US20240276637A1 (en) * 2023-02-09 2024-08-15 Microchip Technology Caldicot Limited Pcb stack with embedded component package and sintered vias
US20250105162A1 (en) * 2023-09-21 2025-03-27 JCET STATS ChipPAC Korea Limited Semiconductor Device and Method of Forming Fine-Pitch Interconnection Using Insulating Layer

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005142178A (ja) * 2003-11-04 2005-06-02 Cmk Corp 電子部品内蔵多層プリント配線板
JP2006156669A (ja) * 2004-11-29 2006-06-15 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法
JP2007173570A (ja) * 2005-12-22 2007-07-05 Matsushita Electric Ind Co Ltd 半導体装置、その製造方法、および半導体装置を備えた電子機器
JP2008205290A (ja) * 2007-02-21 2008-09-04 Fujitsu Ltd 部品内蔵基板及びその製造方法
JP2008294475A (ja) * 2001-10-18 2008-12-04 Panasonic Corp 部品内蔵モジュールの製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
KR100335717B1 (ko) * 2000-02-18 2002-05-08 윤종용 고용량 메모리 카드
US7485489B2 (en) * 2002-06-19 2009-02-03 Bjoersell Sten Electronics circuit manufacture
US7394663B2 (en) * 2003-02-18 2008-07-01 Matsushita Electric Industrial Co., Ltd. Electronic component built-in module and method of manufacturing the same
US8093506B2 (en) * 2006-12-21 2012-01-10 Ngk Spark Plug Co., Ltd. Multilayer wiring board and power supply structure to be embedded in multilayer wiring board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008294475A (ja) * 2001-10-18 2008-12-04 Panasonic Corp 部品内蔵モジュールの製造方法
JP2005142178A (ja) * 2003-11-04 2005-06-02 Cmk Corp 電子部品内蔵多層プリント配線板
JP2006156669A (ja) * 2004-11-29 2006-06-15 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法
JP2007173570A (ja) * 2005-12-22 2007-07-05 Matsushita Electric Ind Co Ltd 半導体装置、その製造方法、および半導体装置を備えた電子機器
JP2008205290A (ja) * 2007-02-21 2008-09-04 Fujitsu Ltd 部品内蔵基板及びその製造方法

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Publication number Publication date
US8559184B2 (en) 2013-10-15
US20100149768A1 (en) 2010-06-17

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