JP2010080943A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP2010080943A JP2010080943A JP2009194370A JP2009194370A JP2010080943A JP 2010080943 A JP2010080943 A JP 2010080943A JP 2009194370 A JP2009194370 A JP 2009194370A JP 2009194370 A JP2009194370 A JP 2009194370A JP 2010080943 A JP2010080943 A JP 2010080943A
- Authority
- JP
- Japan
- Prior art keywords
- region
- insulating film
- electrode
- ion
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76823—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. transforming an insulating layer into a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009194370A JP2010080943A (ja) | 2008-08-27 | 2009-08-25 | 半導体装置の作製方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008217613 | 2008-08-27 | ||
| JP2009194370A JP2010080943A (ja) | 2008-08-27 | 2009-08-25 | 半導体装置の作製方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010080943A true JP2010080943A (ja) | 2010-04-08 |
| JP2010080943A5 JP2010080943A5 (enExample) | 2012-09-13 |
Family
ID=41726080
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009194370A Withdrawn JP2010080943A (ja) | 2008-08-27 | 2009-08-25 | 半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US8222097B2 (enExample) |
| JP (1) | JP2010080943A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102011012722A1 (de) | 2010-03-31 | 2011-10-06 | Mazda Motor Corp. | Verfahren zur Detektion anomaler Verbrennung für einen Fremdzündungsmotor und Fremdzündungsmotor |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8610155B2 (en) * | 2008-11-18 | 2013-12-17 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting device, method for manufacturing the same, and cellular phone |
| US8576209B2 (en) | 2009-07-07 | 2013-11-05 | Semiconductor Energy Laboratory Co., Ltd. | Display device |
| JP5960000B2 (ja) * | 2012-09-05 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| TWI625847B (zh) * | 2016-09-09 | 2018-06-01 | 友達光電股份有限公司 | 畫素結構及其製作方法 |
| US12112982B2 (en) * | 2018-11-14 | 2024-10-08 | Northwestern University | Nanoscale resolution, spatially-controlled conductivity modulation of dielectric materials using a focused ion beam |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02504092A (ja) * | 1987-06-12 | 1990-11-22 | マサチューセッツ インスティテュート オブ テクノロジー | 積層回路における層間導電路の製造 |
| JPH06318559A (ja) * | 1993-05-07 | 1994-11-15 | Hitachi Ltd | 高エネルギーイオン注入による半導体装置の製造方法 |
| JP2005340377A (ja) * | 2004-05-25 | 2005-12-08 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法及び半導体装置 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5354695A (en) | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
| US5985693A (en) | 1994-09-30 | 1999-11-16 | Elm Technology Corporation | High density three-dimensional IC interconnection |
| WO1995025341A1 (en) | 1994-03-15 | 1995-09-21 | Irvine Sensors Corporation | 3d stack of ic chips having leads reached by vias through passivation covering access plane |
| JPH08222631A (ja) | 1995-02-13 | 1996-08-30 | Sony Corp | 多層配線形成方法 |
| JPH11163129A (ja) | 1997-11-28 | 1999-06-18 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| US6271542B1 (en) | 1997-12-08 | 2001-08-07 | International Business Machines Corporation | Merged logic and memory combining thin film and bulk Si transistors |
| JP2002151816A (ja) | 2000-11-10 | 2002-05-24 | Ibiden Co Ltd | 表裏間導電箇所を有する絶縁膜およびその製造方法 |
| TW513791B (en) | 2001-09-26 | 2002-12-11 | Orient Semiconductor Elect Ltd | Modularized 3D stacked IC package |
| US6717222B2 (en) | 2001-10-07 | 2004-04-06 | Guobiao Zhang | Three-dimensional memory |
| TW519310U (en) | 2001-12-18 | 2003-01-21 | Via Tech Inc | Electric connection apparatus |
| US6762076B2 (en) | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
| US6835974B2 (en) | 2002-03-14 | 2004-12-28 | Jeng-Jye Shau | Three dimensional integrated circuits using sub-micron thin-film diodes |
| US7312487B2 (en) | 2004-08-16 | 2007-12-25 | International Business Machines Corporation | Three dimensional integrated circuit |
| US7262494B2 (en) | 2005-03-16 | 2007-08-28 | Freescale Semiconductor, Inc. | Three-dimensional package |
| US7485968B2 (en) | 2005-08-11 | 2009-02-03 | Ziptronix, Inc. | 3D IC method and device |
| US7626257B2 (en) | 2006-01-18 | 2009-12-01 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
| CN101743629B (zh) * | 2007-07-17 | 2012-06-13 | 夏普株式会社 | 具备薄膜晶体管的半导体装置及其制造方法 |
| US7943473B2 (en) | 2009-01-13 | 2011-05-17 | Maxim Integrated Products, Inc. | Minimum cost method for forming high density passive capacitors for replacement of discrete board capacitors using a minimum cost 3D wafer-to-wafer modular integration scheme |
| US9406561B2 (en) | 2009-04-20 | 2016-08-02 | International Business Machines Corporation | Three dimensional integrated circuit integration using dielectric bonding first and through via formation last |
-
2009
- 2009-08-25 JP JP2009194370A patent/JP2010080943A/ja not_active Withdrawn
- 2009-08-25 US US12/547,098 patent/US8222097B2/en not_active Expired - Fee Related
-
2012
- 2012-07-12 US US13/547,393 patent/US8530973B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02504092A (ja) * | 1987-06-12 | 1990-11-22 | マサチューセッツ インスティテュート オブ テクノロジー | 積層回路における層間導電路の製造 |
| JPH06318559A (ja) * | 1993-05-07 | 1994-11-15 | Hitachi Ltd | 高エネルギーイオン注入による半導体装置の製造方法 |
| JP2005340377A (ja) * | 2004-05-25 | 2005-12-08 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法及び半導体装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102011012722A1 (de) | 2010-03-31 | 2011-10-06 | Mazda Motor Corp. | Verfahren zur Detektion anomaler Verbrennung für einen Fremdzündungsmotor und Fremdzündungsmotor |
| DE102011012722B4 (de) | 2010-03-31 | 2019-09-12 | Mazda Motor Corp. | Verfahren zur Detektion anomaler Verbrennung für einen Fremdzündungsmotor und Fremdzündungsmotor |
Also Published As
| Publication number | Publication date |
|---|---|
| US20100055894A1 (en) | 2010-03-04 |
| US8530973B2 (en) | 2013-09-10 |
| US20130009247A1 (en) | 2013-01-10 |
| US8222097B2 (en) | 2012-07-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7994641B2 (en) | Semiconductor device and method of fabricating the same | |
| US8536629B2 (en) | Semiconductor device and method for manufacturing the same | |
| US20040080001A1 (en) | Complementary integrated circuit and method of manufacturing same | |
| TWI468334B (zh) | 積體半導體元件之製造方法及其結構 | |
| JP2010080943A (ja) | 半導体装置の作製方法 | |
| JP7189848B2 (ja) | 半導体装置およびその製造方法 | |
| TW201007885A (en) | Manufacturing method of semiconductor device, and semiconductor device | |
| JP5616720B2 (ja) | 半導体装置およびその製造方法 | |
| CN102683343A (zh) | 半导体装置及其制造方法 | |
| KR20040014197A (ko) | 반도체 장치 | |
| JP2005175306A (ja) | 半導体集積回路装置及びその製造方法 | |
| US7838375B1 (en) | System and method for providing a polyemit module for a self aligned heterojunction bipolar transistor architecture | |
| CN113921531A (zh) | 半导体装置及其制造方法 | |
| TW200527533A (en) | Semiconductor device and manufacturing method thereof | |
| KR20090120937A (ko) | 3차원 반도체 장치의 제조 방법 | |
| US6717243B2 (en) | Semiconductor device and the manufacturing method thereof | |
| CN119866011A (zh) | 制造半导体器件的方法 | |
| TW201005826A (en) | Semiconductor device, semiconductor chip, manufacturing methods thereof, and stack package | |
| JP2023001787A (ja) | 半導体装置およびその製造方法 | |
| JP2007103809A (ja) | 半導体装置及び半導体装置の製造方法 | |
| KR101003542B1 (ko) | 3차원 반도체 장치의 제조 방법 및 이에 따라 제조된 3차원반도체 장치 | |
| TWI267895B (en) | Manufacturing method of semiconductor device | |
| JP4847718B2 (ja) | 半導体装置及びその製造方法並びに表示装置 | |
| US11232990B2 (en) | Semiconductor device and method of manufacturing the same | |
| JP2008205096A (ja) | 半導体装置およびその製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120726 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120726 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20131219 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140107 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140115 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20140617 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20140804 |