JP2010028145A - Method of manufacturing multilayered printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayered printed wiring board wherein a conductor circuit and a solder resist layer firmly adhere to each other without separating from each other even in a solder bump formation part by improving adhesiveness between the miniaturized conductor circuit and the solder resist layer, and a conduction failure does not occur in the solder bump formation part. <P>SOLUTION: This method is used for manufacturing a multilayered printed wiring board including a conductor circuit for solder pads, a solder resist layer, and solder bumps. The method for manufacturing the multilayered printed wiring board includes processes of: (a) forming the conductor circuit for solder pads each having a line width ≤50 μm by electroless plating and electrolytic plating; (b) treating the upper surface and the side surface of the conductor circuit for solder pads by an etchant containing a cupric complex and an organic acid to form a roughened surface having a maximum roughness (Rmax) of 0.5-10 μm on the conductor circuit for solder pads; (c) executing an acid treatment by an etching treatment, polishing treatment or the like onto the conductor circuit for solder pads after the process (b); (d) covering the conductor circuit for solder pads with a solder resist composition; (e) forming a solder resist layer having openings by removing the solder resist composition of the conductor circuit part for solder pads; and (f) forming solder bumps in the openings. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a printed wiring board, and more particularly to a printed wiring board capable of improving the adhesion between a solder pad conductor circuit and a solder resist layer, the solder pad conductor circuit and a solder bump, and the strength of the solder bump.

  In recent years, so-called build-up multilayer wiring boards have attracted attention due to the demand for higher density of multilayer wiring boards. This build-up multilayer wiring board is manufactured, for example, by a method as disclosed in Patent Document 1.

  According to this method, an insulating material made of a photosensitive electroless plating adhesive is applied onto a core substrate, dried, and then exposed and developed, whereby an interlayer insulating resin layer having a via hole opening is formed. Form. Next, the surface of the interlayer insulating resin layer is roughened by treatment with an oxidizing agent or the like, then a plating resist is provided on the roughened surface, electroless plating is applied to the resist non-forming portion, and two layers including via holes are provided. The conductor circuit pattern is formed. By repeating this process a plurality of times, a multilayered build-up wiring board can be obtained.

  Such a printed wiring board is provided with solder bumps on the surface layer, and is connected to the IC chip via the solder bumps. In this case, the printed wiring board is provided with a solder resist layer so as to protect the surface solder pad conductor circuit and prevent the solder bumps from being fused to each other.

  Further, in such a printed wiring board, the surface of the conductor circuit is roughened in order to improve the adhesion between the solder pad conductor circuit and the solder resist layer. For the roughening treatment of the conductor circuit, blackening-reduction treatment, etching with sulfuric acid-hydrogen peroxide, copper-nickel-phosphorus needle alloy plating (see, for example, Patent Document 2), and the like are used.

Japanese Patent Publication No. 4-55555 JP-A-9-130050

  In recent years, a technique using fine wiring has attracted attention as a circuit pattern of a printed wiring board. This is because the conductor circuit can be densified by such fine wiring.

  However, in the miniaturized conductor circuit, the contact area between the conductor circuit and the solder resist layer is remarkably reduced, and the adhesion between the conductor circuit and the solder resist layer is lowered. In particular, when the conductor circuit is provided in a sparse state on the surface layer of the printed wiring board, the adhesion between the conductor circuit and the solder resist layer is further reduced.

  The present invention improves the adhesion between the miniaturized conductor circuit and the solder resist layer, and even in the solder bump forming portion, the conductor circuit and the solder resist layer are firmly adhered and do not peel off, and the solder bump forming portion It aims at obtaining the printed wiring board which does not cause a conduction defect.

The present invention is a method for producing a multilayer printed wiring board comprising a solder pad conductor circuit, a solder resist layer, and a solder bump.
(A) forming the solder pad conductor circuit by electroless plating and electrolytic plating;
(B) treating the upper and side surfaces of the solder pad conductor circuit with an etchant containing a cupric complex and an organic acid to form a roughened surface on the solder pad conductor circuit;
(C) after the step (b), a step of performing an acid treatment by etching or polishing on the solder pad conductor circuit;
(D) coating the solder pad conductor circuit with a solder resist composition;
(E) removing the solder resist composition from the solder pad conductor circuit portion to form a solder resist layer having an opening;
(F) The present invention relates to a method for manufacturing a multilayer printed wiring board, comprising the step of forming solder bumps in the opening.
According to the present invention, the printed wiring board includes a solder pad conductor circuit and a solder resist layer on the solder pad conductor circuit, and an opening for providing a solder body is formed in the solder resist layer. The solder pad conductor circuit comprises an electroless plating film and an electrolytic plating film, and has a roughened surface treated with an etching solution containing a cupric complex and an organic acid, and the solder The thing which concerns on a printed wiring board with which the resist layer is provided on the said roughening surface can be obtained.

Further, the present invention provides a method for producing a multilayer printed wiring board comprising a solder pad conductor circuit, a solder resist layer, and a solder bump.
(A) forming the solder pad conductor circuit by electroless plating and electrolytic plating;
(B) treating the upper and side surfaces of the solder pad conductor circuit with an etchant containing a cupric complex and an organic acid to form a roughened surface on the solder pad conductor circuit;
(C) after the step (b), heat-treating the roughened surface;
(D) coating the solder pad conductor circuit with a solder resist composition;
(E) removing the solder resist composition from the solder pad conductor circuit portion to form a solder resist layer having an opening;
(F) The present invention relates to a method for manufacturing a multilayer printed wiring board, comprising the step of forming solder bumps in the opening.
According to the present invention, in a printed wiring board comprising a conductor circuit and a solder resist layer on the conductor circuit, and an opening for providing a solder body is formed in the solder resist layer, the conductor circuit includes: The electroless plating film and the electroplating film have a roughened surface, and the roughened surface has a plurality of ridges, depressions, and ridges, and the ridges and the depressions. And the ridge line are dispersedly formed, the adjacent ridge portions are connected by the ridge line, the recess portion is surrounded by the ridge portion and the ridge line, and the solder resist layer is formed. What concerns the printed wiring board provided on the said roughening surface can be obtained.

  In order to improve the adhesion between the surface layer of the multilayer printed wiring board and the solder resist layer, the present inventor has studied various methods for roughening the surface of the conductor circuit. In particular, the present inventor has responded to the desire to increase the adhesion between the conductor circuit formed of fine wiring of 50 μm or less and the solder resist layer and the strength of the solder bump, blackening-reducing treatment, sulfuric acid-peroxidation. A processing method such as etching with hydrogen and copper-nickel-phosphorus needle-like alloy plating was studied.

  However, it has been found that blackening-reducing treatment or the like is inappropriate as roughening treatment for fine wiring. In the blackening-reduction treatment and sulfuric acid-hydrogen peroxide etching treatment, when fine wiring of 50 μm or less is used and the wiring density is sparse, the conductor circuit and the solder resist layer are formed by the convex portions formed on the roughened surface. It has been found that the contact area of the solder becomes smaller and the adhesion of the solder resist layer cannot be improved. In particular, under heat cycle conditions, it was found that the wiring density was peeled off at a sparse part. In addition, the metal in the solder pad was also peeled off or cracks were generated, causing the solder bumps to fall off.

  Moreover, the roughening layer formation by copper-nickel-phosphorus needle-like alloy plating is excellent in the adhesion between the conductor circuit and the solder resist layer, and fine wiring of 50 μm or less, particularly in a sparse part composed of such wiring, It was found that sufficient adhesion was shown. However, since such a roughened layer is formed by plating, when the density of fine wiring is increased, the deposited needle-like alloy stretches on the interlayer insulating layer, connecting the conductor circuits and causing a short circuit. It was.

  In the formation of a roughened layer by copper-nickel-phosphorus needle-like alloy plating, strict management and control of the plating solution are required to prevent precipitation abnormality due to elongation of the needle-like alloy.

  Further, the solder resist layer formed from the resin is removed through exposure and development in the solder bump forming portion. At this time, in the roughened layer made of a copper-nickel-phosphorus needle-like alloy, since the needle-like protrusions are densely packed, the gap between the protrusions is narrow, and when the opening is formed, the developer and the resin residue are removed. The oxidant solution may not flow, and the resin may remain between the protrusions, leaving an organic residue of the solder resist resin at the bottom of the opening. This residue may cause poor conduction between the conductor circuit in the opening and the metal under the bump. In addition, the residue may cause the formation of a noble metal layer in the solder pad and a formation defect, and the strength between the solder pad and the conductor circuit may be reduced.

  Under such knowledge, the present inventor has eagerly studied other roughening treatments. As a result, the roughened surface formed by treating the surface of the conductor circuit using an etching solution containing a cupric complex and an organic acid has an adhesiveness to the solder resist resin and the metal under the bump. It has been found that it is excellent in adhesion and is extremely suitable for forming solder bumps, and the present invention has been completed.

  The printed wiring board obtained by the present invention has a roughened surface having a predetermined rough surface shape formed on the conductor circuit as formed by the etching solution, and the solder resist layer is formed through the roughened surface. Is provided. Such a roughened surface can be formed on a conductor circuit having a high wiring density composed of fine wiring of 50 μm or less without causing a conduction failure such as copper-nickel-phosphorus needle-like alloy plating.

  Also, this roughened surface has excellent adhesion to the solder resist layer, and when the solder resist layer is removed at the solder bump forming part, the contact area between the conductor circuit and the solder resist layer is reduced, or fine wiring Even in a printed wiring board having a sparse wiring density, sufficient adhesion between the conductor circuit and the solder resist layer can be ensured.

  Furthermore, when the solder resist layer is removed and an opening for forming a solder bump is provided, the roughened surface has less resin residue on the roughened surface, and has excellent adhesion to the metal under the bump. Does not cause poor conduction in the formation.

It is a drawing substitute photograph of an example roughened surface concerning the present invention. It is a drawing substitute photograph of the roughened surface of the other example concerning this invention. It is a drawing substitute photograph of the roughened surface of the further another example concerning this invention. It is a model drawing of the roughening surface concerning this invention. It is a model drawing of the roughening surface concerning this invention. It is a model drawing of the roughening surface concerning this invention. It is a model drawing of the roughening surface concerning this invention. It is a model drawing of the roughening surface concerning this invention. It is sectional drawing of the other roughening surface concerning this invention. It is sectional drawing of the other roughening surface concerning this invention. It is sectional drawing of the other roughening surface concerning this invention. It is sectional drawing of the other roughening surface concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is a manufacturing-process figure of an example multilayer printed wiring board concerning this invention. It is sectional drawing of the multilayer printed wiring board of the other example concerning this invention. It is a drawing substitute photograph of the roughening layer which consists of acicular alloys.

The present invention will be described in detail with reference to the drawings.
When the solder pad conductor circuit is processed with the etching solution according to the present invention, the surface thereof becomes a roughened surface having a hook-like portion as shown in FIGS. FIG. 1 is a drawing-substituting photograph of an example of a roughened surface according to the present invention. This photograph is a photograph of the roughened surface taken obliquely under an electron microscope. FIG. 2 is a drawing-substituting photograph of another example of the roughened surface according to the present invention. This photograph was also taken in the same manner as the photograph in FIG. 1, but with a higher magnification. FIG. 3 is a drawing-substituting photograph of a roughened surface of still another example according to the present invention. This photograph was taken from directly above the roughened surface under an electron microscope at the same magnification as in FIG.

  In the printed wiring board according to the present invention, the solder resist layer is provided on the conductor circuit through the roughened surface of the solder pad conductor circuit as shown in the electron micrograph.

  4 to 8 are schematic views of the roughened surface. 4 is a plan view, FIG. 5 is a longitudinal sectional view taken along line AA in FIG. 4, FIG. 6 is a longitudinal sectional view taken between the bowl-shaped portion and the recessed portion, and FIG. FIG. 8 is a longitudinal sectional view cut between the ridge line and the recessed portion.

  As shown in FIGS. 4 and 5, the roughened surface according to the present invention has a plurality of ridges 1, a plurality of depressions 2, and a plurality of ridges 3, and the ridges 1 and the depressions 2. And the ridgeline 3 are dispersed. A recess 2 as shown in FIG. 6 is formed between the flange 1 and the adjacent flange 1. Moreover, the hook-shaped part 1 and the adjacent hook-shaped part 1 are mutually connected by the ridgeline 3, as shown in FIG. As shown in FIGS. 6 and 8, the hollow portion 2 is surrounded by the hook-shaped portion 1 and the ridgeline 3.

  For comparison, FIG. 32 shows a drawing-substituting photograph of a roughened layer made of a conventional acicular alloy formed by plating. In the roughened layer shown in this electron micrograph, the acicular alloys overlap with each other, and a space is formed between the acicular alloys. In such a needle-like alloy structure made of Cu-Ni-P, since the needle-like protrusions are densely packed, the gap between the protrusions is narrow, and the oxidant solution for removing the developer and the resin residue does not flow. Resin remains between the protrusions, causing a resin residue.

  On the other hand, the rough surface shape according to the present invention has a bowl-shaped part at the highest part, and a depression is formed at the lowest part around the bowl-shaped part. The part is connected by a ridge line that is lower than these bowl-shaped parts and higher than the hollow part, and exhibits a complicated uneven shape. In such a rough surface having a rough surface, the saddle-shaped portion bites into the solder resist layer, and the conductor circuit and the solder resist layer are firmly adhered to each other. Even in the state of, peeling does not occur between the conductor circuit and the solder resist layer. In addition, the roughened surface has excellent affinity with the plating solution, and the plating penetrates into the recesses of the roughened surface and turns around the wrinkled portion of the roughened surface, so that the wrinkled portion bites into the metal under the bump. The adhesion between the conductor circuit and the solder bump is not lowered.

  Further, on the roughened surface, the ridges are not dense. Moreover, the ridgeline which connects each bowl-shaped part has a shape which does not prevent the flow of resin. For this reason, on this roughened surface, the oxidant solution that removes the developer and the resin residue easily flows between the recesses and the ridges, and the solder resist resin does not easily accumulate. For this reason, the roughened surface concerning this invention does not have the resin residue after image development processing, and is excellent in adhesiveness with a metal under bump.

  Thus, the roughened surface according to the present invention prevents the resin residue after the development process while maintaining the adhesion between the conductor circuit and the solder resist layer and the adhesion between the conductor circuit and the metal under the bump. It has an optimal shape.

  The roughened surface according to the present invention can be formed, for example, by dropping the metal crystal particles on the surface of the conductor circuit with an etching solution containing a cupric complex and an organic acid. On the roughened surface, a recess (recess) is formed at a portion where the metal crystal particles are largely dropped. Such a depression can be formed in a shape in which a substantially polyhedral substance derived from metal crystal particles is scraped off. In the present invention, the substantially polyhedral shape refers to a polyhedron such as a trihedron, a tetrahedron, a pentahedron, a hexahedron, or a polyhedron formed by combining two or more of these polyhedrons. Such dents can prevent resin residue after the development process.

  Further, the ridge portion of the roughened surface can be formed by dropping off the metal crystal particles around the ridge portion. The hook-shaped part formed in this way is composed of angular protrusions, is surrounded by the depressions, and does not overlap each other. The roughened surface having such a complicated uneven shape can prevent the resin residue after the development process while maintaining the adhesion with the solder resist resin and the metal under the bump.

  Furthermore, a ridgeline can be formed on the roughened surface by dropping off adjacent metal crystal particles. The ridge line connects the hook-shaped portion and the adjacent hook-shaped portion at a position lower than the height of the hook-shaped portion. This ridge line is formed in a branched state by dropping three or more adjacent metal crystal particles. Moreover, this ridgeline can be formed in the pointed state by the adjacent metal crystal particle dropping into a substantially polyhedral shape. Such ridge lines can be formed such that the hook-shaped portions are dispersed, and the hook-shaped portions are surrounded by the recessed portions and the ridge lines. Such a roughened surface has a more complicated uneven shape, and can expand the contact surface with the resin and the metal under the bump to further improve the adhesion, and at the same time prevent the resin residue.

  Such roughened surface preferably has a maximum roughness (Rmax) of 0.5 to 10 μm. If the thickness is less than 0.5 μm, the adhesion to the solder resist layer and the adhesion to the metal under the bump are remarkably lowered. If the thickness exceeds 10 μm, a resin residue is generated after the development process, and problems such as disconnection are likely to occur.

Further, such roughened surface, 25 [mu] m ² per average and 2 to 100 of anchor-shaped portion preferably has an average 2 to 100 of recess. An average of 2 to 100 bowl-shaped portions per 25 μm ² is a resin residue after development processing while maintaining the adhesion between the roughened surface and the solder resist layer and the adhesion between the roughened surface and the metal under the bump. The average of 2 to 100 depressions per 25 μm ² prevents crowding of the ridges, suppresses the generation of resin residue after development processing, and provides a roughened surface and a solder resist layer. The adhesion between the roughened surface and the metal under the bump can be maintained.

The average number of ridge lines according to the present invention is preferably 3 to 3000 per 25 μm ² . The number of ridges in this range can complicate the shape of the roughened surface, widen the contact surface with the solder resist layer and the metal under the bump, and improve the adhesion with the solder resist layer, etc. This is because it is easy to remove the rest.

Incidentally, anchor-shaped portion, the number of recess and ridge uses a 5000-fold electron micrograph of as shown in FIGS. 2 and 3, by photographing a roughened surface from directly above, and diagonally above 45 °, the 25 [mu] m ² The area was arbitrarily selected and measured, and the average value was adopted.

  In the present invention, a metal layer can be coated on the roughened surface. 9 to 12 are cross-sectional views of roughened surfaces of other examples according to the present invention. 9-12, the roughened surface as shown in FIGS. 4-8 is each coat | covered with the metal layer 51. FIG.

  The metal layer 51 as shown in FIGS. 9 to 12 is a metal that does not easily oxidize or corrode, or a metal that does not impair the adhesiveness to the solder resist resin and the metal under the bump even when the metal itself is oxidized or corroded. Consists of.

  In addition, the metal layer prevents the formation of oxide film and corrosion film on the roughened surface, and covers the roughened surface while maintaining its shape, and roughens with the solder resist resin and the metal under the bump. The adhesion with the surface is not impaired.

  Such a metal layer prevents a decrease in adhesion strength between the roughened surface and the solder resist layer and a decrease in adhesion strength between the roughened surface and the metal under the bump due to peeling of the oxide film or corrosion. be able to.

  In addition, since the metal layer can increase the hardness of the metal constituting the roughened surface, metal breakdown does not occur on the roughened surface, the roughened surface and the solder resist layer, the roughened surface and the metal under the bump Is further prevented.

  The printed wiring board according to the present invention has a metal layer having a roughened surface, and it is difficult to form an oxide layer or a corrosive layer on the roughened surface. Even if an oxide layer or a corrosive layer is formed, a solder resist resin or Adhesion with the metal under the bump is maintained, and heating does not cause separation between the roughened surface and the solder resist layer or between the roughened surface and the metal under the bump.

  The metal layer is made of at least one metal selected from the group consisting of titanium, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and a noble metal.

  Such a metal is relatively difficult to oxidize or corrode, or even if the metal itself is oxidized or corroded, the adhesion between the solder resist resin and the metal under the bump is not lowered.

  In addition, the metal is a metal or noble metal whose ionization tendency is greater than that of copper and is equal to or less than titanium. If the roughened surface is covered with a layer of these metal or noble metal, the solder resist layer is locally roughened. Dissolution of the conductor circuit due to the electrode reaction can be prevented.

  Examples of the metal that is relatively difficult to oxidize or corrode include non-oxidizing metals such as nickel, tin, cobalt, and noble metals. The noble metal is preferably at least one selected from gold, silver, platinum, and palladium.

  Examples of the metal that does not deteriorate the adhesion between the metal layer and the solder resist resin even if the metal itself is oxidized or corroded include metals such as titanium, zinc, iron, indium, thallium, lead, and bismuth. it can.

  Thus, in the present invention, a metal layer of at least one metal selected from the group consisting of titanium, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and a noble metal is provided on the roughened surface. By coating, it has an optimal shape to prevent the resin residue after development processing, while the adhesion between the solder pad conductor circuit and the solder resist layer, and between the solder pad conductor circuit and the metal under the bump Adhesion and solder bump strength can be improved.

  In order to coat the metal layer on the roughened surface, plating (a method selected from electrolytic plating, electroless plating, displacement plating), vapor deposition, electrodeposition, sputtering, and the like can be used.

  The thickness of the metal layer is preferably 0.01 to 1 μm. In particular, a thickness of 0.03 to 0.5 μm is good. This is because the metal layer having such a thickness can prevent the copper conductor from being oxidized or corroded while maintaining the uneven shape of the roughened surface. When the thickness is less than 0.01 μm, the roughened surface cannot be completely covered. When the thickness exceeds 1 μm, the metal coated between the roughened surfaces may enter, and the unevenness of the roughened surface may be offset. The adhesion between the roughened surface and the solder resist layer and the adhesion between the roughened surface and the metal under the bump may be lowered.

A method for forming a roughened surface according to the present invention will be described.
Such a roughened surface can be formed by treating a conductor circuit serving as a solder pad with an etching solution containing a cupric complex and an organic acid. Such an etching solution can dissolve the copper conductor circuit under oxygen coexisting conditions such as spraying and bubbling. It is estimated that the etching proceeds according to the following reaction formula.

[Wherein, A represents a complexing agent (acting as a chelating agent), and n represents a coordination number. ]

  As shown in the above reaction formula, the generated cuprous complex is dissolved by the action of an acid, is combined with oxygen to become a cupric complex, and again contributes to the oxidation of copper.

  The cupric complex used in the present invention is preferably an azole cupric complex. This type of cupric complex acts as an oxidizing agent that oxidizes metallic copper and the like. As azoles, diazole, triazole, and tetrazole are preferable. Among these, imidazole, 2-methylimidazole, 2-ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-undecylimidazole and the like are preferable. The addition amount of the cupric complex of azoles is preferably 1 to 15% by weight. It is because it is excellent in solubility and stability.

  The organic acid is blended with the cupric complex in order to dissolve the copper oxide. When using cupric complexes of azoles, the organic acids are formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, At least one selected from the group consisting of maleic acid, benzoic acid, glycolic acid, lactic acid, malic acid, and sulfamic acid is preferable. The content of the organic acid is preferably 0.1 to 30% by weight. This is to maintain the solubility of oxidized copper and to ensure dissolution stability.

  In the etching solution according to the present invention, halogen ions such as fluorine ions, chlorine ions and bromine ions may be added in order to assist the dissolution of copper and the oxidizing action of azoles. Such halogen ions can be supplied as hydrochloric acid, sodium chloride or the like. The addition amount of halogen ions is preferably 0.01 to 20% by weight. This is because the adhesion between the roughened surface formed and the solder resist layer is excellent.

  The etching solution according to the present invention can be prepared by dissolving a cupric complex of an azole and an organic acid (halogen ions as necessary) in water. Moreover, a commercially available etching liquid, for example, a product name “MEC Etch Bond” manufactured by MEC Co., Ltd. can be used.

  The average etching amount with such an etching solution is preferably 0.1 to 10 μm. If the thickness is less than 0.1 μm, the adhesion between the roughened surface and the solder resist layer is lowered, and if it exceeds 10 μm, a resin residue is likely to be generated, and disconnection or the like is likely to occur in a fine wiring of 50 μm or less.

  In this invention, a metal layer can be coat | covered on the roughening surface formed in this way. The metal layer is made of at least one metal selected from the group consisting of titanium, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth, and a noble metal. The coating of the metal layer can be performed by any of plating, vapor deposition, electrodeposition, and sputtering. In terms of the uniformity of the film to be formed, it is preferable to carry out by plating.

  Moreover, in this invention, in order to form this metal layer uniformly, after forming a roughened surface, the metal layer can be formed after heat-treating the roughened surface. Due to the heat treatment, the etching solution and its residual components are evaporated, and the surface state of the roughened surface becomes uniform, so that the metal layer is easily formed.

  The temperature of the heat treatment can be set in various ranges depending on the shape and thickness of the roughened surface, the metal component and thickness of the conductor circuit for solder pads, and the like. In particular, the range of 50 to 250 ° C. is preferable. When the temperature is lower than 50 ° C., the effect of the heat treatment is not observed. When the temperature exceeds 250 ° C., the roughened surface is oxidized, and the formed metal layer becomes non-uniform.

  In the present invention, a solder resist layer is formed on the roughened surface having a predetermined shape formed as described above. The thickness of the solder resist layer is preferably 5 to 40 μm. If it is too thin, the solder resist layer will not function as a solder dam, and if it is too thick, it will be difficult to form openings for solder bumps, and it will cause contact with the solder body and cause cracks in the solder body. It is.

  The solder resist layer can be formed from various resins. For example, it can be formed by curing a bisphenol A type epoxy resin or its acrylate, or a novolac type epoxy resin or its acrylate with an amine-based curing agent or an imidazole curing agent.

  In particular, when an opening is provided in the solder resist layer to form a solder bump, it is preferable to cure a novolac type epoxy resin or its acrylate with an imidazole curing agent. The solder resist layer made of such a resin has an advantage that lead migration (a phenomenon in which lead ions diffuse in the solder resist layer) is small.

  In addition, in the case of a resin obtained by curing an acrylate of a novolak type epoxy resin with an imidazole curing agent, it has excellent heat resistance and alkali resistance, and does not deteriorate even at a temperature at which the solder melts (around 200 ° C.), like nickel plating or gold plating. Does not decompose with strong basic plating solution. Examples of the acrylate of the novolak type epoxy resin include an epoxy resin obtained by reacting glycidyl ether of phenol novolak or cresol novolak with acrylic acid or methacrylic acid.

  However, since the solder resist layer formed from the acrylate of a novolac type epoxy resin is made of a resin having a rigid skeleton, it is likely to peel off from the conductor circuit. The roughened surface according to the present invention can advantageously prevent such peeling.

  The imidazole curing agent is desirably liquid at 25 ° C. This is because uniform mixing is easy if liquid. Examples of the curing agent include 1-benzyl-2-methylimidazole (product name: 1B2MZ), 1-cyanoethyl-2-ethyl-4-methylimidazole (product name: 2E4MZ-CN), 4-methyl-2-ethylimidazole (product name). : 2E4MZ).

  Such a resin and a curing agent are preferably dissolved in a glycol ether solvent to form a solder resist composition. When a solder resist layer is formed from such a composition, free oxygen is not generated and the copper pad surface is not oxidized. In addition, it is less harmful to the human body.

As a glycol ether solvent, the following general formula:
_{CH 3 O- (CH 2 CH 2} O) n -CH 3 (n = 1~5)
The solvent represented by these can be used.

  Particularly preferably, at least one selected from the group consisting of diethylene glycol dimethyl ether (DMDG) and triethylene glycol dimethyl ether (DMTG) is used. These solvents can completely dissolve reaction initiators such as benzophenone and Michler ketone by heating at about 30 to 50 ° C. The amount of the solvent is preferably 10 to 40% by weight of the solder resist composition.

  The addition amount of the imidazole curing agent is desirably 1 to 10% by weight with respect to the total solid content of the solder resist composition. This is because uniform mixing is easy if the added amount is within this range.

  In addition to the above-described solder resist compositions, various antifoaming agents, leveling agents, initiators, photosensitizers, thermosetting to improve heat resistance and base resistance and impart flexibility. A photosensitive resin, a photosensitive monomer for improving resolution, and the like can be added.

  As a leveling agent, what consists of a polymer of an acrylic ester is good. Further, Irgacure I907 manufactured by Ciba Geigy is preferable as the initiator, and DETX-S manufactured by Nippon Kayaku is preferable as the photosensitizer.

  A bisphenol type epoxy resin can be used as the thermosetting resin. This bisphenol type epoxy resin includes a bisphenol A type epoxy resin and a bisphenol F type epoxy resin. When the basic resistance is important, the former is required when the viscosity is reduced (when the coating property is important). The latter is better.

  As the photosensitive monomer, a polyvalent acrylic monomer can be used. This is because the polyvalent acrylic monomer can improve the resolution. For example, polyvalent acrylic monomers such as DPE-6A manufactured by Nippon Kayaku and R-604 manufactured by Kyoeisha Chemical Co., Ltd. can be used.

  You may add a pigment | dye, a pigment, etc. to this solder resist composition. This is because the wiring pattern can be concealed. As such a dye, phthalocyanine green is desirably used.

  The solder resist composition should have a viscosity of 0.5 to 10 Pa · s, more preferably 1 to 10 Pa · s at 25 ° C. This is because it is easy to apply with a roll coater.

  An opening can be formed in the solder resist layer made of such a composition by exposure and development.

  Next, a method for producing a printed wiring board according to the present invention will be described. The following method is mainly based on the semi-additive method, but the full additive method may be adopted.

  In the present invention, a wiring board is produced in which a conductor circuit to be a solder pad is formed on the surface of the board. As the substrate, a glass epoxy substrate, a polyimide substrate, a resin insulating substrate such as a bismaleimide-triazine resin substrate, a ceramic substrate, a metal substrate, or the like can be used.

  Such a wiring board may be a multilayer printed wiring board having a plurality of layers of conductor circuits formed therein. As a method for forming such a multi-layer conductor circuit, for example, an adhesive layer made of an electroless plating adhesive is formed as an interlayer insulating resin layer on a lower conductor circuit provided on a substrate, and this adhesion is performed. The surface of the agent layer is roughened to form a roughened surface, and the entire roughened surface is subjected to thin electroless plating, a plating resist is formed, and a thick electrolytic plating is applied to a portion where the plating resist is not formed. There is a method in which a resist is removed and an etching process is performed to form a two-layer conductor circuit composed of an electrolytic plating film and an electroless plating film. The conductor circuit is preferably a copper pattern.

  The most suitable electroless plating adhesive is one in which cured heat-resistant resin particles that are soluble in acids and oxidants are dispersed in an uncured heat-resistant resin that is hardly soluble in acids and oxidants. . This is because such heat-resistant resin particles are dissolved and removed by treatment with an acid or an oxidant to form a roughened surface composed of crucible-shaped anchors on the surface. Such an electroless plating adhesive may be composed of two layers having different compositions.

  As the heat-resistant resin particles that are cured in acid or oxidant and cured, (1) heat-resistant resin powder having an average particle diameter of 10 μm or less and (2) heat-resistant resin powder having an average particle diameter of 2 μm or less are aggregated. Agglomerated particles, (3) a mixture of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm and a heat-resistant resin powder having an average particle diameter of less than 2 μm, and (4) a heat-resistant resin powder having an average particle diameter of 2 to 10 μm. Suspicious particles in which at least one of a heat-resistant resin powder having an average particle size of 2 μm or less and an inorganic powder are attached to the surface of (5), and (5) a heat-resistant resin powder having an average particle size of 0.1 to 0.8 μm; A mixture with a heat-resistant resin powder having an average particle size of more than 0.8 μm and less than 2 μm, and (6) at least one particle selected from the group consisting of a heat-resistant resin powder having an average particle size of 0.1 to 1.0 μm It is desirable to use This is because they form more complex anchors. The roughened surface obtained with these particles can have a maximum roughness (Rmax) of 0.1 to 20 μm.

  The mixing ratio of the heat-resistant resin particles is 5 to 50% by weight, preferably 10 to 40% by weight, based on the solid content of the matrix made of the heat-resistant resin. The heat-resistant resin particles may be made of an amino resin (melamine resin, urea resin, guanamine resin, etc.), an epoxy resin, or the like.

  The uncured heat-resistant resin hardly soluble in an acid or an oxidant is preferably composed of a resin composite of a thermosetting resin and a thermoplastic resin, or a resin composite of a photosensitive resin and a thermoplastic resin. This is because the former has high heat resistance, and the latter can form a via hole opening by photolithography.

  As such a thermosetting resin, an epoxy resin, a phenol resin, a polyimide resin, or the like can be used. In the case of sensitization, the thermosetting group is acrylated with methacrylic acid or acrylic acid. In particular, acrylates of epoxy resins are optimal. As the epoxy resin, a novolak type epoxy resin such as a phenol novolak type or a cresol novolak type, a dicyclopentadiene-modified alicyclic epoxy resin, or the like can be used.

  As the thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PPE), polyetherimide (PI), or the like can be used. .

  The mixing ratio of the thermosetting resin (photosensitive resin) and the thermoplastic resin is preferably thermosetting resin (photosensitive resin) / thermoplastic resin = 95/5 to 50/50. This is because high physical property values can be obtained without impairing heat resistance.

  Next, the adhesive for electroless plating is cured to form an interlayer insulating resin layer, and an opening for forming a via hole can be provided in the interlayer resin resin layer.

  When the resin matrix of the adhesive for electroless plating is a thermosetting resin, the opening for forming the via hole is perforated using laser light, oxygen plasma, or the like. And drill. In addition, after the exposure and development treatment, after placing a photomask (a glass substrate is preferable) on which a circular pattern is drawn for via hole formation so that the circular pattern side is in close contact with the photosensitive interlayer resin insulating layer, Exposure and development processing.

  Next, the surface of the interlayer resin insulation layer (adhesive layer for electroless plating) provided with via hole formation openings is roughened. In particular, the surface of the adhesive layer is roughened by dissolving and removing the heat-resistant resin particles present on the surface of the electroless plating adhesive layer with an acid or an oxidizing agent. At this time, a roughened surface is formed in the interlayer resin insulation layer.

  As the acid, inorganic acids such as phosphoric acid, hydrochloric acid and sulfuric acid, or organic acids such as formic acid and acetic acid can be used. In particular, it is desirable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. As the oxidizing agent, it is desirable to use chromic acid or permanganate (such as potassium permanganate).

  Such roughened surface preferably has a maximum roughness (Rmax) of 0.1 to 20 μm. This is because if the layer is too thick, the layer itself is easily damaged and peeled off, and if it is too thin, the adhesion is lowered. In particular, in the semi-additive method, 0.1 to 5 μm is preferable. This is because the electroless plating film is removed while ensuring adhesion.

  Next, a catalyst nucleus is provided on the roughened interlayer resin insulation layer, and a thin electroless plating film is formed on the entire surface. The electroless plating film is preferably electroless copper plating and has a thickness of 1 to 5 μm, more preferably 2 to 3 μm. In addition, as an electroless copper plating solution, the thing of the liquid composition employ | adopted by a conventional method can be used. For example, a liquid composition composed of copper sulfate: 10 g / L, EDTA: 50 g / L, sodium hydroxide: 8 g / L, 37% formaldehyde: 10 mL is preferable.

  Next, a photosensitive resin film (dry film) is laminated on the electroless plating film thus formed, and a photomask (a glass substrate is preferable) in which a plating resist pattern is drawn on the photosensitive resin film. Are placed in close contact with each other, exposed, and developed to form a non-conductor portion provided with a plating resist pattern.

  Next, an electrolytic plating film is formed in addition to the non-conductor portion on the electroless copper plating film, and a conductor portion serving as a conductor circuit and a via hole is provided. As the electrolytic plating, it is desirable to use electrolytic copper plating, and the thickness is preferably 5 to 20 μm.

  Next, after removing the plating resist from the non-conductor circuit part, electrolessly with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate, ammonium persulfate, ferric chloride, cupric chloride, etc. The plating film is removed to obtain an independent conductor circuit and via hole composed of two layers of an electroless plating film and an electrolytic plating film. The catalyst nuclei on the roughened surface exposed in the non-conductor portion are dissolved and removed with a mixed solution of chromic acid, sulfuric acid and hydrogen peroxide, or the like.

  Next, the roughened surface according to the present invention is formed on the conductor circuit to be the surface solder pad. The roughened surface is formed by spraying an etching solution composed of an aqueous solution of the above-described azole cupric complex and an organic acid on the surface of the conductor circuit, or immersing the conductor circuit in the etching solution and bubbling. Can do. The conductor circuit is preferably an electroless plating film or an electrolytic plating film. This is because it is difficult to form a roughened surface in a conductor circuit obtained by etching a thick rolled copper foil.

  The roughened surface thus formed can then be further processed by etching, polishing, oxidation, oxidation-reduction, or the like, and can be covered with a plating film.

  The roughened surface can be covered with a metal layer made of at least one metal selected from the group consisting of titanium, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and noble metals. . The coating method can be performed by plating (a method selected from electrolytic plating, electroless plating, and displacement plating), vapor deposition, electrodeposition, sputtering, and the like.

  A solder resist layer as described above can be formed on a conductor circuit having a roughened surface subjected to such treatment.

The present invention will be described based on examples and comparative examples with reference to the drawings.
Example 1
Raw material composition for preparing electroless plating adhesive (upper layer adhesive)
[Resin composition A]
2. 35 parts by weight of a resin solution prepared by dissolving 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight 2500) in DMDG at a concentration of 80 wt%, photosensitive monomer (Aronix M315, manufactured by Toagosei Co., Ltd.) 15 parts by weight, 0.5 part by weight of an antifoaming agent (manufactured by San Nopco, S-65) and 3.6 parts by weight of NMP were obtained by stirring and mixing.

[Resin composition B]
12 parts by weight of polyethersulfone (PES), 7.2 parts by weight of epoxy resin particles (manufactured by Sanyo Kasei, polymer pole) having an average particle diameter of 1.0 μm, and 3.09 parts by weight of those having an average particle diameter of 0.5 μm Then, 30 parts by weight of NMP was further added, and the mixture was stirred and mixed with a bead mill.

[Curing agent composition C]
Imidazole curing agent (manufactured by Shikoku Chemicals, 2E4MZ-CN) 2 parts by weight, photoinitiator (manufactured by Ciba Geigy, Irgacure I-907), 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku, DETX-S) 0.2 weight Parts and NMP 1.5 parts by weight were obtained by stirring and mixing.

Raw material composition for preparing interlayer resin insulation (adhesive for lower layer)
[Resin composition D]
35 parts by weight of a resin solution prepared by dissolving 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight 2500) in DMDG at a concentration of 80 wt%, photosensitive resin (Aronix M315, manufactured by Toagosei Co., Ltd.) Part, 0.5 part by weight of antifoaming agent (manufactured by San Nopco, S-65) and 3.6 parts by weight of NMP were obtained by stirring and mixing.

[Resin composition E]
After mixing 12 parts by weight of polyethersulfone (PES) and 14.49 parts by weight of epoxy resin particles (manufactured by Sanyo Kasei, polymer pole) having an average particle size of 0.5 μm, 30 parts by weight of NMP was further added, and bead mill Obtained by stirring and mixing.

[Curing agent composition F]
Imidazole curing agent (manufactured by Shikoku Chemicals, 2E4MZ-CN) 2 parts by weight, photoinitiator (manufactured by Ciba Geigy, Irgacure I-907), 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku, DETX-S) 0.2 weight Parts and NMP 1.5 parts by weight were obtained by stirring and mixing.

Raw material composition for preparing resin filler [Resin composition G]
100 parts by weight of bisphenol F type epoxy monomer (Oilized Shell, molecular weight 310, YL983U), SiO ₂ spherical particles having an average particle diameter of 1.6 μm coated with a silane coupling agent on the surface (manufactured by Admatech, CRS1101-CE, here Then, the maximum particle size is 170 parts by weight of the inner layer copper pattern (15 μm or less) described later, and 1.5 parts by weight of a leveling agent (manufactured by San Nopco, Perenol S4) is stirred and mixed. The viscosity was adjusted to 45,000-49,000 cps at 23 ± 1 ° C.

[Curing agent composition H]
6.5 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals).

Manufacture of Printed Wiring Board FIGS. 13 to 30 are longitudinal sectional views showing respective steps of a series of manufacturing processes when an example of the printed wiring board according to the present invention is manufactured.
(1) As shown in FIG. 13, a copper-clad laminate 6 having 18 μm copper foil 5 laminated on both surfaces of a substrate 4 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm is used as a starting material. It was.

  First, as shown in FIG. 14, the copper-clad laminate 6 is drilled with a drill hole 7, subjected to electroless plating treatment, and etched into a pattern to form inner layer copper patterns ( Lower layer conductor circuit) 8 and through hole 9 were formed.

(2) The substrate on which the inner layer copper pattern 8 and the through hole 9 are formed is washed with water and dried. Then, as an oxidation bath (blackening bath), NaOH (10 g / L), NaClO ₂ (40 g / L), Na ₃ PO ₄ (6 g / L), and by using oxidation-reduction treatment using NaOH (10 g / L) and NaBH ₄ (6 g / L) as the reducing bath, the roughened surface 10, 11 was prepared to manufacture a wiring board 12 as shown in FIG.

  (3) The resin composition G and the curing agent composition H are mixed and kneaded to obtain a resin filler, and this resin filler is applied to both surfaces of the substrate 12 using a roll coater within 24 hours after preparation. Thus, the resin layers 13 and 14 were formed by filling between the conductor circuits 8 or in the through holes 9 and drying at 70 ° C. for 20 minutes.

  (4) The surface of the inner layer copper pattern 8 or the land 11 of the through hole 9 is polished on one side of the substrate after the processing of (3) by belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku). Polishing was performed so that no resin filler remained on the surface, and then buffing was performed to remove scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate.

  (5) Next, heat treatment is performed at 100 ° C. for 1 hour, 120 ° C. for 3 hours, 150 ° C. for 1 hour, and 180 ° C. for 7 hours to cure the resin filler, and the wiring board 15 as shown in FIG. Was made. In this wiring board 15, the surface layer portion of the resin filler filled in the through-holes 9 and the like and the roughened surfaces 10 and 11 on the upper surface of the inner layer conductor circuit 8 are removed, both surfaces of the substrate are smoothed, and the resin layer 13 and the side surface of the inner layer conductor circuit 8 and the land surface of the through hole 9 are firmly adhered to each other through the roughened surfaces 10a and 11a, and the inner wall surface of the through hole 9 and the resin layer 14 form the roughened surface 11a. It is in close contact with each other. That is, by this step, the surfaces of the resin layers 13 and 14 and the surface of the inner layer copper pattern 8 are flush with each other.

(6) The printed wiring board 15 on which the conductor circuit is formed is subjected to alkali degreasing and soft etching, and then treated with a catalyst solution composed of paradium chloride and an organic acid to give a Pd catalyst and activate the catalyst. Copper sulfate 3.2 × 10 ⁻² mol / L, nickel sulfate 3.9 × 10 ⁻³ mol / L, sodium citrate 5.4 × 10 ⁻² mol / L, sodium hypophosphite 3. Immersion in an electroless plating solution of 3 × 10 ⁻¹ mol / L, surfactant (manufactured by Nissin Chemical Industry, Surfir 465) 1.1 × 10 ⁻⁴ mol / L, pH = 9, and immersion 1 After a minute, it is vibrated at a rate of once every 4 seconds, and as shown in FIG. 16, the surface of the land of the copper conductor circuit 8 and the through hole 9 is roughened with a needle-like alloy made of Cu—Ni—P. Chemical layers 16 and 17 were provided.

  Furthermore, a Cu—Sn substitution reaction was performed under the conditions of tin borofluoride 0.1 mol / L, thiourea 1.0 mol / L, temperature 35 ° C., pH = 1.2, and the thickness of the roughened layers 16 and 17 was increased. A 0.3 μm Sn layer was provided. The Sn layer is not particularly shown.

  (7) Resin compositions D and E and curing agent composition F were mixed with stirring, and the viscosity was adjusted to 1.5 Pa · s to obtain an interlayer resin insulation (for the lower layer). Next, the resin compositions A and B and the curing agent composition C were mixed by stirring and adjusted to a viscosity of 7 Pa · s to obtain an electroless plating adhesive solution (for the upper layer).

  (8) Apply the interlayer resin insulation (for lower layer) having a viscosity of 1.5 Pa · s obtained in (7) on both surfaces of the substrate 18 in (6) with a roll coater within 24 hours after preparation. , Left in a horizontal state for 20 minutes, and then dried (prebaked) at 60 ° C. for 30 minutes, and then the photosensitive adhesive solution having a viscosity of 7 Pa · s obtained in (7) (for the upper layer) Is applied within 24 hours after preparation and left to stand for 20 minutes in a horizontal state, followed by drying (prebaking) at 60 ° C. for 30 minutes to form an adhesive layer 19 having a thickness of 35 μm as shown in FIG. did.

(9) As shown in FIG. 18, a photomask film 21 on which a 85 μmφ black circle 20 is printed is brought into close contact with both sides of the substrate on which the adhesive layer 19 has been formed in the above (8), and 500 mJ / It was exposed in cm ^2. This substrate is spray-developed with a DMTG solution, further exposed to 3000 mJ / cm ² with an ultra-high pressure mercury lamp, and heat-treated (post-baked) at 100 ° C. for 1 hour, 120 ° C. for 1 hour, and then 150 ° C. for 3 hours. Thus, as shown in FIG. 19, an interlayer resin insulating layer (two-layer structure) 19 having a thickness of 35 μm and having an opening (via hole forming opening) 22 of 85 μmφ excellent in dimensional accuracy corresponding to the photomask film 21 and did. Note that the tin plating layer was partially exposed in the opening 22 serving as a via hole.

  (10) The substrate on which the opening 22 is formed is immersed in chromic acid for 19 minutes, and the epoxy resin particles present on the surface of the interlayer resin insulation layer 19 are dissolved and removed to roughen the surface of the interlayer resin insulation layer 19. 20 were formed, and then roughened surfaces 23 and 24 as shown in FIG.

  Furthermore, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate that has been roughened (roughening depth 6 μm), the surface 23 of the interlayer resin insulation layer 19 and the inner wall surface 24 of the via hole opening are formed. A catalyst nucleus was attached.

(11) The wiring board thus formed is immersed in an electroless copper plating aqueous solution having the following composition, and as shown in FIG. 21, the entire surface is electroless copper plated with a thickness of 0.6 μm. A film 25 was formed.
[Electroless plating aqueous solution]
EDTA 50 g / L
Copper sulfate 10 g / L
HCHO 8 mL / L
NaOH 9 g / L
α, α'-bipyridyl 80 mg / L
PEG 0.1 g / L
[Electroless plating conditions]
30 minutes at a liquid temperature of 70 ° C

(12) On the electroless copper plating film 25 formed in the above (11), as shown in FIG. 22, a commercially available photosensitive dry film 27 printed with a black circle 26 is attached, and a mask is placed. Exposure was performed at 100 mJ / cm ² , development was performed with 0.8% sodium carbonate, and a plating resist 28 having a thickness of 15 μm as shown in FIG. 23 was provided.

(13) Next, electrolytic copper plating was performed on the resist non-formed portion under the following conditions to form an electrolytic copper plating film 29 having a thickness of 15 μm as shown in FIG.
(Electrolytic plating aqueous solution)
Sulfuric acid 180 g / L
Copper sulfate 80 g / L
Additive (manufactured by Atotech Japan, Kaparaside GL)
1 mL / L
[Electrolytic plating conditions]
Current density 1A / dm ²
Time 30 minutes Temperature Room temperature

  (14) After stripping and removing the plating resist 28 with 5% KOH, the electroless plating film 25 under the plating resist 28 is removed by dissolution by etching with a mixed solution of sulfuric acid and hydrogen peroxide. As shown, a conductor circuit 30 (including a via hole 31) having a thickness of 18 μm composed of an electroless copper plating film 25 and an electrolytic copper plating film 29 was formed.

  (15) The same treatment as in (6) was performed to form a roughened surface made of a Cu—Ni—P needle-like alloy, and Sn substitution was performed on the surface.

  (16) By repeating the steps (7) to (15), an upper conductor circuit was formed to obtain a multilayer wiring board.

  (17) The conductor circuit on the surface layer was sprayed with an etching solution composed of 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid and 5 parts by weight of potassium chloride, and a trade name “MEC Etch Bond” manufactured by MEC. Then, the roughened surface 32 having a thickness of 3 μm as shown in FIG. This roughened surface was not substituted with tin.

When measuring the roughened surface from directly above with an electron scanning microscope (× 5000), in the range of 25 [mu] m ^2, anchor-shaped portion 1 is average 11 as shown in FIGS. 4-8, the recess portion is average 11, An average of 22 ridge lines were confirmed.

  (18) On the other hand, 46.67 g of a photosensitizing oligomer (molecular weight 4000) obtained by acrylated 50% of an epoxy group of 60% by weight of a cresol novolak type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG into methyl ethyl ketone. 15.0 g of 80% by weight of bisphenol A type epoxy resin (manufactured by Yuka Shell, Epicoat 1001), 1.6 g of imidazole curing agent (manufactured by Shikoku Kasei, 2E4MZ-CN), polyvalent acrylic monomer as a photosensitive monomer (Nippon Kayaku Co., Ltd., R604) 3 g, similarly polyvalent acrylic monomer (Kyoeisha Chemical Co., DPE6A) 1.5 g, dispersed antifoaming agent (San Nopco Co., S-65) 0.71 g are mixed. 2 g of benzophenone (manufactured by Kanto Kagaku) as a photoinitiator and Michler's ketone (as a photosensitizer) Eastern Chemical Co., Ltd.) was added 0.2 g, to obtain a solder resist composition with an adjusted viscosity 2.0 Pa · s at 25 ° C.. Viscosity measurement was performed using a B-type viscometer (Tokyo Keiki, DVL-B type) with a rotor No. In the case of 4 or 6 rpm, the rotor No. 3 according.

(19) As shown in FIG. 27, this solder resist composition 33 was applied to both surfaces of the multilayer wiring board obtained in (16) at a thickness of 20 μm. Next, after drying at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, as shown in FIG. 28, a photomask film 35 having a thickness of 5 mm on which a circular pattern (mask pattern) 34 is drawn is adhered. And exposed to 1000 mJ / cm ² of ultraviolet light, and DMTG developed. Further, heat treatment was performed under the conditions of 80 ° C. for 1 hour, 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours. As shown in FIG. A solder resist layer (thickness 20 μm) 38 having an opening (including a land portion 37) (opening diameter 200 μm) was formed, and a printed wiring board 39 was manufactured.

  (20) Next, the substrate 39 on which the solder resist layer 38 is formed is applied to an electroless nickel plating solution having a pH of 5 comprising nickel chloride 30 g / L, sodium hypophosphite 10 g / L, and sodium citrate 10 g / L. As a result of immersion for 20 minutes, a nickel plating layer 40 having a thickness of 5 μm was formed in the openings 36 and 37 as shown in FIG. Further, the substrate was placed in an electroless gold plating solution composed of potassium gold cyanide 2 g / L, ammonium chloride 75 g / L, sodium citrate 50 g / L, and sodium hypophosphite 10 g / L at 93 ° C. for 23 seconds. A gold plating layer 41 having a thickness of 0.03 μm was formed on the nickel plating layer 40 by dipping.

  (21) A solder bump (solder body) 42 was formed by printing a solder paste on the opening of the solder resist layer 38 and reflowing at 200 ° C., and a printed wiring board 43 having the solder bump 42 was manufactured. . This printed wiring board is provided with a portion of normal wiring (75 μm line width) and fine wiring (50 μm line width), and in the portion of fine wiring, the wiring density is further reduced compared with a portion having a sparse (400 μm interval) portion. Dense (50 μm intervals) portions were provided.

Example 2
FIG. 31 is a cross-sectional view of the printed wiring board of this example. This example is basically the same as that of Example 1, except that in the step (17), the roughened surface of the surface conductor circuit (solder pad conductor circuit) is made of a metal as shown in FIGS. Coated with layer 51. Nickel was used as the metal, and electroless plating was used as the coating. The thickness of the obtained nickel layer was 0.04 μm.

  In this example, the nickel plating layer 52 on the nickel layer 51 and the gold plating layer 53 on the nickel layer 51 as shown in FIG. 31 are formed in the openings of the solder resist layer 38 by the steps (18) to (21). Then, a solder bump (solder body) 54 was formed.

Example 3
Although basically the same as in Example 2, a tin layer formed by displacement plating was used in place of the nickel layer formed by electroless plating as the metal layer covering the roughened surface of the conductor circuit for solder pads. The tin layer had a thickness of 0.03 μm.

Example 4
Although basically the same as in Example 2, a zinc layer formed by electroless plating was used instead of the nickel layer formed by electroless plating as the metal layer covering the roughened surface of the conductor circuit for solder pads. The zinc layer had a thickness of 0.05 μm.

Example 5
Although basically the same as in Example 2, a metal layer formed by vapor deposition was used instead of the nickel layer formed by electroless plating as the metal layer covering the roughened surface of the conductor circuit for solder pads. This metal layer was made of iron and cobalt and had a thickness of 0.05 μm.

Comparative Examples 1 and 2
Basically the same as in Example 1, but in Comparative Example 1, NaOH (10 g / L), NaClO ₂ (40 g / L), Na ₃ PO were used as the oxidation bath (blackening bath) in the surface conductor circuit. ₄ (6 g / L) was used, and a roughened surface was formed by a blackening-reduction treatment using NaOH (10 g / L) and NaBH ₄ (6 g / L) as a reducing bath. In Comparative Example 2, copper sulfate 3.2 × 10 ⁻² mol / L, nickel sulfate 3.9 × 10 ⁻³ mol / L, complexing agent 5.4 × 10 ⁻² mol were formed on the surface conductor circuit. / L, sodium hypophosphite 3.3 × 10 ⁻¹ mol / L, surfactant (manufactured by Nissin Chemical Industry, Surffield 465) 1.1 × 10 ⁻⁴ mol / L, pH = 9 A roughened layer was formed from a copper-nickel-phosphorus acicular alloy from an electrolytic plating solution. The printed wiring boards of Comparative Examples 1 and 2 were also provided with the same normal wiring and fine wiring portions as in Example 1, a sparse wiring density portion and a dense wiring density portion.

Comparative Example 3
Basically the same as in Example 2, except that the surface conductor circuit has an oxidation bath (blackening bath) of NaOH (10 g / L), NaClO ₂ (40 g / L), Na ₃ PO ₄ (6 g / L). ) And a roughening surface was formed by blackening-reducing treatment using NaOH (10 g / L) and NaBH ₄ (6 g / L) as a reducing bath. Also in the printed wiring board of this example, a portion of normal wiring and fine wiring, a portion having a low wiring density, and a portion having a dense wiring density were provided as in the first embodiment.

Comparative Example 4
Basically the same as in Example 2, except that the surface conductor circuit had copper sulfate 3.2 × 10 ⁻² mol / L, nickel sulfate 3.9 × 10 ⁻³ mol / L, complexing agent 5.4. × 10 ⁻² mol / L, sodium hypophosphite 3.3 × 10 ⁻¹ mol / L, surfactant (manufactured by Nissin Chemical Industry, Surfir 465) 1.1 × 10 ⁻⁴ mol / L, pH A roughened layer was formed from an electroless plating solution consisting of = 9 with a needle-like alloy made of copper-nickel-phosphorus. Also in the printed wiring board of this example, a portion of normal wiring and fine wiring, a portion having a low wiring density, and a portion having a dense wiring density were provided as in the first embodiment.

Solder resist layer peeling test The printed circuit boards manufactured in Example 1 and Comparative Examples 1 and 2 were tested for peeling of the solder resist layer after the solder resist layer was formed and after the reliability test (heat cycle conditions). In addition, the presence or absence of the connection failure between conductor circuits was compared in the part where wiring density was sparse and dense, and the remainder of the organic residue of the opening part bottom part was confirmed. The results are shown in Table 1.

  As shown in Table 1, in the printed wiring board of Example 1, there was no peeling of the resist layer and poor connection of the conductor circuit, and no organic residue was found. In the printed wiring board of the comparative example 1, peeling occurs in the portion where the wiring density is sparse after the heat cycle, and in the printed wiring board of the comparative example 2, the connection failure of the conductor circuit occurs, and the organic residue remains at the bottom of the opening. confirmed.

Solder resist layer peeling test and solder bump peeling test For the printed circuit boards manufactured in Examples 2 to 5 and Comparative Examples 3 and 4, after solder bump formation and reliability test (heat cycle conditions), the solder resist layer and solder Bumps were peeled and cracks were inspected, the shear strength of the solder bumps was measured, and a continuity test was conducted with a checker to determine the presence or absence of disconnection or short circuit. The results are shown in Table 2.

  As shown in Table 2, the printed wiring boards of Examples 2 to 5 were not peeled off from the solder resist layer and the solder bumps and cracked as compared with the wiring boards of Comparative Examples 3 and 5, and the continuity test and the solder bumps. The shear strength was excellent. Moreover, even after the reliability test, the strength of the solder resist layer and the solder bump was sufficiently maintained, and there was no disconnection or short circuit.

  As described above, in the printed wiring board according to the present invention, the roughened surface having a predetermined shape is formed on the surface of the conductor circuit for the solder pad, and the solder resist layer is firmly adhered through the roughened surface. Even if the solder resist layer is removed at the solder bump forming part and the contact area between the conductor circuit and the solder resist layer is reduced, or the conductor circuit is made of fine wiring and the wiring density is sparse, the conductor circuit And sufficient adhesion between the solder resist layer and the solder resist layer.

  Moreover, in the printed wiring board according to the present invention, no solder resist resin residue remains on the roughened surface exposed to the opening for forming the solder bump, and the adhesive with the metal under the bump is excellent. Does not cause poor conduction.

  Furthermore, the printed wiring board according to the present invention has a shape excellent in adhesion with the solder resist layer and adhesion with the metal under the bump, by covering the roughened surface of the solder pad conductor circuit with the metal layer. Since the strength is maintained, the strength of the solder bump is remarkably increased, and the solder bump can be prevented from falling off.

DESCRIPTION OF SYMBOLS 1 Corrugated part 2 Indentation part 3 Ridge line 4 Board | substrate 5 Copper foil 6 Copper clad laminated board 7 Drill hole 8 Inner layer copper pattern (lower layer conductor circuit)
9 Through-hole 10, 10a, 11, 11a, 23, 24, 32 Roughened surface 12, 15, 18 Wiring board 13, 14 Resin layer 16, 17 Roughened layer 19 Adhesive layer 20, 26 Black circle 21, 35 Photo Mask film 22 opening (opening for via hole formation)
25 Electroless copper plating film 27 Photosensitive dry film 28 Plating resist 29 Electrolytic copper plating film 30 Conductor circuit 31 Via hole 33 Composition for solder resist 34 Circular pattern (mask pattern)
36 Solder pad portion 37 Via hole and its land portion 38 Solder resist layer 39, 43 Printed wiring board 40, 52 Nickel plating layer 41, 53 Gold plating layer 42, 54 Solder bump (solder body)
51 metal layer

Claims (4)

In a method for manufacturing a multilayer printed wiring board comprising a conductor circuit for solder pads, a solder resist layer, and solder bumps,
(A) forming the solder pad conductor circuit by electroless plating and electrolytic plating;
(B) treating the upper and side surfaces of the solder pad conductor circuit with an etchant containing a cupric complex and an organic acid to form a roughened surface on the solder pad conductor circuit;
(C) after the step (b), a step of performing an acid treatment by etching or polishing on the solder pad conductor circuit;
(D) coating the solder pad conductor circuit with a solder resist composition;
(E) removing the solder resist composition from the solder pad conductor circuit portion to form a solder resist layer having an opening;
(F) A method of manufacturing a multilayer printed wiring board, comprising: forming a solder bump in the opening. In a method for manufacturing a multilayer printed wiring board comprising a conductor circuit for solder pads, a solder resist layer, and solder bumps,
(A) forming the solder pad conductor circuit by electroless plating and electrolytic plating;
(B) treating the upper and side surfaces of the solder pad conductor circuit with an etchant containing a cupric complex and an organic acid to form a roughened surface on the solder pad conductor circuit;
(C) after the step (b), heat-treating the roughened surface;
(D) coating the solder pad conductor circuit with a solder resist composition;
(E) removing the solder resist composition from the solder pad conductor circuit portion to form a solder resist layer having an opening;
(F) A method of manufacturing a multilayer printed wiring board, comprising: forming a solder bump in the opening.   3. The method for producing a multilayer printed wiring board according to claim 1, wherein the solder pad conductor circuit has a line width of 50 μm or less. 4.   The method for producing a multilayer printed wiring board according to claim 1, wherein the roughened surface has a maximum roughness (Rmax) of 0.5 to 10 μm.