JP2000031643A - Multilayer printed wiring board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To further increase the adhesion between a conductor circuit and a resin insulating layer and the adhesion between the conductor circuit and a via hole conductor. SOLUTION: A multilayer printed wiring board 52 is provided with a lower layer conductor circuit 26 and an interlayer resin insulating layer 37 deposited on the lower layer conductor circuit 26. The lower layer conductor circuit 26 has a roughened surface 35 processed by an etchant, including a cupric complex and organic acid. The roughened surface 35 is coated with a metal layer made of at least one kind of metal selected from a group composed of titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth, and noble metals. The interlayer resin insulating layer 37 is formed on the roughened surface 35.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board, and more particularly, to a multilayer printed wiring board which can prevent peeling of an interlayer resin insulating layer and secure connection reliability of a via hole even during heating or heat cycle conditions. Related to wiring boards.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured, for example, by a method as disclosed in Japanese Patent Publication No. 4-55555. That is, on the core substrate, an insulating material made of a photosensitive electroless plating adhesive is applied, dried, exposed, and developed to form an interlayer insulating material layer having an opening for a via hole. . Next, after roughening the surface of this interlayer insulating material layer by treatment with an oxidizing agent or the like,
A plating resist is provided on the roughened surface, and then electroless plating is performed on a portion where no resist is formed to form a conductive circuit pattern including via holes. By repeating such a process a plurality of times, a multilayered build-up wiring board can be obtained.

As a build-up multilayer printed wiring board, a multilayer technology using a so-called RCC (RESIN COATED COPPER: copper foil with resin) has been receiving attention. In this technique, RCC is laminated on a circuit board, copper foil is removed by etching, an opening is formed in a via-hole forming portion, and the opening is irradiated with a laser to remove the resin layer and plate the opening. This is a technology for forming via holes.

Further, as described in Japanese Patent Application Laid-Open No. 9-36551, a technique is known in which a single-sided circuit board in which through holes are filled with a conductive material is laminated via an adhesive layer to form a multilayer. Is being developed.

In such a multilayer printed wiring board, in order to improve the adhesion between the lower conductive circuit surface and the interlayer resin insulating layer,
The surface of the lower conductor circuit is roughened. The roughened layer thus formed can improve the adhesion of the via hole. Such a roughening treatment includes a blackening-reduction treatment,
The etching is performed by sulfuric acid-hydrogen peroxide, copper-nickel-phosphorus needle-like alloy plating, or the like.

However, it is known that when a via hole is formed in such a roughened layer by plating, plating is difficult to occur, and the via-hole conductor is easily peeled off. For this reason, on the surface of the lower conductor circuit, a roughened layer is formed at a portion in contact with the interlayer resin insulating layer, but it is common sense to remove such a roughened layer at a portion in contact with the via-hole conductor. (See, for example, JP-A-3-3298).

[0007]

However, the inventor of the present invention has found that when the connection surface of the lower conductor circuit for connecting the via hole conductor is flattened, the lower conductor circuit and the via hole conductor can be heated or subjected to heat cycle conditions. Was found to be peeled off.

The present inventor reexamined the roughening treatment of the conductor circuit. As a result, the needle-shaped alloy plating is most excellent in the adhesion between the conductor circuit and the resin insulating layer. A phenomenon was observed in which separation occurred between the via hole conductor and the via hole conductor, and the conduction resistance value increased. In the blackening-reduction treatment and the etching using sulfuric acid-hydrogen peroxide, peeling was observed between the conductor circuit and the resin insulating layer during heating or under heat cycle conditions.

In order to solve such a problem, the present applicant, as shown in Japanese Patent Application No. 9-196351, processes a surface of a conductor circuit with a predetermined etching solution to form a roughened surface. We have developed a technology to provide via holes without removing this roughened surface.

It is an object of the present invention to further improve such a technique to further improve the adhesion between the conductor circuit and the resin insulating layer and the adhesion between the conductor circuit and the via-hole conductor.

[0011]

According to the present invention, there is provided a multilayer printed wiring board comprising a lower-layer conductor circuit and an interlayer resin insulating layer on the lower-layer conductor circuit, wherein the lower-layer conductor circuit comprises:
It has a roughened surface that has been treated with an etching solution containing a cupric complex and an organic acid, and the roughened surface is titanium, aluminum, zinc, iron, indium, thallium,
A multilayer comprising a metal layer made of at least one metal selected from the group consisting of cobalt, nickel, tin, lead, bismuth and a noble metal, wherein the interlayer resin insulating layer is provided on the roughened surface The present invention relates to a printed wiring board and a method for manufacturing such a multilayer printed wiring board.

Further, the present invention provides a multilayer printed wiring board comprising a lower conductive circuit and an interlayer resin insulating layer on the lower conductive circuit, wherein the lower conductive circuit has a roughened surface. The roughened surface has a plurality of anchors, dents, and ridges, and the anchors, the dents, and the ridges are dispersedly formed, and the adjacent anchors are connected by the ridges. And the depression is surrounded by the anchor and the ridge, and the roughened surface is formed of titanium,
Aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and a metal layer made of at least one metal selected from the group consisting of noble metals, wherein the interlayer resin insulating layer is The present invention relates to a multilayer printed wiring board provided on a roughened surface.

The inventor of the present invention has found that even during heating or heat cycle conditions, the peeling does not occur between the conductor circuit and the resin insulating layer or between the lower conductor circuit and the via hole conductor, and the connection of the via hole portion is prevented. In order to obtain a multilayer printed wiring board with even higher reliability, the technique described in Japanese Patent Application No. 9-196351 was further studied.

As a result, the inventor of the present invention provided a roughened surface by treating a conductive circuit with an etchant comprising a cupric complex and an organic acid, and then formed the roughened surface with a layer of a metal which is hardly oxidized. By coating to prevent surface oxidation, or by coating with a metal layer that does not impair the adhesion to the resin or the via hole conductor even if oxidized, the adhesion between the conductor circuit and the resin insulation layer, The inventors have found that the adhesion between the conductor circuit and the via-hole conductor is significantly improved, and have completed the present invention.

In the present invention, a roughened surface having a predetermined rough surface shape, such as that formed by a predetermined etching solution, is formed on the surface of the conductor circuit, and the roughened surface is formed of titanium, aluminum, zinc, It is covered with a metal layer made of at least one metal selected from the group consisting of iron, indium, thallium, cobalt, nickel, tin, lead, bismuth, and noble metals.

Such a metal layer prevents the surface of the conductor circuit such as copper from being oxidized, and prevents the formation of an oxide film on the conductor circuit, or even if the metal itself oxidizes, the metal layer and the resin, Does not reduce the adhesion between the metal layer and the via-hole conductor.

In the multilayer printed wiring board according to the present invention, such a metal layer may cause the adhesion strength between the roughened surface and the interlayer resin insulating layer to decrease due to the peeling of the oxide film, or the roughened surface and the via-hole conductor. Can be prevented from lowering the adhesion strength.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the drawings. When the lower conductor circuit is treated with the etching solution according to the present invention, the surface thereof becomes a roughened surface having an anchor portion as shown in FIGS. FIG. 1 is a drawing substitute photograph of a roughened surface according to an example of the present invention. In this photograph, the roughened surface is photographed obliquely under an electron microscope. FIG. 2 is a drawing substitute photograph of a roughened surface of another example according to the present invention. This photo also
It was taken in the same manner as the photograph of FIG. 1, but with a higher magnification. FIG. 3 is a drawing substitute photograph of a roughened surface of still another example according to the present invention. This photograph was taken at the same magnification as the photograph in FIG. 2 and the roughened surface was photographed from directly above under an electron microscope.

In the multilayer printed wiring board of the present invention, the metal layer is coated on the roughened surface as shown in the electron micrograph, and the conductor circuit and the resin insulation layer or the lower conductor circuit are interposed via the metal layer. And the via-hole conductor are connected.

FIGS. 4 to 8 are schematic diagrams of such a roughened surface. 4 is a plan view, FIG. 5 is a vertical cross-sectional view taken along line AA of FIG. 4, FIG. 6 is a vertical cross-sectional view cut between an anchor-shaped portion and a concave portion, and FIG. Longitudinal sectional view showing a ridge line between the shaped parts,
FIG. 8 is a longitudinal sectional view cut between a ridge line and a depression.

As shown in FIGS. 4 and 5, the roughened surface according to the present invention has a plurality of anchors 1, a plurality of depressions 2, and a plurality of ridges 3. The depression 2 and the ridge 3 are dispersed and covered with the metal layer 4. A recess 2 is formed between the anchor 1 and the adjacent anchor 1 as shown in FIG. In addition, the anchor-shaped portion 1 and the adjacent anchor-shaped portion 1 are connected to each other by a ridge line 3 as shown in FIG. The depression 2 is surrounded by the anchor 1 and the ridge 3 as shown in FIGS. 6 and 8.

The metal layer as shown in FIGS. 4 to 8 is made of a metal which is hardly oxidized or a metal which does not impair the adhesion to the resin or the adhesion to the via-hole conductor even if the metal itself is oxidized. Such a metal layer prevents the formation of an oxide film on the roughened surface, and does not impair the adhesion to the resin or via-hole conductor even if the metal itself is oxidized. Such a metal layer can prevent a decrease in adhesion strength between the roughened surface and the resin insulating layer and a decrease in adhesion strength between the roughened surface and the via-hole conductor due to peeling of the oxide film. it can.

In addition, since the hardness of the metal constituting the roughened surface can be increased in the metal layer, the metal is not broken on the roughened surface, and the roughened surface and the resin insulating layer, and the roughened surface and the via are not damaged. Separation from the hole conductor is further prevented.

The multilayer printed wiring board of the present invention has such a metal layer, it is difficult to form an oxide layer on the roughened surface, and even if the oxide layer is formed, the adhesion to the resin or the via-hole conductor is maintained. Even when the heat is applied, the roughened surface and the resin insulating layer do not separate from each other, or the roughened surface and the via-hole conductor do not peel off.

The metal layer is made of titanium, aluminum,
It is made of at least one metal selected from the group consisting of zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth, and noble metals. Such a metal is relatively hard to oxidize, or does not reduce the adhesion between the metal layer and the resin even if the metal itself is oxidized. Further, such a metal is also excellent in adhesion to a resin. Further, such a metal is a metal or a noble metal whose ionization tendency is larger than copper and is equal to or less than titanium, and if a roughened surface is coated with a layer of such a metal or a noble metal, a local part when the resin insulating layer is roughened. Dissolution of the conductor circuit due to the electrode reaction can be prevented.

Examples of metals that are relatively difficult to oxidize include non-oxidizable metals such as nickel, tin, cobalt, and noble metals. As the noble metal, at least one selected from gold, silver, platinum, and palladium is desirable. Examples of the metal that does not decrease the adhesion between the metal layer and the resin even when the metal itself is oxidized include metals such as titanium, aluminum, zinc, iron, indium, thallium, lead, and bismuth.

When titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth or a noble metal is selected from these metals,
When a via hole is formed in a multilayer printed wiring board, no oxide film is formed around the via hole. Therefore, when a metal layer made of such a metal is used, a halo phenomenon (pink ring) can also be prevented.

The thickness of the metal layer is 0.01 to 5 μm
Is desirable. This is because it is possible to prevent oxidation of the copper conductor circuit while maintaining the shape of the irregularities on the roughened surface.

The roughened surface according to the present invention significantly enhances the adhesion between the conductor circuit and the via-hole conductor. This is because such a roughened surface does not form a space in which the grown needle-like projections overlap each other, as formed by plating.

FIG. 29 is a drawing substitute photograph of a roughened layer made of a conventional needle-shaped alloy formed by plating. In the roughened layer shown in the electron micrograph, the acicular alloys overlap each other, and a space is formed between the acicular alloys. Such Cu-
In the needle-like alloy structure made of Ni-P, since the needle-like protrusions are densely packed, the space between the protrusions is narrow, so that the developing solution or the oxidizing agent solution for removing the residual resin does not flow, and the resin is moved between the protrusions. It remains and causes resin residue.

On the other hand, the rough surface shape according to the present invention has an anchor-shaped portion at the highest portion, and a recessed portion is formed at the lowest portion around the anchor-shaped portion. Are connected to each other by a ridgeline lower than the anchor-shaped portions and higher than the recessed portions, and have a complicated uneven shape.
The roughened surface having such a complicated uneven shape has an excellent affinity with the plating solution, and the plating penetrates into the recessed portion of the roughened surface and follows the anchor-shaped portion of the roughened surface. It does not bite into the conductor and does not reduce the adhesion between the conductor circuit and the via-hole conductor. In addition, the anchor-shaped portion of the roughened surface cuts into the resin insulating layer, and makes the conductor circuit and the resin insulating layer more closely adhere.

In addition, on such a roughened surface, the anchor portions are not dense. The ridge connecting the anchor portions has a shape that does not obstruct the flow of the resin. For this reason, on the roughened surface, the developer or the oxidizing agent solution for removing the resin residue easily flows between the recessed portions and the anchor-shaped portions, and the resin does not easily accumulate. For this reason, the roughened surface according to the present invention has no resin residue after the development processing and has excellent adhesion to the via-hole conductor.

As described above, the roughened surface according to the present invention can maintain the adhesion between the conductor circuit and the resin insulating layer and the adhesion between the lower conductor circuit and the via-hole conductor while maintaining the resin residue after the development processing. It has an optimal shape to prevent

The roughened surface according to the present invention can be formed, for example, by removing metal crystal particles on the surface of a conductor circuit with an etching solution containing a cupric complex and an organic acid. On such a roughened surface, a depression (recess) is formed in a portion where the metal crystal particles are largely etched. Such a depression can be formed in a shape as if a substantially polyhedral substance derived from the metal crystal particles is cut off.
In the present invention, the substantially polyhedral shape refers to a polyhedron such as a trihedron, a tetrahedron, a pentahedron, a hexahedron, or a polyhedron obtained by combining two or more of these polyhedrons. Such depressions can prevent resin residue after the development processing.

Further, the anchor portion of the roughened surface can be formed by removing metal crystal particles around the anchor portion. The anchor-shaped portion formed in this manner is constituted by a square convex portion, is surrounded by the concave portion, and does not overlap with each other. The roughened surface having such a complicated uneven shape can prevent the resin residue after the development processing while maintaining the adhesion to the resin and the via-hole conductor.

Further, a ridge line can be formed on the roughened surface by etching adjacent metal crystal particles. This ridge connects the anchor-shaped part and the adjacent anchor-shaped part at a position lower than the height of the anchor-shaped part. The ridge is formed in a branched state by dropping three or more adjacent metal crystal particles. In addition, the ridge line can be formed in a sharp state by etching the adjacent metal crystal particles in a substantially polyhedral shape. Such ridges can be formed such that the anchors are dispersed and the anchors are surrounded by the depressions and the ridges.
Such a roughened surface has a more complicated uneven shape, and a contact surface with the resin or via-hole conductor can be expanded to improve the adhesion and prevent the resin from remaining.

The roughened surface preferably has a maximum roughness (Rmax) of 0.1 to 10 μm. If it is less than 0.1 μm, the adhesion to the resin insulating layer and the adhesion to the via-hole conductor will be significantly reduced, and if it exceeds 10 μm, resin residue will be generated after the development processing, and problems such as disconnection will easily occur.

Further, such a roughened surface per 25 μm ²
It is preferable to have an average of 2 to 100 anchors and an average of 2 to 100 depressions. An average of 2 to 100 anchor-shaped portions per 25 μm ² is used to maintain the adhesion between the roughened surface and the resin insulating layer and the adhesiveness between the roughened surface and the via-hole conductor while maintaining the resin residue after the development processing. Can be prevented, an average of 2 to 100 depressions per 25 μm ² can prevent the anchor-shaped portions from being densely packed, suppress the generation of resin residue after the development processing, and form a roughened surface and a resin insulating layer. And the adhesion between the roughened surface and the via-hole conductor can be maintained.

The ridge according to the present invention, 25μm ² per,
It is desirable to form an average of 3 to 3000 lines. The number of ridge lines in this range complicates the shape of the roughened surface, expands the contact surface with the resin insulating layer and the via-hole conductor, and can improve the adhesion with the resin insulating layer and the like, and at the same time, the resin This is because the remainder is easily removed.

The number of anchors, depressions, and ridges was determined by using a 5000 × electron microscope photograph as shown in FIGS. 2 and 3 and photographing the roughened surface from directly above and obliquely above 45 °.
A region of 25 μm ² was arbitrarily selected and measured, and the average value was adopted.

The roughened surface according to the present invention can be formed by using an etching solution containing a cupric complex and an organic acid.
Can be formed. Such an etchant can be used as follows to dissolve the copper conductor forming the conductor circuit under the condition of coexistence of oxygen such as spraying and bubbling.

[0042]

Embedded image [In the formula, A represents a complexing agent (acting as a chelating agent), and n represents a coordination number. ]

As shown in Chemical Formula 1, the generated cuprous complex dissolves under the action of an acid and combines with oxygen to form a cupric complex, which again contributes to copper oxidation.

The cupric complex used in the present invention is preferably an azole cupric complex. This type of cupric complex acts as an oxidizing agent for oxidizing metallic copper and the like. As the azoles, diazole, triazole and tetrazole are preferable.
Among them, imidazole, 2-methylimidazole, 2-
Ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-undecylimidazole and the like are preferred. The addition amount of the cupric complex of azoles is preferably 1 to 15% by weight. This is because they are excellent in solubility and stability.

An organic acid is added to the cupric complex to dissolve copper oxide. When a cupric complex of an azole is used, the organic acid is not particularly limited, and various acids can be used. Such organic acids include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, maleic acid, benzoic acid, glycolic acid, lactic acid, At least one selected from the group consisting of malic acid, sulfamic acid and the like is preferred. The content of the organic acid is 0.1 to
30% by weight is good. This is for maintaining the solubility of the oxidized copper and ensuring the solubility stability.

To the etching solution according to the present invention, halogen ions such as fluorine ions, chlorine ions and bromine ions can be added to assist in dissolving copper and oxidizing azoles. Hydrochloric acid,
Sodium chloride or the like can be used, and these are preferably added to the etching solution. The amount of halogen ions is
The content is preferably 0.01 to 20% by weight. This is because adhesion between the formed roughened surface and the resin insulating layer is excellent.

The etching solution according to the present invention can be prepared by dissolving a cupric complex of an azole and an organic acid (halogen ion if necessary) in water. Also,
A commercially available etching solution, for example, a product name of “Mech Etch Bond” manufactured by Mec Co., Ltd. can be used.

The etching amount by the etching solution is preferably 1 to 10 μm. This is because if the etching amount is too large or too small, a connection failure between the conductor circuit and the via-hole conductor occurs.

In the present invention, the resin insulating layer can be formed using an electroless plating adhesive. Such an adhesive for electroless plating is based on a thermosetting resin, and particularly requires heat-resistant resin particles cured, heat-resistant resin particles soluble in an acid or an oxidizing agent, inorganic particles and a fibrous filler. Can be included. When such a resin insulation layer is provided between the lower conductor circuit and the upper conductor circuit, it becomes an interlayer resin insulation layer.

As the thermosetting resin base, epoxy resin, phenol resin, polyimide resin and the like can be used. When a part of the thermosetting group is sensitized, it is preferable that a part of the thermosetting group is acrylated by reacting with methacrylic acid or acrylic acid. Among them, acrylates of epoxy resins are most suitable. As such an epoxy resin, a novolak type epoxy resin, an alicyclic epoxy resin, or the like can be used. In addition, a thermoplastic resin such as polyether sulfone, polysulfone, polyphenylene sulfone, polyphenylene sulfide, polyphenyl ether, and polyether imide can be added to the thermosetting resin base.

As the heat resistant resin particles, (1) the average particle size is
10 μm or less heat-resistant resin powder, (2) agglomerated particles obtained by aggregating heat-resistant resin powder having an average particle size of 2 μm or less, (3) heat-resistant resin powder having an average particle size of 2 to 10 μm and an average particle size of 2 μm Mixture with less than heat resistant resin powder, (4) average particle size is 2-10
pseudo particles obtained by adhering at least one of a heat-resistant resin powder having an average particle size of 2 μm or less and an inorganic powder to the surface of a heat-resistant resin powder having a particle size of 2 μm or less;
Heat-resistant resin powder of less than 0.1-0.8 μm
And (6) the average particle size is 0.1 to 1.
It is desirable to use at least one kind of particles selected from the group consisting of heat-resistant resin powder of 0 μm. These particles are
This is because a more complicated anchor is formed. The roughened surface obtained by these particles can have a maximum roughness (Rmax) of 0.1 to 20 μm.

As the heat-resistant resin particles soluble in an acid or an oxidizing agent, amino resin (melamine resin, urea resin, guanamine resin, etc.) and epoxy resin (bisphenol epoxy resin cured with an amine curing agent) are most suitable. ), Heat-resistant resin particles composed of a bismaleimide-triazine resin or the like can be used. The mixing ratio of the heat-resistant resin particles is 5 to 50 of the solid of the matrix made of the heat-resistant resin.
% By weight, preferably 10 to 40% by weight.

The resin insulating layer may have a plurality of layers. For example, the lower layer can be a reinforcing layer composed of inorganic particles or fibrous filler and a resin base, and the upper layer can be an adhesive layer for electroless plating. In addition, the average particle size is 0.1 to 2.0 μm
The lower layer may be formed by dispersing heat-resistant resin particles soluble in an acid or an oxidizing agent in a heat-resistant resin that is hardly soluble in an acid or an oxidizing agent, and the adhesive layer for electroless plating may be an upper layer.

As the inorganic particles, silica, alumina, talc and the like can be used. As the fibrous filler, at least one of calcium carbonate whisker, aluminum borate whisker, aramid fiber, carbon fiber and the like can be used.

Next, one method of manufacturing the printed wiring board of the present invention will be described. The following method is mainly based on the semi-additive method, but may use a full-additive method.

(1) First, a wiring board having a conductor circuit formed on the surface of the board is manufactured. As the substrate, a resin insulating substrate such as a glass epoxy substrate, a polyimide substrate, a bismaleimide-triazine resin substrate, a ceramic substrate, a metal substrate, or the like can be used.

The conductive circuit is formed on the substrate by a method of etching a copper-clad laminate after electroless plating or electrolytic plating, or by forming an electroless circuit on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate. A method of forming an adhesive layer for plating, roughening the surface of the adhesive layer to form a roughened surface, and electroless plating the roughened surface, or a so-called semi-additive method (thinning the entire roughened surface). After applying electroless plating, forming a plating resist, applying a thick electrolytic plating to the plating resist non-formed portion, removing the plating resist, etching, and removing from the electrolytic plating film and the electroless plating film (A method of forming a conductive circuit). The conductor circuit preferably has a copper pattern.

For such a conductor circuit, a roughened surface can be formed by using an etching solution containing a cupric complex and an organic acid. As the cupric complex, it is preferable to use a cupric complex of an azole as described above. For forming the roughened surface, a method of spraying the etching liquid on the surface of the conductor circuit or dipping the conductor circuit in the etching liquid and bubbling can be used. Note that the conductor circuit is preferably an electroless plating film or an electrolytic plating film. This is because a roughened surface is not easily formed in a conductor circuit obtained by etching a rolled copper foil.

In the present invention, the roughened surface formed as described above is used to improve the adhesion between the metal layer and the resin or the adhesion between the metal layer and the via-hole conductor even if the non-oxidizing metal or the metal itself is oxidized. With a metal layer made of a metal that does not lower the Such a metal layer does not allow an oxide film to be formed on the surface of the roughened surface, or even if an oxide film is formed, the adhesion between the metal layer and the resin insulating layer and the adhesion between the metal layer and the via-hole conductor are improved. Since it does not lower, the adhesion between the roughened surface and the resin insulating layer and the adhesion between the roughened surface and the via-hole conductor can be improved.

Such metals include titanium, aluminum,
At least one metal selected from the group consisting of zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth, and noble metals can be used. Gold, silver, platinum, and palladium are used as the noble metal.

In the present invention, a metal layer made of these metals can be formed on the roughened surface by using various methods. At this time, it is preferable that the metal layer is formed so as to follow the roughened surface, and the roughened surface and the metal layer are brought into close contact. By making the roughened surface and the metal layer adhere to each other, oxidation of the roughened surface can be effectively prevented, and the peeling of the conductor circuit from the interlayer insulating resin layer due to the peeling of the metal film and the peeling of the conductor circuit. Separation from the via-hole conductor can be prevented.

In order to form a metal layer made of a non-oxidizing metal such as nickel, tin, cobalt, and a noble metal, displacement plating, electroless plating, electrolytic plating, sputtering, vacuum deposition and the like can be used. In the case of a noble metal, a method such as sputtering or vapor deposition can be employed.

In particular, when tin is used, displacement plating with copper is desirable. Tin can form a thin layer by electroless displacement plating with copper, and is advantageous for causing the metal layer to follow the roughened surface. In the case of such a Cu-Sn substitution reaction, a solution of tin borofluoride-thiourea, tin chloride-thiourea, or the like is used to form a Sn having a thickness of 0.1 to 2 μm.
A layer can be formed on the roughened surface.

The core substrate thus formed includes:
A through hole may be formed. In such a substrate, the wiring layers on the front surface and the back surface can be electrically connected via the through holes. Further, a low-viscosity resin such as a bisphenol F-type epoxy resin is filled between the through-holes and the conductor circuit of the core board, so that the smoothness of the wiring board can be secured.

(2) Next, an interlayer resin insulating agent is applied on the wiring board prepared in the above (1). As the interlayer resin insulating agent, an adhesive for electroless plating can be used. A roll coater, a curtain coater, or the like can be used for applying the interlayer resin insulating agent.

(3) The applied interlayer resin insulating agent (adhesive for electroless plating) is dried. At this time, the interlayer resin insulation layer provided on the conductor circuit of the substrate has a thin interlayer resin insulation layer on the conductor circuit pattern and a thick interlayer resin insulation layer on the conductor circuit having a large area. In many cases, the unevenness occurs. Therefore, it is desirable that the interlayer resin insulating layer in the uneven state is pressed while being heated using a metal plate or a metal roll to flatten the surface of the interlayer resin insulating layer.

(4) Next, while the interlayer resin insulating layer is cured, an opening for forming a via hole can be provided in the interlayer resin insulating layer. The curing treatment of the interlayer resin insulation layer
When the resin matrix of the adhesive for electroless plating is a thermosetting resin, the curing is performed by thermosetting, and when the resin matrix is a photosensitive resin, exposure is performed by ultraviolet rays or the like.

The opening for forming the via hole is formed by using laser light or oxygen plasma when the resin matrix of the adhesive for electroless plating is a thermosetting resin, and is exposed when the resin matrix is a photosensitive resin. Perforate in development processing. In addition,
In the exposure and development processing, a photomask (preferably a glass substrate) on which a circular pattern for forming a via hole is drawn is placed with the circular pattern side closely attached to the photosensitive interlayer resin insulating layer. And developing.

(5) Next, the surface of the interlayer resin insulating layer (adhesive layer for electroless plating) provided with openings for forming via holes is roughened. In particular, it is preferable to roughen the surface of the adhesive layer by dissolving and removing the heat-resistant resin particles present on the surface of the adhesive layer for electroless plating with an acid or an oxidizing agent. At this time, the depth of the depression on the roughened surface is preferably about 1 to 5 μm.

As the acid, inorganic acids such as phosphoric acid, hydrochloric acid and sulfuric acid, and organic acids such as formic acid and acetic acid can be used.
In particular, it is desirable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. As the oxidizing agent, it is desirable to use chromic acid, permanganate (such as potassium permanganate), or the like.

(6) Next, a catalyst nucleus is applied to the roughened surface of the interlayer resin insulating layer. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus, and generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core.
Palladium is preferred as such a catalyst core.

(7) Next, a thin electroless plating film is formed on the entire surface of the interlayer resin insulating layer provided with the roughened contact nuclei. This electroless plating film is preferably an electroless copper plating film,
The thickness is set to 1 to 5 μm, and more preferably to 2 to 3 μm. In addition, as the electroless copper plating solution, a solution having a liquid composition adopted by a usual method can be used. For example, copper sulfate: 29
g / L, sodium carbonate: 25 g / L, EDTA: 14
A liquid composition comprising 0 g / L, sodium hydroxide: 40 g / L, 37% formaldehyde: 150 mL, (pH = 11.5) is preferable.

(8) Next, a photosensitive resin film (dry film) was laminated on the electroless plating film provided in (7), and a plating resist pattern was drawn on the photosensitive resin film. A non-conductive portion provided with a plating resist pattern is formed by placing a photomask (preferably a glass substrate) in close contact with the substrate, and exposing and developing it.

(9) Next, an electrolytic plating film is formed on a portion other than the non-conductor portion on the electroless plating film, and a conductor circuit and a conductor portion serving as a via hole are provided. Here, it is desirable to use electrolytic copper plating for the electrolytic plating, and its thickness is preferably 10 to 20 μm.

(10) Next, after removing the plating resist on the non-conductive portion, etching of a mixed solution of sulfuric acid and hydrogen peroxide or sodium persulfate, ammonium persulfate, ferric chloride, cupric chloride, etc. is further performed. The electroless plating film is dissolved and removed with the solution to obtain an independent conductor circuit and via holes each composed of two layers of the electroless plating film and the electrolytic plating film. The palladium catalyst nuclei on the roughened surface exposed to the non-conductive portion are dissolved and removed with chromic acid or the like.

(11) Next, a roughened surface is formed on the surface of the conductor circuit and via-hole conductor obtained in (10). The roughened surface can be formed by the above-described etching method according to the present invention. (12) Next, an interlayer resin insulating layer is formed on the substrate according to the steps (2) and (3).
(13) Further, if necessary, the steps (4) to (10) are repeated to form a multilayer, thereby manufacturing a multilayer printed wiring board.

The above is mainly based on the semi-additive method. However, after roughening the adhesive layer for electroless plating, forming a plating resist on the surface, and applying electroless plating, a conductor pattern is formed. In the so-called full additive method, a roughened surface according to the present invention can be formed on a conductive circuit surface formed by electroless plating, and thereafter, a metal layer made of a non-oxidizing metal or the like is coated. be able to.

The roughened surface according to the present invention is shown in FIGS.
5 can be employed in a multilayer printed wiring board manufactured as shown in FIG. 9 to 15 are manufacturing process diagrams of such an example of a multilayer printed wiring board.

A metal foil 6 is adhered to one side of the resin base material 5,
A substrate 7 as shown in FIG. 9 is obtained. The substrate 7 is provided with an opening 8 as shown in FIG.
Electroplating is performed using the metal foil 6 as a plating lead, and an electrolytic plating film 9 as shown in FIG. Next, as shown in FIG. 12, the remaining portion 10 of the opening 8 is filled with a conductive paste 11 to form a via hole 12 and, at the same time, a projecting conductor 13 of the conductive paste 11 is formed on the via hole 12. Form.

Next, the metal foil 6 is removed by etching.
The conductor circuit 14 is formed, and a single-sided circuit board 15 as shown in FIG. 13 is manufactured. The surface of the single-sided circuit board 15 on which the protruding conductors 13 are formed is coated with an uncured thermosetting resin 1 such as an epoxy resin, a polyimide resin, or a phenol resin.
6 or place an uncured resin film.

As shown in FIG. 14, the single-sided circuit board 15 is placed on both sides of a substrate 20 having a conductor circuit 19 in which a metal layer 18 is coated on a roughened surface 17 according to the present invention, and heated. Press and integrate.

FIG. 15 shows the multilayer printed wiring board 21 manufactured as described above. In the wiring board 21, the pressed protruding conductor 13 pushes the resin 16 and contacts the conductor circuit 19 via the metal layer 18 on the roughened surface 17 according to the present invention. The resin 16 is once softened by heating, but the metal layer 18 according to the present invention improves the adhesion of the roughened surface 17 and strengthens the roughened surface 17, so that the resin 16 flows easily and the resin residue is reduced. There is no connection failure that causes.

Further, the roughened surface covered with the metal layer according to the present invention can be adopted also in a multilayer printed wiring board manufactured by sticking a so-called RCC-attached copper foil with resin. The roughened surface according to the present invention is reinforced by the metal layer, and the resin hardly remains. Therefore, the connection failure does not occur even in the printed wiring board thus obtained.

In order to manufacture such a multilayer printed wiring board, for example, a resin-coated copper foil is attached to the surface of a conductor circuit having a roughened surface covered with a metal layer according to the present invention, and a via-hole forming portion is formed. The copper foil is removed by etching, the resin is removed by irradiating a laser beam, an opening for a via hole is provided, and then desmearing is performed with an aqueous solution of an oxidizing agent, for example, an aqueous solution of chromic acid or permanganate. After performing (removal of the residual resin), plating is performed to form via holes.

[0085]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, the present invention will be described based on embodiments and comparative examples. Example 1 Preparation of Adhesive for Electroless Plating (1) 35 parts by weight of 25% by weight acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku: molecular weight 2500)
Photosensitive monomer (Toa Gosei: Aronix M31
5) 3.15 parts by weight, 0.5 parts by weight of an antifoaming agent (S-65 manufactured by San Nopco) and 3.6 parts by weight of N-methylpyrrolidone (NMP) were mixed by stirring.

(2) 12 parts by weight of polyether sulfone (PES), 7.2 parts by weight of epoxy resin particles (manufactured by Sanyo Chemical Co., trade name: Polymer Pole) having an average particle diameter of 1.0 μm, and 7.2 parts by weight of epoxy resin particles having an average particle diameter of 0.5 μm After mixing 3.09 parts by weight, further NM
30 parts by weight of P was added and mixed by stirring with a bead mill.

(3) 2 parts by weight of an imidazole curing agent (manufactured by Shikoku Chemicals, trade name: 2E4MZ-CN), a photoinitiator (manufactured by Ciba-Geigy:
2 parts by weight of Irgacure I-907), 0.2 parts by weight of a photosensitizer (DETX-S, manufactured by Nippon Kayaku), and 1.5 parts by weight of NMP were stirred and mixed. (4) The mixtures (1) to (3) were mixed to obtain an adhesive for electroless plating.

Preparation of Resin Filler (1) 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell: molecular weight 310, trade name: YL983U) and SiO 2 having a surface coated with a silane coupling agent having an average particle size of 1.6 μm ₂ spherical particles [Admatechs made: CRS 1101
-CE, where the maximum particle size is not more than the thickness (15 μm) of the inner layer copper pattern described later. 170 parts by weight, 1.5 parts by weight of a leveling agent (manufactured by San Nopco: trade name Perenol S4) are kneaded with a three-roll mill, and the viscosity of the mixture is adjusted to 23 ±
It was adjusted to 45,000 to 49,000 cps at 1 ° C.

(2) 6.5 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals). (3) The mixtures (1) and (2) were mixed to prepare a resin filler.

Manufacturing of Printed Wiring Board FIGS. 16 to 28 are longitudinal sectional views of another example of a printed wiring board according to the present invention, which are shown according to an example manufacturing process. (1) As shown in FIG. 16, in this example, a glass epoxy resin or bismaleimide triazine (BT) having a thickness of 1 mm was used.
A starting material was a copper-clad laminate 24 in which 18 μm copper foil 23 was laminated on both sides of a substrate 22 made of resin.

(2) First, this copper-clad laminate 24 is
Is formed by performing electroless plating and electrolytic plating, and further etching the copper foil 23 in a pattern according to a conventional method, so that a thickness 2
A 5 μm inner layer copper pattern (lower layer conductor circuit) 26 and a through hole 27 were formed.

Next, roughened surfaces 28, 29 and 30 are provided on the surface of the inner layer copper pattern 26 and the land surface and the inner wall of the through hole 27, respectively, to manufacture the wiring board 31 as shown in FIG. did. After the above-mentioned substrate is washed with water and dried, the roughened surfaces 28, 29, and 30 are sprayed with an etching solution on both surfaces of the substrate by spraying, so that the surface of the inner layer copper pattern 26, the land surface of the through hole 27, and the inner wall are formed. Was formed by etching. The etching solution used was a mixture of 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, 5 parts by weight of potassium chloride, and 78 parts by weight of ion-exchanged water.

(3) Next, as shown in FIG.
2 and 33 are provided between the inner layer copper patterns 26 of the wiring board 31 and in the through holes 27. The resin layers 32 and 33 are coated with a resin filler prepared in advance by a roll coater.
And applied to both sides of the inner copper pattern 26 and into the through holes 27, and heat-treated at 100 ° C for 1 hour, 120 ° C for 3 hours, 150 ° C for 1 hour, and 180 ° C for 7 hours. It was formed by curing.

(4) One surface of the substrate obtained in the process of (3) was polished with a belt sander. In this polishing, # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) was used to prevent the resin filler from remaining on the roughened surface 28 of the inner copper pattern 26 and the roughened surface 29 of the land surface of the through hole 27. Next, buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate to obtain a wiring substrate 34 as shown in FIG.

The wiring board 34 is formed of the inner copper pattern 26.
A resin layer 32 is provided therebetween, and a resin layer 33 is provided in the through hole 27. The roughened surface 28 of the inner layer copper pattern 26 and the roughened surface 29 of the land surface of the through hole 27 are removed, and both surfaces of the substrate are smoothed by a resin filler. The resin layer 32 is in close contact with the roughened surface 28a on the side surface of the inner layer copper pattern 26 or the roughened surface 29a on the side surface of the land of the through hole 27.
In close contact with the roughened surface 30 of the inner wall.

(5) Furthermore, as shown in FIG. 19, the exposed upper surface of the land of the inner copper pattern 26 and the through hole 27 is removed.
The surface was roughened by the etching process (2) to form roughened surfaces 35 and 36 having a depth of 3 μm.

The roughened surface formed in this manner is directly and obliquely angled at 45 ° as shown in FIGS.
When photographed with an electron microscope, in the area of 25 μm ² ,
As shown in FIGS. 4 to 8, an average of 11 anchors 1, an average of 11 depressions 2, and an average of 22 ridges 3 were observed.

The roughened surfaces 35 and 36 were subjected to tin displacement plating to provide a Sn layer 4 having a thickness of 0.3 μm as shown in FIGS. Displacement plating is tin borofluoride 0.1 mol / L,
Under the conditions of thiourea 1.0 mol / L, temperature 50 ° C and pH = 1.2,
Cu-Sn substitution reaction was performed on the roughened surface (the Sn layer is not shown in FIGS. 19 to 28).

(6) An adhesive for electroless plating prepared in advance was applied to both surfaces of the obtained wiring board using a roll coater. This adhesive is left standing for 20 minutes in a horizontal state, and then dried at 60 ° C. for 30 minutes to obtain a film having a thickness of 35 mm as shown in FIG.
A μm adhesive layer 37 was formed.

(7) As shown in FIG. 21, a black circle 38 of 85 μmφ is formed on both sides of the wiring board on which the adhesive layer 37 is formed in (6).
Was adhered to the photomask film 39 printed with.
This wiring board was exposed at 500 mJ / cm ² by an ultra-high pressure mercury lamp.

Next, this wiring board was spray-developed using a DMDG solution to obtain an 85 μm
An opening 40 serving as a mφ via hole was formed in the adhesive layer 37. Furthermore, this wiring board is
Exposure was performed at 00 mJ / cm ² , and heat treatment was performed at 100 ° C. for 1 hour and then at 150 ° C. for 5 hours, thereby forming an opening having excellent dimensional accuracy (an opening for forming a via hole) corresponding to a photomask film. The adhesive layer 37 having a thickness of 35 μm is used.
Functions as an interlayer insulating material layer, and although not shown, the inner copper pattern 26
The upper tin plating layer was partially exposed.

(8) Next, the substrate after the treatment of (7) was immersed in chromic acid for 1 minute to dissolve and remove the epoxy resin particles present on the surface of the adhesive layer 37. By this processing, FIG.
Are formed on the surface of the adhesive layer 37 and the inner wall surface of the via hole opening. Thereafter, the obtained substrate 43 was immersed in a neutralizing solution (manufactured by Shipley), and then washed with water.

Further, on the surface of the roughened wiring board,
By applying a palladium catalyst (manufactured by Atotech), catalyst nuclei were attached to the roughened surface 41 of the adhesive layer 37 and the roughened surface 42 of the via hole opening.

(9) The obtained substrate was immersed in an electroless copper plating bath under the following conditions, and the thickness was 1.6 μm as shown in FIG.
The electroless copper plating film 44 was formed on the entire roughened surface. Electroless plating solution; EDTA: 150 g / L Copper sulfate: 20 g / L HCHO: 30 mL / L NaOH: 40 g / L α, α'-bipyridyl: 80 mg / L PEG: 0.1 g / L None Electroplating condition; 30 minutes at 70 ° C liquid temperature

(10) Next, as shown in FIG. 25, a commercially available photosensitive dry film 45 was attached to the electroless copper plating film 44, and a mask film 47 on which a pattern 46 was printed was placed. This substrate was exposed at 100 mJ / cm ² and then developed with 0.8% sodium carbonate to provide a plating resist 48 having a thickness of 15 μm as shown in FIG.

(11) Next, the obtained substrate was subjected to electrolytic copper plating under the following conditions to form an electrolytic copper plating film 49 having a thickness of 15 μm as shown in FIG. Electrolytic plating solution; Sulfuric acid: 180 g / L Copper sulfate: 80 g / L Additive: 1 mL / L (additive: Atotech Japan: trade name: Kaparaside GL) Electroplating conditions; Current density: 1 A / dm ² hours: 30 Min temperature: room temperature

(12) After the plating resist 48 is peeled and removed with 5% KOH, it is etched with a mixed solution of sulfuric acid and hydrogen peroxide,
Electroless plating film 4 existing under plating resist 48
4 was dissolved away. As shown in FIG. 28, a conductor circuit 50 (including the via hole 51) having a thickness of 18 μm and comprising the electroless copper plating film 44 and the electrolytic copper plating film 49 was obtained.

Further, the adhesive layer 3 for electroless plating between the conductor circuits 50 was immersed in chromic acid of 80 g / L at 70 ° C. for 3 minutes.
The surface of No. 7 was etched by 1 μm to remove the palladium catalyst on the surface, thereby producing a multilayer printed wiring board 52 as shown in FIG.

Heating Test and Heat Cycle Test The obtained wiring board was subjected to a heating test at 128 ° C. for 48 hours and a cooling / heating cycle test at −55 to 125 ° C. The peeling between the interlayer resin insulating layer and the lower conductive circuit after each test, and the resistance change rate of the via hole portion were measured. The adhesion between the interlayer resin insulating layer and the lower conductor circuit was measured according to JIS-C-5102 using the peel strength as an index.
The presence or absence of the halo phenomenon (pink ring after the roughening treatment) was confirmed by an optical microscope. The results are shown in Table 1.

Example 2 The same as Example 1, except that nickel plating was performed using the following treatment solution instead of Sn substitution. Nickel chloride: 30 g / L Sodium hypophosphite: 10 g / L Ammonium chloride: 50 g / L pH: 8 to 10 Temperature: 90 ° C. The obtained wiring board was subjected to the same heat treatment test as in Example 1. A heat cycle test was performed. Table 1 shows the results.

Example 3 The same as Example 1, except that cobalt plating was performed using the following treatment solution (aqueous solution) instead of Sn substitution. Cobalt chloride: 0.6 g / L Sodium hypophosphite: 0.26 g / L Sodium tartrate: 0.9 g / L Ammonium chloride: 1.3 g / L pH: 8-10 Temperature: 90 ° C. A heat treatment test and a heat cycle test were performed on the wiring board in the same manner as in Example 1. Table 1 shows the results.

Examples 4 to 12 Same as Example 1, except that instead of Sn substitution, an Au film (Example 4), a titanium film (Example 5), an aluminum film (Example 6), and a zinc film (Example 6) were used. (Example 7), iron film (Example 8), indium film (Example 9), thallium film (Example 10), lead film (Example 11), bismuth film (Example 1)
2) were each formed by sputtering. All sputtering equipment is SV of Japan Vacuum Engineering Co., Ltd.
-4540 was used.

In Example 4, the sputtering conditions were as follows.
A pressure of 0.6 Pa, a temperature of 100 ° C., and a power of 200 W were used for 1 minute. In Examples 5 and 6, a pressure of 0.6 Pa, a temperature of 100 ° C., and a power of 200 W were used for 2 minutes. In Examples 7 to 10 and 12, the pressure was 0.5 Pa and the temperature was 10 Pa.
0 ° C., power 200 W, 1 minute was adopted. In Example 11, the pressure was 0.5 Pa, the temperature was 100 ° C., the power was 300 W,
Minutes were adopted. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1.
Table 1 shows the results.

Example 13 By performing the steps (1) and (2) of Example 1, a core substrate 31 having a roughened conductor circuit surface as shown in FIG. It was covered with a metal layer consisting of palladium. The coating was performed under the same conditions as in Example 4. On the other hand, a single-sided circuit board 15 was manufactured as shown in FIGS.

The single-sided circuit board 15 was specifically manufactured as follows. 12μ thick glass epoxy substrate 5
A single-sided copper-clad laminate 7 as shown in FIG. 9 is attached, and the surface of the laminate 7 on which the copper foil 6 is not formed is irradiated with a carbon dioxide laser beam, as shown in FIG. The opening 8 having a diameter of 50 μm was formed.

Next, (1) of Example 1 was placed on the laminate 7.
Electroplating was performed under the condition of 1) to form an electrolytic plating film 9 as shown in FIG. Thereafter, a stainless steel print mask having an opening formed in the via hole forming portion is placed thereon, and a gold-Pd conductive paste (TR-4931 made by Tanaka Kikinzoku) having a diameter of 1.0 μm is printed to fill the opening 8. At the same time, a projecting conductor 13 having a height of 20 μm as shown in FIG. 12 was formed.

Next, a dry film is adhered to the surface of the copper foil 5, exposed and developed by ultraviolet rays, an etching resist is provided, and the copper foil 6 is removed by etching with an aqueous solution of sulfuric acid-hydrogen peroxide. The pattern 14 was provided. Thereafter, a cresol novolak type epoxy resin 16 was applied to the surface on which the projecting conductors 13 were formed, and dried at 60 ° C. for 120 minutes to obtain a single-sided circuit board 15 as shown in FIG.

The single-sided circuit board 15 is placed on both sides of the core substrate 31 and integrated by pressing at 150 ° C. under a pressure of 10 kg / cm ² to produce a multilayer printed wiring board 21 as shown in FIG. did. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1.
Table 1 shows the results.

Comparative Example 1 The same as Example 1, except that the roughened surface of the lower conductor circuit was not replaced with tin, and no metal layer made of another non-oxidizing metal or the like was provided. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1. Table 1 shows the results.

Comparative Example 2 Same as Example 1, except that the lower conductor circuit was roughened by 8 g / L of copper sulfate, 0.6 g / L of nickel sulfate, 15 g / L of citric acid, 29 g of sodium hypophosphite. / L, boric acid 31g / L, surfactant 0.1g / L pH
= 9, and a roughened layer made of copper-nickel-phosphorus having a thickness of 3 μm was formed on the surface of the lower conductor circuit. No tin substitution was performed. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1. Table 1 shows the results.

Comparative Example 3 As in Example 1, a blackening-reducing treatment was performed as a method for roughening the lower conductor circuit. NaOH (10 g /
L), NaClO ₂ (40 g / L), Na ₃ PO ₄ (6
g / L) as an oxidation bath, NaOH (10 g / L), Na
Using BH ₄ (6 g / L) as a reducing bath, a depth of 3 μm
Was formed. No tin substitution was performed. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1. Table 1 shows the results.

Comparative Example 4 The same as Example 1, except that a lower layer conductor circuit was roughened by using a mixed aqueous solution of hydrogen peroxide and sulfuric acid at a depth of 3 μm.
m was formed. No tin substitution was performed. A heat treatment test and a heat cycle test were performed on the obtained wiring board in the same manner as in Example 1. Table 1 shows the results.

[0123]

[Table 1]

As shown in Table 1, the multilayer printed wiring boards of Examples 1 to 13 were different from the multilayer printed wiring board of Comparative Example 1 in both the heating test and the cooling / heating cycle test. No peeling occurred with the lower conductor circuit. Further, in Examples 1 to 13, the resistance change rate of the via hole portion is smaller than in Comparative Examples 2 and 3. Furthermore, in the multilayer printed wiring boards of Examples 1 to 13, the halo phenomenon seen in Comparative Examples 1 to 4 was not confirmed. Further, the multilayer printed wiring boards of Examples 1 to 13 all had higher peel strength than Comparative Examples 1, 3, and 4.

[0125]

As described above, in the multilayer printed wiring board according to the present invention, the roughened surface of the conductor circuit having a predetermined roughened surface is formed of resin even if the non-oxidizable metal or the metal itself is oxidized. It is covered with a metal layer made of a metal that does not reduce the adhesion to the insulating layer and the via-hole conductor. Such a metal layer prevents oxidation of the roughened surface and does not allow an oxide film to be formed, or even if the metal itself is oxidized, the adhesion between the metal layer and the resin insulating layer or the metal layer and the via-hole conductor Does not reduce the adhesion of

According to the multilayer printed wiring board of the present invention, the adhesion strength between the roughened surface and the resin insulating layer is reduced or the roughened surface is caused by peeling of the oxide film formed on the roughened surface. Of the adhesive strength between the substrate and the via-hole conductor can be prevented. Further, according to the present invention, it is possible to provide a multilayer printed wiring board in which the halo phenomenon is suppressed and the connection reliability of the via hole is excellent.

[Brief description of the drawings]

FIG. 1 is a photograph as a substitute for a drawing of a roughened surface according to an example of the present invention.

FIG. 2 is a drawing substitute photograph of a roughened surface of another example according to the present invention.

FIG. 3 is a drawing substitute photograph of a roughened surface of still another example according to the present invention.

FIG. 4 is a schematic view of a roughened surface according to the present invention.

FIG. 5 is a schematic view of a roughened surface according to the present invention.

FIG. 6 is a schematic view of a roughened surface according to the present invention.

FIG. 7 is a schematic diagram of a roughened surface according to the present invention.

FIG. 8 is a schematic diagram of a roughened surface according to the present invention.

FIG. 9 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 10 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 11 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 12 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 13 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 14 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 15 is a manufacturing process diagram of an example of a multilayer printed wiring board according to the present invention.

FIG. 16 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 17 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 18 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 19 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 20 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 21 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 22 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 23 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 24 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 25 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 26 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 27 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 28 is a manufacturing process diagram of another example of a multilayer printed wiring board according to the present invention.

FIG. 29 is a drawing substitute photograph of a roughened layer made of a needle-shaped alloy.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Anchor part 2 Depression part 3 Ridge line 4, 18 Metal layer 5 Resin base material 6 Metal foil 7, 20, 22 Substrate 8 Opening 9 Electroplating film 10 Remaining part of opening 11 Conductive paste 12, 51 Via hole 13 Projecting conductors 14, 19, 50 Conductor circuit 15 Single-sided circuit board 16 Uncured thermosetting resin 17, 28, 29, 30, 35, 36, 41, 42 Roughened surface 21, 52 Multilayer printed wiring board 23 Copper foil 24 Copper-clad laminate 25 Drill hole 26 Inner layer copper pattern (lower layer conductor circuit) 27 Through hole 31, 34, 43 Wiring board 32, 33 Resin layer 37 Adhesive layer 38 Black circle 39, 47 Photomask film 40 Opening 44 Electroless copper Plating film 45 Photosensitive dry film 46 Pattern 48 Plating resist 49 Electrolytic copper plating film

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Yuan Honzhen 1- 1 north of Ibigawa-cho, Ibi-gun, Gifu Prefecture F-term in Ogaki-kita Plant (reference) 5E343 AA02 AA16 BB16 BB22 BB24 BB25 BB28 BB34 BB35 BB43 BB44 BB47 BB71 BB80 CC22 CC32. FF14 FF18 FF35 GG01 GG15 GG17 GG18 GG19 GG22 GG23 GG27 GG28 HH07 HH11

Claims (13)

[Claims] 1. A multilayer printed wiring board comprising a lower conductive circuit and an interlayer resin insulating layer on the lower conductive circuit, wherein the lower conductive circuit is an etching solution containing a cupric complex and an organic acid. Has a roughened surface treated by
The roughened surface is at least one selected from the group consisting of titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and a noble metal.
A multilayer printed wiring board, wherein the multilayer printed wiring board is covered with a metal layer made of a kind of metal, and the interlayer resin insulating layer is provided on the roughened surface. 2. A multilayer printed wiring board comprising a lower conductor circuit and an interlayer resin insulation layer on the lower conductor circuit, wherein the lower conductor circuit has a roughened surface, and the roughened surface is It has a plurality of anchors, depressions, and ridges, and the anchors, the depressions, and the ridges are dispersedly formed, and the adjacent anchors are connected by the ridges,
The depression is surrounded by the anchor and the ridge, and the roughened surface is formed of titanium, aluminum, zinc,
Covered with a metal layer made of at least one metal selected from the group consisting of iron, indium, thallium, cobalt, nickel, tin, lead, bismuth and a noble metal, wherein the interlayer resin insulating layer is formed on the roughened surface A multilayer printed wiring board characterized by being provided in a multilayer printed wiring board. 3. The method according to claim 2, wherein the recess is formed by etching metal crystal particles.
The multilayer printed wiring board according to the above. 4. The multilayer printed wiring board according to claim 2, wherein said recess is hollowed out in a substantially polyhedral shape. 5. The multilayer printed wiring board according to claim 2, wherein said ridge lines are formed by etching adjacent metal crystal particles. 6. The multilayer printed wiring board according to claim 2, wherein said ridge lines are branched. 7. The multilayer printed wiring board according to claim 2, wherein the ridge is sharp. 8. The multilayer printed wiring board according to claim 2, wherein said anchor-shaped portion is formed by etching metal crystal particles around said anchor-shaped portion. 9. The multilayer printed wiring board according to claim 2, wherein each of said anchor portions is dispersed, and said anchor portion is surrounded by said recessed portion and said ridge line. . 10. The multilayer printed wiring board according to claim 2, wherein said roughened surface has a maximum roughness (Rmax) of 0.1 to 10 μm. 11. The roughened surface has an average of 2 to 100 anchor-shaped portions and an average of 2 to 100 recesses per 25 μm ^2. 2. The multilayer printed wiring board according to 2. 12. To obtain a multilayer printed wiring board including a lower conductive circuit and an interlayer resin insulating layer on the lower conductive circuit, the lower conductive circuit is provided on a substrate, and a second copper complex and an organic acid are provided. To form a roughened surface in the lower conductor circuit, and to form the roughened surface with titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, and bismuth. And a metal layer made of at least one metal selected from the group consisting of noble metals, and providing the interlayer resin insulating layer on the metal layer. 13. An opening for a via hole is formed in the interlayer resin insulation layer, an upper conductor circuit is provided on the interlayer resin insulation layer, and the metal layer and the upper conductor circuit are connected by a via hole. The method for producing a multilayer printed wiring board according to claim 12, wherein: