JPH10242622A - Printed wiring board, multilayer printed wiring board, and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the cracking of a solder body and its separation from a conductor pad, by forming on an insulation layer the conductor pad comprising electroless-plating and electroplating films. SOLUTION: On both the surfaces of a board with bonding agent layers 6 formed out of an interlayer resin insulation material, photomask films with the delineations of via holes are put to expose them. Developing the exposed board, an opening to be the via hole is formed in the bonding agent layer 6. Roughing the surface of the bonding agent layer 6 of the board with the formed opening for forming the via hole, catalytic nucleuses are given to the surfaces of the bonding agent layer 6 and the opening for forming the via hole of the board with the roughed surfaces to form thereafter an electroless-plating copper film 3 over the whole roughed surfaces. Then, by the dissolving and removing of the electroless-plating copper film 3, a conductor pad comprising electroless plating and electroplating copper films 3, 4 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a printed wiring board,
The present invention relates to a multilayer printed wiring board and a method of manufacturing the same, and more particularly to a multilayer printed wiring board in which cuts, cracks, and peeling of solder bumps are suppressed, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured by a method disclosed in, for example, Japanese Patent Publication No. 4-55555. That is, an insulating material made of a photosensitive adhesive for electroless plating is applied on the core substrate, dried, exposed and developed to form an interlayer insulating material layer having a via hole opening. Next, after roughening the surface of the interlayer insulating material layer by treatment with an oxidizing agent or the like, a plating resist is provided on the roughened surface, and then electroless plating is performed on a portion where no resist is formed, thereby forming a conductor including via holes. Form a circuit pattern. By repeating such a process a plurality of times, a multilayered build-up wiring board can be obtained.

[0003]

However, in such a multilayer printed wiring board, it is necessary to form a spherical or protruding solder body called a solder bump for mounting an IC chip on an outer layer. When an IC chip or the like is mounted on a multilayer printed wiring board via such a solder body, stress is applied to the solder body due to a difference in thermal expansion coefficient between the IC chip and the resin insulating layer during a heat cycle, and the solder body is cut. There has been a problem that the solder body is peeled off or the solder body comes off from the solder pad. Further, the present inventors have also found that a similar problem occurs when an IC chip is mounted via a solder bump to a conductive pad formed on a substrate having a resin insulating layer, not limited to a multilayer printed wiring board. The present invention relates to an IC
A printed wiring board, a multilayer printed wiring board, and a method of manufacturing the same, in which even when a chip or the like is mounted, the solder body does not break or the solder body does not peel off from the solder pad.

[0004]

The gist of the present invention is as follows. A printed wiring board having a conductor pad formed on an insulating layer, and a solder body formed on the conductor pad, wherein the conductor pad comprises an electroless plating film and an electrolytic plating film. Board. Wherein the thickness of the electroless plating film is 0.1 to 5 μm, and the thickness of the electrolytic plating film is 5 to 30 μm. Performing electroless plating on the insulating layer, then forming a plating resist, performing electroplating, removing the plating resist, performing etching, providing a conductor pad composed of an electroless plating film and an electrolytic plating film, A method for manufacturing a printed wiring board, wherein a solder body is provided on a conductive pad. A lower conductor circuit is formed on a substrate, an interlayer insulating layer is provided on the lower conductor circuit, a via hole is formed in the interlayer insulating layer to connect to the lower conductor circuit, and a solder body is formed in the via hole. A multilayer printed wiring board according to claim 1, wherein said via hole comprises an electroless plating film and an electrolytic plating film. Wherein the thickness of the electroless plating film is 0.1 to 5 μm and the thickness of the electrolytic plating film is 5 to 30 μm. A lower conductor circuit is formed on a substrate, an interlayer insulating layer is provided on the lower conductor circuit, a hole for a via hole is provided in the interlayer insulating layer, and then electroless plating is performed. After forming an electrolytic plating film, a plating resist is formed, and after further electrolytic plating is performed, the plating resist is removed and etched, and a via hole composed of an electroless plating film and an electrolytic plating film is provided. A method for manufacturing a multilayer printed wiring board, comprising: forming a solder body on a printed circuit board.

In the structure of the present invention, the solder pad is a conductor pad composed of an electroless plating film and an electrolytic plating film, a soft electrolytic plating film is provided on the side to be joined with the soft solder body, and a resin insulating layer is provided. Hard electroless plating films correspond to the contacting sides, respectively (see FIGS. 19 and 20).
Therefore, even when the IC chip is mounted, the difference in the expansion coefficient between the IC chip and the resin insulating layer can be reduced by the solder body and the electrolytic plating film. As a result, stress is not concentrated on the solder body, and the solder body is cut or peeled. Never do. Further, the side in contact with the resin insulation layer is a hard electroless plating film as compared with the electrolytic plating film, and thus firmly adheres to the resin insulation layer. This adhesion is remarkable especially when a roughened surface as described later is formed on the resin insulating layer. The reason is that the hard plating film penetrates the roughened surface, so that even when a peeling force is applied, destruction hardly occurs on the metal side.

The same applies to the configuration of the present invention in which the solder pad is formed of a via hole. An electrolytic plating film is located inside the via hole and an electroless plating film is located outside the via hole (FIGS. 19 and 20). Therefore, the difference in expansion coefficient between the IC chip and the resin insulating layer can be reduced by the solder body and the electrolytic plating film. As a result, stress is not concentrated on the solder body and the solder body does not break or peel. . Further, the side in contact with the resin insulation layer is a hard electroless plating film as compared with the electrolytic plating film, and thus firmly adheres to the resin insulation layer. Further, since the solder body is filled in the via hole, the solder body is difficult to be peeled off.
The diffusion of b does not easily occur.

According to the method of the present invention, the wiring board according to the present invention can be easily manufactured.

In the present invention, it is desirable that a solder resist layer is formed on the outermost layer of the wiring board. The thickness of the solder resist layer is preferably 5 to 40 μm. If it is too thin, it will not function as a solder dam, and if it is too thick, it will not be easy to open, and it will cause cracks in the solder body due to contact with the solder body.

The conductor pads and via holes functioning as solder pads can be either covered with a solder resist layer and partially exposed (FIG. 19) or completely exposed (FIG. 18). In the former case, cracking of the resin insulating layer at the boundary between the conductor pad or the via hole can be prevented, and in the latter case, the allowable range of the opening position shift can be increased.
As the solder resist, a resin composition mainly containing an acrylate of an epoxy resin of a novolak type such as a phenol novolak type or a cresol novolak type and an imidazole curing agent can be used.

[0010] A metal layer such as nickel-gold for improving the adhesion to a solder body may be provided on the surface of the conductor pad or the via hole. Nickel joins with copper,
Gold bonds with the solder body. The thickness of the electroless plating film,
It is preferably from 0.1 to 5 μm, particularly preferably from 1 to 5 μm. If it is too thick, the ability to follow the interlayer resin insulation layer will be reduced, and if it is too thin, the peel strength will decrease.If electrolytic plating is performed, the resistance will increase, and the thickness of the plating film will vary. It is because.

The thickness of the electrolytic plating film is 5 to 3
0 μm is desirable, and particularly preferably 10 to 20 μm. If the thickness is too large, the peel strength is reduced, and if it is too small, the ability to follow the interlayer resin insulating layer is reduced.

In the present invention, the surface of the lower conductor circuit connected to the via hole is preferably roughened. This is because it has excellent adhesion to the interlayer insulating layer and firmly adheres to the via hole. The roughened layer is desirably a roughened surface of copper formed by an etching process, a polishing process, an oxidation process, or an oxidation-reduction process or a roughened surface formed by a plating film. In particular, the roughened layer is made of copper-
It is desirable that the alloy layer is made of nickel-phosphorus.

The composition of the alloy layer is 90 to 96 wt%, 1 to 5 wt%, 0.5 to 2 wt% in terms of copper, nickel and phosphorus, respectively.
Desirably, it is wt%. This is because these compositions have a needle-like structure at these composition ratios.

It should be noted that Cu-Ni-
The composition of P is shown in a ternary triangular diagram (FIG. 21). (C
u, Ni, P) = (100,0,0), (90,10,
0) and (90, 0, 10).

The oxidizing treatment is desirably a solution of an oxidizing agent comprising sodium chlorite, sodium hydroxide and sodium phosphate. Further, the oxidation-reduction treatment is performed by immersing the substrate in a solution of sodium hydroxide and sodium borohydride after the oxidation treatment.

Preferably, the roughened layer has a thickness of 1 to 10 μm.
In particular, 1 to 5 μm is preferable. If the thickness is too large, the roughened layer itself is easily damaged and peeled off, and if the thickness is too small, the adhesiveness is reduced.

In the present invention, it is desirable to use an adhesive for electroless plating as the insulating layer or the interlayer insulating layer. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there. By treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles particularly subjected to the curing treatment include a heat-resistant resin powder having an average particle diameter of 10 μm or less, and an average particle diameter of 2 μm.
Aggregated particles obtained by aggregating the following heat-resistant resin powder, a heat-resistant powder resin powder having an average particle size of 10 μm or less and an average particle size of 2 μm
m and a mixture with a heat-resistant resin powder having a mean particle size of 2 or less.
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle diameter of 2 μm or less to the surface of a 10 μm heat-resistant resin powder, and an average particle diameter of 0.1 to
It is desirable to use at least one selected from a mixture of heat-resistant resin particles of 0.8 μm and heat-resistant resin particles having an average particle size of more than 0.8 μm and 2 μm or less. This is because they can form more complex anchors.

Next, one method of manufacturing a printed wiring board according to the present invention will be described. (1) First, a wiring board having an inner layer copper pattern formed on the surface of a core board is manufactured. The copper pattern is formed on the core substrate by etching a copper-clad laminate, or by forming an adhesive layer for electroless plating on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate. The surface of the adhesive layer is roughened to a roughened surface, and the surface is subjected to electroless plating, or the entire surface is subjected to electroless plating, plating resist formation, electrolytic plating, plating resist removal, etching treatment, and electroplating. There is a method of forming a conductor circuit made of an electrolytic plating film.

Further, a roughened layer made of copper-nickel-phosphorus is formed on the lower conductive circuit surface of the wiring board. The roughened layer is formed by electroless plating. As the plating solution composition, the copper ion concentration, the nickel ion concentration, and the hypophosphite ion concentration were 2.2 × 10 ^{−2 to} 4.1 × 1 respectively.
0 ^-2 mol / l, 2.2 × 10 ^{-3 to} 4.1 × 10 ^-3 mo
1 / l, and preferably 0.20 to 0.25 mol / l. This is because the crystalline structure of the film deposited in this range has a needle-like structure, and thus has an excellent anchor effect. A complexing agent or an additive may be added to the electroless plating bath in addition to the above compounds.

Other methods of forming the roughened layer include the above-described oxidation-reduction treatment and a method of forming a roughened surface by etching the copper surface along grain boundaries. As the etching solution, an etching solution comprising an aqueous solution of a cupric complex and an organic acid is desirable. The solution acts as follows under conditions of coexistence of oxygen, such as spraying and bubbling, to dissolve the copper conductor as the lower conductor circuit. Cu + Cu (2) A _n → 2Cu (1) A _{n / 2} ↓ Aeration 2Cu (1) A _{n / 2} + n / 4O ₂ + nAH → 2Cu (2) A _n + n / 2H ₂ O A is a complexing agent (chelating agent) And n is the coordination number.

The cupric complex is preferably an azole cupric complex. The cupric complex of azoles acts as an oxidizing agent for oxidizing metallic copper and the like. As the azoles, diazole, triazole and tetrazole are preferable. Among them, imidazole, 2-methylimidazole, 2
-Ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-undecylimidazole and the like are preferred. The addition amount of the cupric complex of the azoles is preferably 1 to 15% by weight. This is because they are excellent in solubility and stability. The organic acid is a compound in which a cupric complex of an azole is mixed to dissolve copper oxide.

Specific examples include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, maleic acid, benzoic acid, glycolic acid, At least one selected from lactic acid, malic acid and sulfamic acid is preferred. The content of the organic acid is preferably 0.1 to 30% by weight. This is for maintaining the solubility of the oxidized copper and ensuring the solubility stability. The generated cuprous complex dissolves under the action of an acid and combines with oxygen to form a cupric complex, which again contributes to copper oxidation.

Further, a halogen ion, for example, a fluorine ion, a chlorine ion, a bromine ion or the like may be added to the etching solution to assist in dissolving copper and oxidizing azoles. As halogen ions, hydrochloric acid,
It can be supplied by adding sodium chloride or the like. The amount of halogen ions is preferably 0.01 to 20% by weight. This is because adhesion between the formed roughened surface and the interlayer resin insulating layer is excellent.
An etching solution is prepared by dissolving a cupric complex of azoles and an organic acid (halogen ions as required) in water.

According to the present invention, a through hole is formed in the core substrate, and the wiring layer on the front surface and the back surface can be electrically connected through the through hole. In addition, resin may be filled between the through hole and the conductor circuit of the core substrate to ensure smoothness (FIGS. 1 to 4).

(2) Next, an interlayer resin insulating layer is formed on the wiring board manufactured in the above (1). In particular, in the present invention, it is desirable to use the above-described adhesive for electroless plating as an interlayer resin insulating material (FIG. 5).

(3) After the formed adhesive layer for electroless plating is dried, openings for forming via holes are provided if necessary. In the case of a photosensitive resin, it is exposed and developed and then thermally cured. In the case of a thermosetting resin, it is thermally cured and then subjected to laser processing, so that an opening for forming a via hole is formed in the adhesive layer. Parts are provided (FIG. 6).

(4) Next, the epoxy resin particles present on the surface of the cured adhesive layer are dissolved and removed with an acid or an oxidizing agent to roughen the surface of the adhesive layer (FIG. 7).
Here, examples of the acid include phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and it is particularly preferable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded.
On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

(5) Next, a catalyst nucleus is applied to the wiring board whose surface of the adhesive layer has been roughened. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus, and generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

(6) Next, the surface of the adhesive for electroless plating is subjected to electroless plating, and an electroless plating film is formed on the entire roughened surface (FIG. 8). The thickness of the electroless plating film is 1 to 5 μm,
More preferably, it is 2-3 μm. Next, a plating resist is formed on the electroless plating film (FIG. 9). As the plating resist composition, it is particularly desirable to use a composition composed of an acrylate of cresol novolak or phenol novolak type epoxy resin and an imidazole curing agent, but a commercially available dry film can also be used.

(7) Next, electrolytic plating is applied to the portion where the plating resist is not formed to form a conductor circuit and a via hole (FIG. 10). Here, it is desirable to use copper plating as the electroless plating.

(8) After removing the plating resist, the electroless plating film is dissolved and removed with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate and ammonium persulfate to form an independent conductor circuit. (FIG. 11).

(9) Next, a roughened layer is formed on the surface of the conductor circuit (FIG. 12). Examples of the method of forming the roughened layer include an etching process, a polishing process, an oxidation-reduction process, and a plating process.
The oxidation-reduction treatment includes NaOH (10 g / l), NaClO
₂ (40 g / l) and Na ₃ PO ₄ (6 g / l) in an oxidation bath (blackening bath), NaOH (10 g / l), NaBH ₄ (5 g / l).
g / l) is used as a reducing bath. When forming a roughened layer of a copper-nickel-phosphorus alloy layer, it is deposited by electroless plating.

The electroless plating solution for this alloy includes copper sulfate 1 to 40 g / l and nickel sulfate 0.1 to 6.0 g / l.
l, citric acid 10-20 g / l, hypophosphite 10-1
00g / l, boric acid 10-40g / l, surfactant 0.
It is desirable to use a plating bath having a liquid composition of from 01 to 10 g / l.

(10) Next, an adhesive layer for electroless plating is formed on the substrate as an interlayer resin insulating layer (FIG. 1).
3). (11) Further, the steps (3) to (8) are repeated to provide a further upper layer conductive circuit. This conductor circuit is a conductor pad or via hole that functions as a solder pad. (FIGS. 14-17).

(12) Next, the coating film of the solder resist composition is dried, and a photomask film having an opening formed thereon is placed on the coating film and exposed and developed, thereby forming a conductive circuit. An opening is formed to expose a solder pad (including a conductive pad and a via hole). Here, the opening diameter of the opening may be larger than the diameter of the solder pad, and the solder pad may be completely exposed.

(11) Next, a “nickel-gold” metal layer is formed on the solder pad exposed from the opening (not shown). The nickel layer preferably has a thickness of 1 to 7 μm, and the gold layer has a thickness of 0.01 to 0.06 μm. If the nickel layer is too thick, the resistance value increases, and if the nickel layer is too thin, it is easily peeled. If the gold layer is too thick, the cost increases, and if it is too thin, the effect of adhering to the solder body is reduced.

(12) Next, a solder body is supplied onto the solder pad exposed from the opening. (FIG. 18).
As a method of supplying the solder body, a solder transfer method or a printing method can be used. Here, in the solder transfer method, a solder foil is bonded to a prepreg, and the solder foil is etched leaving only a portion corresponding to an opening portion to form a solder pattern to form a solder carrier film. Is applied to a solder resist opening portion of a substrate, and then laminated such that a solder pattern is in contact with a pad, which is heated and transferred. On the other hand, the printing method is a method in which a metal mask having a through-hole provided at a position corresponding to a pad is placed on a substrate, and a solder paste is printed and heated.

[0039]

【Example】

(Example 1) (1) 0.6 mm thick glass epoxy resin or BT
A starting material was a copper-clad laminate in which 18 μm copper foil was laminated on both sides of a substrate 1 made of (bismaleimide triazine) resin. The copper foil of this copper-clad laminate was etched in a pattern according to a conventional method, drilled, and subjected to electroless plating to form a lower conductor circuit 2 and through holes on both surfaces of the substrate. Further, bisphenol F type epoxy resin was filled between the lower conductor circuits and in the through holes.

(2) The substrate on which the inner layer copper pattern was formed in the above (1) was washed with water and dried, and then the substrate was acid-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid. To provide a Pd catalyst,
After activating this catalyst, copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, surfactant 0.1 g / l,
Plating was performed in an electroless plating bath having a pH of 9 to form a roughened layer 5 (uneven layer) of Cu-Ni-P alloy having a thickness of 2.5 µm on the entire surface of the copper conductor circuit.

(3) 70 parts by weight of 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500) dissolved in DMDG (diethylene glycol dimethyl ether), polyether sulfone (PES) 30
Parts by weight, imidazole curing agent (Shikoku Chemicals, trade name: 2E
4MZ-CN) 4 parts by weight, caprolactone-modified tris (acryloxyethyl) isocyanurate (trade name: Aronix M325) manufactured by Toagosei Co., Ltd., a photosensitive monomer, benzophenone (Kanto Chemical) 5 as a photoinitiator
Parts by weight, 0.5 parts by weight of Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer, and 35 parts by weight of an epoxy resin particle having an average particle size of 5.5 μm with respect to this mixture.
After mixing 5 parts by weight of 0.5 μm, they are mixed while adding NMP (normal methylpyrrolidone), adjusted to a viscosity of 12 Pa · s with a homodisper stirrer, and then kneaded with three rolls to form a photosensitive adhesive. An agent solution (interlayer resin insulating material) is obtained.

(4) The photosensitive adhesive solution obtained in the above (3) is applied to both surfaces of the substrate after the treatment in the above (2) using a roll coater, and left in a horizontal state for 20 minutes. From
Drying was performed at 60 ° C. for 30 minutes to form an adhesive layer 6 having a thickness of 60 μm. (5) A photomask film having via holes drawn thereon was placed on both surfaces of the substrate on which the adhesive layer 6 was formed in (4) above, and was exposed to ultraviolet light.

(6) The exposed substrate was spray-developed with a DMTG (triethylene glydimethyl ether) solution to form an opening serving as a 100 μmφ via hole in the adhesive layer. Furthermore, the substrate is super-high pressure mercury lamp
Exposure at 3000mJ / cm ² , 1 hour at 100 ℃, then 150 ℃
By performing the heat treatment for 5 hours, a 50 μm-thick adhesive layer having an opening (opening for forming a via hole) having excellent dimensional accuracy equivalent to a photomask film was formed. Note that the roughened layer is partially exposed in the opening serving as the via hole.

(7) The substrate on which the opening for forming a via hole is formed in (5) and (6) is immersed in chromic acid for 2 minutes.
The surface of the adhesive layer was roughened by dissolving and removing the epoxy resin particles present on the surface of the adhesive layer, and then immersed in a neutralizing solution (manufactured by Shipley) and then washed with water. (8) By applying a palladium catalyst (manufactured by Atotech) to the substrate that has been subjected to the surface roughening treatment (roughening depth: 5 μm) in the above (7), a catalyst is formed on the surface of the adhesive layer and the opening for the via hole. A nucleus was provided.

(9) The substrate was immersed in an electroless copper plating bath having the following composition to form an electroless copper plating film 3 having a thickness of 3 μm on the entire rough surface. Electroless plating solution EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l Electroless plating conditions 30 at a liquid temperature of 70 ° C. Minute

(10) A commercially available photosensitive dry film is stuck on the electroless copper plating film, and a mask is placed on the film.
Exposure at mJ / cm ² and development processing with 0.8% sodium carbonate provided a plating resist 7 having a thickness of 15 μm.

(11) Then, electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film 4 having a thickness of 15 μm. Electrolytic plating solution Copper sulfate 180 g / l Copper sulfate 80 g / l Additive (trade name: Capalaside G, manufactured by Adtech Japan)
L) 1 ml / l electroplating conditions Current density 1 A / dm ² hours 30 minutes Temperature Room temperature

(12) After stripping and removing the plating resist 7 with 5% KOH, etching is performed with a mixed solution of sulfuric acid and hydrogen peroxide, and the electroless plating film 3 is dissolved and removed to form an electroless copper plating film and an electrolytic copper plating. An 18 μm-thick conductor circuit (including a via hole) made of the film 4 was formed.

(13) The substrate on which the conductor circuit was formed was coated with copper sulfate 8 g / l, nickel sulfate 0.6 g / l, and citric acid 15 g / l.
1, sodium hypophosphite 29 g / l, boric acid 31 g / l,
The surface was immersed in an electroless plating solution having a pH of 9 containing 0.1 g / l of a surfactant to form a roughened layer 5 made of copper-nickel-phosphorus having a thickness of 3 μm on the surface of the conductor circuit. The roughened layer 5 is
Analysis by PMA (X-ray fluorescence analyzer) revealed that Cu9
The composition ratio was 8 mol%, Ni 1.5 mol%, and P 0.5 mol%.

(14) By repeating the steps (4) to (12), the upper conductive pad 10 and the via hole 100 were further formed. These function as solder pads.

(15) On the other hand, 46.67 g of a photosensitizing oligomer (molecular weight 4000) in which 60% by weight of a cresol novolak type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG was acrylated with 50% of epoxy groups, 15.0 g of 80% by weight bisphenol A epoxy resin (manufactured by Yuka Shell, Epicoat 1001) dissolved in methyl ethyl ketone, 1.6 imidazole curing agent (manufactured by Shikoku Chemicals, trade name: 2E4MZ-CN) 1.6
g, 3 g of a polyacrylic monomer which is a photosensitive monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), 1.5 g of a polyacrylic monomer (trade name: DPE6A, manufactured by Kyoeisha Chemical Co., Ltd.) (Trade name: S-65), 0.71 g, and 2 g of benzophenone (Kanto Chemical) as a photoinitiator and 0.2 g of Michler's ketone (Kanto Chemical) as a photosensitizer. In addition, the viscosity
A solder resist composition adjusted to 2.0 Pa · s at 25 ° C. was obtained. The viscosity was measured using a B-type viscometer (Tokyo Keiki, DVL
-B type) in case of 60rpm, rotor No.4 and in case of 6rpm, rotor No.3.

(16) Solder resist composition on substrate
It was applied in a thickness of 20 μm. (17) Next, after drying at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, the substrate was exposed to ultraviolet light of 1000 mJ / cm ² and developed by DMTG. In addition, 1 hour at 80 ° C, 1 hour at 100 ° C,
Heat treatment at 120 ° C for 1 hour, 150 ° C for 3 hours,
A solder resist layer 8 (thickness: 20 μm) having an opening in the pad portion (opening diameter: 200 μm) was formed.

(18) Next, the substrate on which the solder resist layer was formed was replaced with a nickel chloride 30 g / l, sodium hypophosphite 10 g / l, sodium citrate 10 g / l
It was immersed in an electroless nickel plating solution of H = 5 for 20 minutes to form a nickel plating layer having a thickness of 5 μm at the opening. Further, the substrate was placed on an electroless gold plating solution comprising 2 g / l of potassium gold cyanide, 75 g / l of ammonium chloride, 50 g / l of sodium citrate, and 10 g / l of sodium hypophosphite at 93 ° C. for 23 seconds. By dipping, a gold plating layer having a thickness of 0.03 μm was formed on the nickel plating layer 13.

(19) Solder paste is printed on the opening of the solder resist layer and reflowed at 200 ° C. to form solder bumps (solder bodies) 9 and 90, and a printed wiring board having the solder bumps is formed. Manufactured.

Example 2 Basically the same as Example 1, but the conductor circuit was roughened by etching. An etching solution having a trade name of "Durabond" manufactured by Mec Co. was used.

Example 3 A. Preparation of adhesive composition for electroless plating Cresol novolak type epoxy resin (Nippon Kayaku:
35% by weight of a 25% acrylate having a molecular weight of 2500)
Photosensitive monomer (Toagosei Co., Ltd .: trade name Aronix M3)
15) 3.15 parts by weight of an antifoaming agent (S-6 manufactured by San Nopco)
5) 0.5 parts by weight and 3.6 parts by weight of NMP were mixed with stirring. 12 parts by weight of polyether sulfone (PES), epoxy resin particles (Sanyo Kasei's product name Polymer Pole)
The average particle size of 1.0 μm is 7.2 parts by weight, the average particle size is 0.5
μm, 3.09 parts by weight, and then NM
30 parts by weight of P was added and mixed by stirring with a bead mill.

2 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photoinitiator (Irgacure I-907, manufactured by Ciba Geigy), and a photosensitizer (DETX-S, manufactured by Nippon Kayaku) 0.2 parts by weight, NMP
1.5 parts by weight were stirred and mixed. These were mixed to obtain an adhesive composition for electroless plating.

B. Preparation of adhesive for electroless plating of lower layer Cresol novolak type epoxy resin (Nippon Kayaku:
35% by weight of a 25% acrylate having a molecular weight of 2500)
Photosensitive monomer (Toagosei Co., Ltd .: trade name Aronix M3)
15) 4 parts by weight, antifoaming agent (S-65, manufactured by San Nopco)
0.5 parts by weight and 3.6 parts by weight of NMP were mixed with stirring. 12 parts by weight of polyether sulfone (PES), epoxy resin particles (Sanyo Kasei's product name Polymer Pole)
Was mixed with 14.49 parts by weight of an average particle diameter of 0.5 μm, and then 30 parts by weight of NMP was further added thereto, followed by stirring and mixing with a bead mill.

2 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photoinitiator (Irgacure I-907, manufactured by Ciba Geigy), and a photosensitizer (DETX-S, manufactured by Nippon Kayaku) 0.2 parts by weight, NMP
1.5 parts by weight were stirred and mixed. These were mixed to obtain a lower layer adhesive for electroless plating.

C. Preparation of resin filler Bisphenol F type epoxy monomer (manufactured by Yuka Shell, molecular weight 310, trade name: YL983U) 100 parts by weight and average particle diameter 1.6 μm, SiO ₂ spherical particles coated with a silane coupling agent on the surface (Admatech) Made, CRS 1101−
CE, wherein the maximum particle size is 170 parts by weight of a leveling agent (manufactured by San Nopco, trade name Perenol S4) of 1.5 parts by weight on three rolls. And kneaded. And the viscosity of the mixture was adjusted to 45,000-49,000 cps at 23 ± 1 ° C. Imidazole curing agent (Shikoku Chemicals, trade name: 2E4MZ-C
N) 6.5 parts by weight. These were mixed to prepare a resin filler.

D. Method of Manufacturing Printed Wiring Board (1) 18 mm on both sides of substrate 1 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm.
A copper-clad laminate on which a μm copper foil was laminated was used as a starting material. First, this copper clad laminate is drilled, a plating resist is formed, and then an electroless plating process is performed to form a through-hole. Further, the copper foil is etched in a pattern according to a conventional method to form a substrate. Inner layer copper patterns were formed on both sides.

(2) The substrate on which the inner layer copper pattern was formed was washed with water and dried, and then NaOH (10 g / l), NaC
lO ₂ (40 g / l) and Na ₃ PO ₄ (6 g / l) were used as an oxidation bath (blackening bath), and NaOH (10 g / l),
NaBH ₄ (6 g / l) was used as a reducing bath, and a roughened layer was provided on the entire surface of the conductor circuit and the through hole. (3) A resin filler is applied to both sides of the substrate by using a roll coater to fill the space between the conductor circuits or into the through holes, and then at 100 ° C. for 1 hour, at 120 ° C. for 3 hours, at 150 ° C. for 1 hour. Heating was performed at 180 ° C. for 7 hours for curing. That is, in this step, the resin filler is filled between the inner layer copper patterns or in the through holes.

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.), and the surface of the inner layer copper pattern and the land surface of the through hole Was polished so that no resin filler remained, and then buffed to remove scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, the resin filler filled in the through-holes and the roughened layer on the upper surface of the conductor circuit are removed, and both surfaces of the substrate are smoothed with the resin filler, and the resin filler and the side of the conductor circuit are adhered through the roughened layer. Further, a substrate in which the inner wall of the through hole and the resin filler were in close contact with each other via the roughened layer was obtained. That is, by this step, the surface of the resin filler and the surface of the inner layer copper pattern become flush with each other.
Here, the Tg point of the cured resin is 155.6 ° C., and the linear thermal expansion coefficient is
44.5 × 10 ⁻⁶ / ° C.

(5) Further, a 5 μm thick Cu—Ni—P alloy coating layer, a 2 μm thick Cu—Ni—P needle-like alloy roughened layer and a roughened layer are formed on the exposed upper surfaces of the conductor circuits and the through-hole lands. A 0.3 μm thick Sn metal coating layer was provided on the layer surface. The forming method is as follows. The substrate was acid-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to provide a Pd catalyst. After activating this catalyst, copper sulfate 8 g / l, nickel sulfate 0.6
g / l, citric acid 15g / l, sodium hypophosphite 29g
/ L, boric acid 31 g / l, surfactant 0.1 g / l, pH =
The substrate was immersed in an electroless plating bath made of No. 9, and the substrate was swung in the vertical direction at a rate of once every four seconds. A roughened layer was formed by first depositing a coating layer of a non-acicular alloy of Cu-Ni-P on the surface of the hole, and then depositing an acicular alloy of Cu-Ni-P. In addition, 30
For 30 minutes at 120 ° C. and 2 hours at 150 ° C.
After treatment with a weight% sulfuric acid aqueous solution and a 0.2 mol / l aqueous solution of borofluoric acid, tin borofluoride 0.1 mol / l,
Thiourea 1.0 mol / l, temperature 50 ° C, pH = 1.2
Cu-Sn substitution reaction under the condition of
A μm thick Sn metallization layer was provided.

(6) An interlayer resin insulating material of B (viscosity: 1.5 Pa · s) is applied to both surfaces of the substrate by a roll coater, left in a horizontal state for 20 minutes, and then dried at 60 ° C. for 30 minutes. Do
Then, the adhesive for electroless plating of A was applied using a roll coater, left standing for 20 minutes in a horizontal state, and then dried at 60 ° C. for 30 minutes to form an adhesive layer having a thickness of 40 μm. (7) On both surfaces of the substrate on which the adhesive layer was formed in (6),
A photomask film on which a black circle of 85 μmφ was printed was brought into close contact with the photomask film, and exposed to light at 500 mJ / cm ² using an ultrahigh pressure mercury lamp. This was spray-developed with a DMDG solution to form an opening serving as an 85 μmφ via hole in the adhesive layer. Further, the substrate is 3,000
exposed with mJ / cm ^2, 1 hour at 100 ° C., thereafter 0.99 ° C. 5
By performing the heat treatment for a long time, an interlayer insulating material layer (adhesive layer) having a thickness of 35 μm having an opening (an opening for forming a via hole) having excellent dimensional accuracy corresponding to a photomask film was formed. In addition, in the opening that will be a via hole,
The tin plating layer was partially exposed.

(8) Hereinafter, (7) to (19) of Example 1
Was carried out to obtain a multilayer printed wiring board. However, the thickness of the electroless plating film was 0.6 μm.

(Comparative Example) (1), (2),
After the processes (3), (4), (5), (6), (7), and (8), a dry film photoresist was laminated, and a plating resist was formed by exposure and development. Then, after performing (9) of Example 1, the plating resist is peeled off in the same manner as in the process of (12), and the process of (13) is performed to roughen the entire surface of the conductor circuit. Example 1 After insulating layer, roughening, formation of plating resist, electroless copper plating, and peeling of plating resist, Example 1
(15), (16), (17), (18), (1
By the process of 9), a printed wiring board having solder bumps was manufactured.

An IC chip was mounted on each of the printed wiring boards manufactured in Examples and Comparative Examples, and a heat cycle test was performed at −55 ° C. for 15 minutes, at room temperature for 10 minutes, and at 125 ° C. for 15 minutes.
000 times and 2000 times. With respect to Examples and Comparative Examples, the presence or absence of breakage or peeling of the solder body was confirmed with a microscope. Table 1 shows the results.

[0069]

[Table 1]

[0070]

As described above, according to the printed wiring board of the present invention, it is possible to improve the connection reliability by suppressing the cut and peeling generated in the solder bump (solder body) during the heat cycle. .

[Brief description of the drawings]

FIG. 1

FIG. 18 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 19 is an enlarged view of the structure of the wiring board according to the invention.

FIG. 20 is an enlarged view of the structure of the wiring board according to the present invention.

FIG. 21 is a triangular diagram showing the composition of a roughened layer of copper-nickel-phosphorus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Lower conductor circuit 3 Electroless copper plating film 4 Electrolytic copper plating film 5 Roughened layer 6 Interlayer resin insulating layer (adhesive layer for electroless plating) 7 Plating resist 8 Solder resist layer 9, 90 Solder body 10, 100 Solder pad

Claims (6)

[Claims] 1. A printed wiring board in which a conductor pad is formed on an insulating layer and a solder body is formed on the conductor pad, wherein the conductor pad comprises an electroless plating film and an electrolytic plating film. Printed wiring board featuring. 2. The thickness of the electroless plating film is 0.1-5.
The printed wiring board according to claim 1, wherein the thickness of the electrolytic plating film is 5 to 30 μm. 3. A conductor comprising an electroless plating film and an electrolytic plating film, wherein an electroless plating is performed on the insulating layer, a plating resist is formed, an electrolytic plating is performed, the plating resist is removed, and an etching is performed. A method for manufacturing a printed wiring board, comprising: providing a pad; and providing a solder body on the conductive pad. 4. A lower conductor circuit is formed on a substrate, an interlayer insulating layer is provided on the lower conductor circuit, a via hole connected to the lower conductor circuit is formed in the interlayer insulating layer, and the via hole is formed in the via hole. Is a multilayer printed wiring board on which a solder body is formed, wherein the via hole comprises an electroless plating film and an electrolytic plating film. 5. The thickness of the electroless plating film is 0.1 to 5
5. The multilayer printed wiring board according to claim 4, wherein the thickness of the electrolytic plating film is 5 to 30 μm. 6. A lower conductor circuit is formed on a substrate, an interlayer insulating layer is provided on the lower conductor circuit, a hole for a via hole is provided in the interlayer insulating layer, and then electroless plating is performed. After forming an electroless plating film on the insulating layer, forming a plating resist, and further performing electrolytic plating,
A method for manufacturing a multilayer printed wiring board, comprising: removing a plating resist, performing an etching treatment, providing a via hole including an electroless plating film and an electrolytic plating film, and then forming a solder body in the via hole.