JP2009527060A5 - - Google Patents

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Publication number
JP2009527060A5
JP2009527060A5 JP2008555460A JP2008555460A JP2009527060A5 JP 2009527060 A5 JP2009527060 A5 JP 2009527060A5 JP 2008555460 A JP2008555460 A JP 2008555460A JP 2008555460 A JP2008555460 A JP 2008555460A JP 2009527060 A5 JP2009527060 A5 JP 2009527060A5
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JP
Japan
Prior art keywords
signal processor
digital signal
multiplication
multiplier
product
Prior art date
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Application number
JP2008555460A
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English (en)
Japanese (ja)
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JP2009527060A (ja
JP5074425B2 (ja
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Publication date
Priority claimed from US11/355,397 external-priority patent/US7809783B2/en
Priority claimed from US11/356,359 external-priority patent/US7797366B2/en
Application filed filed Critical
Priority claimed from PCT/US2007/062082 external-priority patent/WO2007095548A2/en
Publication of JP2009527060A publication Critical patent/JP2009527060A/ja
Publication of JP2009527060A5 publication Critical patent/JP2009527060A5/ja
Application granted granted Critical
Publication of JP5074425B2 publication Critical patent/JP5074425B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008555460A 2006-02-15 2007-02-13 拡張された削減ツリー回路構成を有するブース乗算器 Expired - Fee Related JP5074425B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US11/355,397 2006-02-15
US11/356,359 2006-02-15
US11/355,397 US7809783B2 (en) 2006-02-15 2006-02-15 Booth multiplier with enhanced reduction tree circuitry
US11/356,359 US7797366B2 (en) 2006-02-15 2006-02-15 Power-efficient sign extension for booth multiplication methods and systems
PCT/US2007/062082 WO2007095548A2 (en) 2006-02-15 2007-02-13 A booth multiplier with enhanced reduction tree circuitry

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011283978A Division JP2012104138A (ja) 2006-02-15 2011-12-26 拡張された削減ツリー回路構成を有するブース乗算器

Publications (3)

Publication Number Publication Date
JP2009527060A JP2009527060A (ja) 2009-07-23
JP2009527060A5 true JP2009527060A5 (https=) 2012-02-23
JP5074425B2 JP5074425B2 (ja) 2012-11-14

Family

ID=38283320

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2008555460A Expired - Fee Related JP5074425B2 (ja) 2006-02-15 2007-02-13 拡張された削減ツリー回路構成を有するブース乗算器
JP2011283978A Withdrawn JP2012104138A (ja) 2006-02-15 2011-12-26 拡張された削減ツリー回路構成を有するブース乗算器

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2011283978A Withdrawn JP2012104138A (ja) 2006-02-15 2011-12-26 拡張された削減ツリー回路構成を有するブース乗算器

Country Status (4)

Country Link
EP (1) EP1984810B1 (https=)
JP (2) JP5074425B2 (https=)
KR (1) KR101073343B1 (https=)
WO (1) WO2007095548A2 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7797366B2 (en) * 2006-02-15 2010-09-14 Qualcomm Incorporated Power-efficient sign extension for booth multiplication methods and systems
RU2653310C1 (ru) * 2017-05-24 2018-05-07 федеральное государственное бюджетное образовательное учреждение высшего образования "Воронежский государственный университет" (ФГБОУ ВО "ВГУ") Устройство для умножения числа по модулю на константу
CN112540743B (zh) * 2020-12-21 2024-05-07 清华大学 面向可重构处理器的有无符号乘累加器及方法
KR102924330B1 (ko) * 2023-12-21 2026-02-09 숙명여자대학교산학협력단 데이터 감소 인코딩이 적용된 부스 곱셈기
CN117555515B (zh) * 2024-01-11 2024-04-02 成都市晶蓉微电子有限公司 一种用于平衡性能与面积的数字asic串并结合乘法器

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4183008A (en) 1958-05-12 1980-01-08 The United States Of America As Represented By The Secretary Of The Navy Noise making device
JPS62229439A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 並列乗算器
JPH01116764A (ja) * 1987-10-29 1989-05-09 Ricoh Co Ltd 累積加算器
JP3033212B2 (ja) * 1991-01-31 2000-04-17 日本電気株式会社 乗算器
JPH0527948A (ja) * 1991-07-17 1993-02-05 Ricoh Co Ltd 演算装置
JPH06348455A (ja) * 1993-06-14 1994-12-22 Matsushita Electric Ind Co Ltd 乗算における丸め込み方法及び乗算回路
JPH1011267A (ja) * 1996-06-21 1998-01-16 Sharp Corp 乗算器
JP3678512B2 (ja) * 1996-08-29 2005-08-03 富士通株式会社 乗算回路、該乗算回路を構成する加算回路、該乗算回路の部分積ビット圧縮方法、および、該乗算回路を適用した大規模半導体集積回路
EP0840207A1 (en) * 1996-10-30 1998-05-06 Texas Instruments Incorporated A microprocessor and method of operation thereof
JPH10133856A (ja) * 1996-10-31 1998-05-22 Nec Corp 丸め機能付き乗算方法及び乗算器
JPH10333885A (ja) * 1997-05-30 1998-12-18 Sony Corp 乗算回路
JPH11134175A (ja) * 1997-10-29 1999-05-21 Toshiba Corp 乗加減算器及び演算器
US6463453B1 (en) 1998-01-12 2002-10-08 Motorola, Inc. Low power pipelined multiply/accumulator with modified booth's recoder
US6157939A (en) * 1998-06-04 2000-12-05 Integrated Device Technology, Inc. Methods and apparatus for generating multiplicative inverse product
DE69832985T2 (de) * 1998-10-06 2006-08-17 Texas Instruments Inc., Dallas Multiplizier-Akkumulatorschaltungen
JP2002157114A (ja) * 2000-11-20 2002-05-31 Hitachi Ltd 乗算器及びそれを搭載した集積回路装置
US7797366B2 (en) * 2006-02-15 2010-09-14 Qualcomm Incorporated Power-efficient sign extension for booth multiplication methods and systems

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